JPS63271648A - Address control system for common region - Google Patents

Abstract

PURPOSE:To remove a common region from a common address region and to improve the utilization efficiency of a virtual storage space by providing common region among virtual storage spaces of a multiplex virtual storage system computer in a region determined at every virtual storage space. CONSTITUTION:An instruction control part 14 controls instructions of a processor and informs an address discrimination part 13 of a general register number as the operand of an instruction and the execution logic address of data in the case of a load instruction to a general register 11. The address discrimination part 13 discriminates whether or not the reported address is within the range of the region from the start address to the end address held in an address correction register 10. Then when the address is within the range, the common region display 12 of the operand provided corresponding to the general register 11 is set on. An address correction part 15 outputs an execution logic address with an address difference held in the register 10.

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] This is an address control method that makes it possible to provide a common area between virtual memory spaces of a computer using a multiple virtual memory system at a different address for each space.

The address range of the common area determined for each space and the address difference with the predetermined common area are held in a register, and the fact that a general-purpose register has been loaded from the common area is identified and displayed from the address range, When the general-purpose register is used as a base for a storage address, the storage address is corrected based on the address difference.

With this method, addresses of common areas can be determined for each space, and storage space can be used efficiently.

[Industrial application field]

The present invention relates to address control in a computer using a multiple virtual memory system, and particularly to an address control system that allows common areas between virtual memory spaces to be provided in different address areas for each space.

In a computer using a multiple virtual memory system that allows multiple virtual memory spaces, it is often necessary to provide an area with common contents between different virtual memory spaces, and to use this common area as a means of communication between the spaces. .

[Conventional technology]

FIG. 2 is a block diagram showing an example of the configuration of a computer.

The processing device 1 includes a plurality of general-purpose registers, various control registers, an arithmetic control mechanism, an address conversion mechanism, etc.
It has the function of connecting to the main storage device 2 and accessing its storage area, and executes the program loaded in the main storage device 2.

The processing device 1 is also connected to an external storage device 3 consisting of, for example, a magnetic disk storage device, and stores required portions of programs and data stored in the external storage device 3 in the main storage device 2.
and process it.

In the case of a multi-board memory tα type computer, the required pages of the virtual storage space consisting of programs and data for performing the required processing are held in the external storage device 3, and the required pages are transferred from the external storage device 3 to the main memory. Load into the real page of device 2.

In the processing device 1, when controlling program execution and accessing data, a logical address in a virtual storage space (hereinafter referred to as an effective logical address) is used as an instruction address or an operand address of an instruction for the program.
generate.

An effective logical address is generally generated by using the contents of a general-purpose register specified by an instruction as a base address and adding a displacement amount specified by the instruction to this address.

To access a storage area using an effective logical address, the address conversion mechanism of the processing device 1 executes address conversion to convert this effective logical address into a real address of a real page, and then uses the real address to access the main memory. Perform actual access to device 2.

For such address conversion, for example, a group of address conversion tables for each virtual space is provided on the main storage device 2, and one
It consists of one segment table and one or more page tables pointed to by the pointer of each entry in the segment table.

Each entry in the page table corresponds to each logical page and holds a pointer to the real address of a real page if one is allocated. Therefore, by indexing the segment table and page table by the logical address, By determining the term, it is possible to obtain the address of the real page that holds the contents of the virtual storage area specified by the logical address.

When multiple virtual storage spaces have a common area, as illustrated in Figure 3, areas with the same logical address in virtual storage spaces A, B, C, etc. are allocated to the common area, and each of those spaces is When a common area is specified by a logical address, the page table is managed so that it is converted into a real address that points to the same real page group.

[Problem that the invention seeks to solve]

As shown in FIG. 3, the common area between the virtual storage spaces is allocated to the same logical address area, so even if virtual storage space C does not use the common area, there is a possibility that it will be needed in the future. If there is, there is a common area as shown in the figure, but the logical address constant must not be used for other purposes, so even if the common area is not used, the virtual storage space cannot be used effectively.

In order to avoid this problem, it is easy to place common areas in different logical address areas for each space, such as the m1WQs virtual storage space, by managing the page table, but in this case, For example s1
w If you use an address constant that is placed in a common area according to virtual storage space A and points to data in the common area and perform processing in the virtual storage space, you will access the wrong storage area. There is a problem.

[Means for solving problems]

FIG. 1 is a block diagram showing the configuration of the present invention.

The figure shows the configuration of a processing unit of a computer, where 10 is an address correction register that holds the start address, end address, and address difference from the reference address of the common area, 11 is a general-purpose register, and 12 is a common register corresponding to each general-purpose register 11. 13 is an address identification unit that refers to the information notified from the instruction control unit 14 and the address correction register 10 to identify a load from a common area and sets the common area display 12 of the corresponding general-purpose register; 15 is an instruction This is an address correction section that corrects the effective logical address from the control section 14 based on the address difference in the address correction register 10.

[For production]

When a program is executed, the start address and end address of the common area of the virtual storage space of the program, and the address difference between the predetermined reference address and the start address are set in the address correction register 10.

The instruction control unit 14 controls the execution of instructions in the processing device, and in the case of a load instruction to the general-purpose register 11, executes the instruction and also identifies the general-purpose register number that is the operand of the instruction and the effective logical address of the data. Notify Department 13.

The address identification unit 13 identifies whether the notified address is within the range from the start address to the end address held in the address correction register 10, and if it is within the range, it is The provided common area display 12 is set to ON.

Further, the instruction control unit 14 notifies the address correction unit 15 of the effective logical address of the operand data of the instruction and the general-purpose register number specified in the instruction as the base for generating the address, and the address correction unit 15 If the common area display 12 corresponding to the register is on, the effective logical address is corrected based on the address difference held in the address correction register 0 and output.

With the above control method, it is possible to provide a common area in an area defined for each virtual storage space, so there is no need to always leave a common area in an area with a common address, and the space can be used effectively.

〔Example〕

When a program is executed on a computer using multiple virtual memory, the program's virtual memory is stored by setting the real address of the start of the segment table in a predetermined control register of the processing device 1 using a management program, as is well known. Controls such as specifying the space are performed, and at that time, for example, according to the present invention, the address correction register 10 shown in FIG. 1 is also set.

That is, the start address and end address (both logical addresses) of the common area, which are held as control information of the virtual storage space, and the address difference between the predetermined reference address and the start address are set in the address correction register 10. I'll keep it.

Here, the reference address is determined as the start address of the area scheduled as the installation storage area of the common area in the programming of the common area. The address difference is a value obtained by subtracting the reference address from the start address of the common area for each virtual storage space, and therefore can generally take a negative value.

The instruction control unit 14 of the processing device controls the execution of instructions, and in the case of a load instruction that reads data stored in the virtual storage space and sets it in any general-purpose register 11, the instruction control unit 14 controls the execution of the instruction as usual. At the same time, it notifies the address identification unit 13 of the general-purpose register number of the load destination general-purpose register 11 specified in the operand of the instruction and the effective logical address of the read destination of the data to be loaded.

The address identification unit 13 identifies whether the notified address is within the range from the start address to the end address held in the address correction register 10, and if it is within the range, is provided corresponding to the general-purpose register 11 of the operand. The common area display 12 is turned on, and when it is outside the range, the common area display 12 is turned off.

Further, the instruction control unit 14 holds effective logical addresses of operand data generated by execution control of instructions that require access to operands in storage areas, such as so-called load instructions and store instructions, and the base address for generating the addresses. The general-purpose register number specified in the instruction as the general-purpose register 11 to be used is notified to the address correction unit 15.

The address correction unit 15 is connected to read the outputs of all the common area displays 12, and when the common area display 12 corresponding to the notified general-purpose register number is on, the address correction unit 15 stores the address difference held in the address correction register 10. is added to the effective logical address received from the instruction control unit 14 to correct the address, and the resulting address is output as the effective logical address.

Therefore, by converting this corrected effective logical address and executing an access, data in a common area provided in an area different from the reference address can be accessed 7 times using an address constant scheduled for the area of the reference address. becomes possible.

〔Effect of the invention〕

As is clear from the above description, according to the present invention, it is possible to provide a common area between virtual storage spaces of a computer using a multiple virtual storage system in an area defined for each virtual storage space,
There is a significant industrial effect in that the availability of virtual memory space is improved.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of the present invention, FIG. 2 is a block diagram of an example configuration of a computer, and FIG. 3 is an explanatory diagram of a common area. In the figure, 1 is a processing unit, 2 is a main storage device, 3 is an external storage device, 10 is an address correction register, 11 is a general-purpose register, 12 is a common area display, 13 is an address identification unit, 14 is an instruction control unit, and a main storage unit. Figure 1: Block diagram showing the configuration of the invention Figure 1: Block diagram of an example of the configuration of a computer Figure 2: Explanatory diagram of the common area Figure 3:

Claims (1)

[Claims] In a computer using a multiple virtual memory system that has a common area that holds storage contents common to a plurality of virtual memory spaces, when a program in each virtual memory space is executed, Means (10) for holding an address range value indicating the address range of the common area and the difference between the address of the common area and a predetermined address, and a means (10) for storing data from the storage area indicated by the address range value to the general purpose register (11). means (12, 13) for identifying and displaying for each general-purpose register that it has been loaded; A common area address control system characterized by comprising means (15) for correcting a storage address by the value of the difference.