JPS63269541A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS63269541A JPS63269541A JP62105061A JP10506187A JPS63269541A JP S63269541 A JPS63269541 A JP S63269541A JP 62105061 A JP62105061 A JP 62105061A JP 10506187 A JP10506187 A JP 10506187A JP S63269541 A JPS63269541 A JP S63269541A
- Authority
- JP
- Japan
- Prior art keywords
- bonding pad
- film
- semiconductor substrate
- wire
- bonding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 19
- 239000000758 substrate Substances 0.000 claims abstract description 12
- 230000001681 protective effect Effects 0.000 claims abstract description 6
- 238000002161 passivation Methods 0.000 claims description 6
- 238000000034 method Methods 0.000 abstract description 6
- 238000000605 extraction Methods 0.000 abstract description 3
- 229910052782 aluminium Inorganic materials 0.000 abstract description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 2
- 230000000694 effects Effects 0.000 description 2
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000002791 soaking Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02165—Reinforcing structures
- H01L2224/02166—Collar structures
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05073—Single internal layer
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05124—Aluminium [Al] as principal constituent
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05624—Aluminium [Al] as principal constituent
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/852—Applying energy for connecting
- H01L2224/85201—Compression bonding
- H01L2224/85205—Ultrasonic bonding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/01074—Tungsten [W]
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- H01L2924/20—Parameters
- H01L2924/201—Temperature ranges
- H01L2924/20103—Temperature range 60 C=<T<100 C, 333.15 K =< T< 373.15K
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/20—Parameters
- H01L2924/203—Ultrasonic frequency ranges, i.e. KHz
- H01L2924/20301—Ultrasonic frequency [f] f<25 kHz
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
PURPOSE:To improve the moistureproofness and to enhance the reliability by a method wherein, after a passivity film has been formed on a bonding pad, a wire for external extraction use is connected by an ultrasonic bonding method. CONSTITUTION:A bonding pad 2 is formed on a semiconductor substrate 1; a passivity film 3 is formed on the surface of the bonding pad 2. The surface of this passivity film 3 is exposed; an insulating protective film 4 covering the semiconductor substrate 1 is formed; a wire 5 is connected to the surface of the passivity film 3 by an ultrasonic bonding method. When the bonding pad 2 is formed by using aluminum, the passivity film 3 can be formed if the surface of the bonding pad 2 is immersed in warm wafer of about 60 deg.C for 10 minutes. After the passivity film 3 has been formed, one end of the wire 5 is connected by the ultrasonic bonding method under a condition of 20 kHz at 1 W.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置に関し、特に耐湿性に優れた信頼性
の高いボンディングパッドを有する半導体装置に関する
。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a semiconductor device having a highly reliable bonding pad with excellent moisture resistance.
従来の半導体装置゛は、ボンディングパッドに外部引出
し用のワイヤをボンディングした後、そのままの状態で
パッケージに実装される。従って、絶縁保護膜に開口さ
れ表面が露出したボンディングパッドは外部引出し用の
ワイヤの周囲に露出面を残したままパッケージ内に封入
される。A conventional semiconductor device is mounted in a package in that state after bonding a wire for external extraction to a bonding pad. Therefore, the bonding pad, which is opened in the insulating protective film and whose surface is exposed, is enclosed in the package with the exposed surface remaining around the wire for external extraction.
上述した従来の半導体装置、特に樹脂封止型の半導体装
置は、パッケージの外部から浸入する水分と不純物イオ
ンによりボンディングパッドの金属部材が腐蝕されて、
使用中にボンディングパッドが変質または消失するなど
の信頼性上きわめて重大な障害を起すという欠点がある
。In the above-mentioned conventional semiconductor devices, especially resin-sealed semiconductor devices, the metal members of the bonding pads are corroded by moisture and impurity ions that enter from outside the package.
There is a drawback that the bonding pad deteriorates or disappears during use, which causes a very serious problem in terms of reliability.
本発明の半導体装置は、半導体基板と、該半導体基板に
形成されるボンディングパッドと、該ボンディングパッ
ドの表面に形成される不動態膜と、該不動態膜を露出さ
せて前記半導体基板を覆って形成される絶縁保護膜と、
前記不動態膜上に超音波ボンディング接続されるワイヤ
とを含んで構成される。A semiconductor device of the present invention includes a semiconductor substrate, a bonding pad formed on the semiconductor substrate, a passivation film formed on the surface of the bonding pad, and a structure in which the passivation film is exposed and covers the semiconductor substrate. An insulating protective film formed,
and a wire connected to the passive film by ultrasonic bonding.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図は本発明の一実施例の一部切欠き斜視図である。FIG. 1 is a partially cutaway perspective view of an embodiment of the present invention.
第１図に示すように、半導体基板１と、半導体基板１の
上に形成されたボンディングパッド２と、ボンディング
パッド２の表面に形成された不動態膜３と、不動態膜３
の表面を露出させて、半導体基板１を覆って形成された
絶縁保護膜４と、不動態ＪＩｉ４の表面に超音波ボンデ
ィングにより接続されるワイヤとを含む。As shown in FIG. 1, a semiconductor substrate 1, a bonding pad 2 formed on the semiconductor substrate 1, a passivation film 3 formed on the surface of the bonding pad 2, and a passivation film 3 are shown.
It includes an insulating protective film 4 formed to cover the semiconductor substrate 1 with its surface exposed, and a wire connected to the surface of the passive JIi 4 by ultrasonic bonding.
ボンディングパッド２をアルミニウムで形成した場合は
、不動態Ｍ３はボンディングパッド２の表面を約６０℃
の温水に１ｏ分間浸すことで形成される。When the bonding pad 2 is made of aluminum, the passive state M3 heats the surface of the bonding pad 2 to about 60°C.
It is formed by soaking it in warm water for 10 minutes.
不動態膜３を形成後、２０ＸＨｚ、１ｗの条件でワイヤ
５の一端を超音波ボンディングにより接続する。After forming the passive film 3, one end of the wire 5 is connected by ultrasonic bonding under the conditions of 20XHz and 1W.
なお、不動態膜３を形成には、上記の方法の他に酸素プ
ラズマ中に３０分間放置する方法、２０〜２５重量％、
温度１０〜３０℃の過酸化水素液に５〜１０分間浸す方
法、６０〜７０％の農硝酸溶液内に数秒間浸す方法があ
る。In addition to the above-mentioned method, the passive film 3 can be formed by leaving it in oxygen plasma for 30 minutes, by using 20 to 25% by weight,
There are two methods: immersing in a hydrogen peroxide solution at a temperature of 10 to 30°C for 5 to 10 minutes, and immersing in a 60 to 70% agricultural nitric acid solution for several seconds.
以上説明したように本発明は、ボンディングパッドに不
動態膜を形成後、超音波ボンディングにより外部引出し
用のワイヤを接続することにより、接続領域を除くボン
ディングパッドの露出面に不動態膜を残すことができる
ので、パッケージ外部からの水分の浸入に対してボンデ
ィングパッドが変質又は消失することを防止できるので
、耐湿性に優れた信頼性を向上できるという効果がある
。As explained above, the present invention is capable of leaving a passive film on the exposed surface of the bonding pad except for the connection area by forming a passive film on the bonding pad and then connecting an external lead wire by ultrasonic bonding. Therefore, it is possible to prevent the bonding pad from deteriorating or disappearing due to the intrusion of moisture from outside the package, which has the effect of improving reliability with excellent moisture resistance.
第１図は本発明の一実施例の一部切欠き斜視図である。
１・・・半導体基板、２・・・ボンディングパッド、３
・・・不動態膜、４・・・絶縁保護膜、５・・・ワイヤ
。FIG. 1 is a partially cutaway perspective view of an embodiment of the present invention. 1... Semiconductor substrate, 2... Bonding pad, 3
... Passive film, 4... Insulating protective film, 5... Wire.
Claims (1)
パッドと、該ボンディングパッドの表面に形成される不
動態膜と、該不動態膜を露出させて前記半導体基板を覆
って形成される絶縁保護膜と、前記不動態膜上に超音波
ボンディング接続されるワイヤとを含むことを特徴とす
る半導体装置。A semiconductor substrate, a bonding pad formed on the semiconductor substrate, a passivation film formed on the surface of the bonding pad, and an insulating protective film formed covering the semiconductor substrate with the passivation film exposed. , and a wire connected to the passive film by ultrasonic bonding.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62105061A JPS63269541A (en) | 1987-04-27 | 1987-04-27 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62105061A JPS63269541A (en) | 1987-04-27 | 1987-04-27 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63269541A true JPS63269541A (en) | 1988-11-07 |
Family
ID=14397454
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62105061A Pending JPS63269541A (en) | 1987-04-27 | 1987-04-27 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63269541A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5565378A (en) * | 1992-02-17 | 1996-10-15 | Mitsubishi Denki Kabushiki Kaisha | Process of passivating a semiconductor device bonding pad by immersion in O2 or O3 solution |
| EP0753890A3 (en) * | 1995-07-14 | 1997-03-05 | Matsushita Electric Ind Co Ltd | Electrode structure for semiconductor device, method for forming the same, and mounted body including semiconductor device |
| JP2014197677A (en) * | 2013-03-21 | 2014-10-16 | コミッサリア ア レネルジー アトミーク エ オ ゼネルジ ザルタナテイヴ | Encapsulation process, and device associated therewith |
-
1987
- 1987-04-27 JP JP62105061A patent/JPS63269541A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5565378A (en) * | 1992-02-17 | 1996-10-15 | Mitsubishi Denki Kabushiki Kaisha | Process of passivating a semiconductor device bonding pad by immersion in O2 or O3 solution |
| EP0753890A3 (en) * | 1995-07-14 | 1997-03-05 | Matsushita Electric Ind Co Ltd | Electrode structure for semiconductor device, method for forming the same, and mounted body including semiconductor device |
| US6603207B2 (en) | 1995-07-14 | 2003-08-05 | Matsushita Electric Industrial Co., Ltd. | Electrode structure for semiconductor device, method for forming the same, mounted body including semiconductor device and semiconductor device |
| JP2014197677A (en) * | 2013-03-21 | 2014-10-16 | コミッサリア ア レネルジー アトミーク エ オ ゼネルジ ザルタナテイヴ | Encapsulation process, and device associated therewith |
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