JPS6324268B2 - - Google Patents

Info

Publication number
JPS6324268B2
JPS6324268B2 JP55166409A JP16640980A JPS6324268B2 JP S6324268 B2 JPS6324268 B2 JP S6324268B2 JP 55166409 A JP55166409 A JP 55166409A JP 16640980 A JP16640980 A JP 16640980A JP S6324268 B2 JPS6324268 B2 JP S6324268B2
Authority
JP
Japan
Prior art keywords
hall element
control current
voltage
hall
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55166409A
Other languages
Japanese (ja)
Other versions
JPS5790176A (en
Inventor
Kunihiko Matsui
Sukeyoshi Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP55166409A priority Critical patent/JPS5790176A/en
Priority to KR1019810002936A priority patent/KR850000359B1/en
Priority to US06/318,852 priority patent/US4435653A/en
Priority to DE8181305346T priority patent/DE3172782D1/en
Priority to EP81305346A priority patent/EP0052981B1/en
Priority to CA000390760A priority patent/CA1195735A/en
Publication of JPS5790176A publication Critical patent/JPS5790176A/en
Publication of JPS6324268B2 publication Critical patent/JPS6324268B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R21/00Arrangements for measuring electric power or power factor
    • G01R21/08Arrangements for measuring electric power or power factor by using galvanomagnetic-effect devices, e.g. Hall-effect devices
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R33/00Arrangements or instruments for measuring magnetic variables
    • G01R33/02Measuring direction or magnitude of magnetic fields or magnetic flux
    • G01R33/06Measuring direction or magnitude of magnetic fields or magnetic flux using galvano-magnetic devices
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01DMEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
    • G01D5/00Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable
    • G01D5/12Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means
    • G01D5/14Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R17/00Measuring arrangements involving comparison with a reference value, e.g. bridge
    • G01R17/02Arrangements in which the value to be measured is automatically compared with a reference value
    • G01R17/06Automatic balancing arrangements

Description

【発明の詳細な説明】 この発明はホール素子の同相電圧除去回路に関
する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a common mode voltage removal circuit for Hall elements.

従来より、ホール素子に制御電流を印加する手
段として、定電圧源方式と定電流源方式がある
が、ホール素子の内部抵抗が温度や磁場の強さに
より変化するため、高精度を要する装置では定電
流源方式が一般に利用される。
Conventionally, there are constant voltage source methods and constant current source methods as means for applying control current to Hall elements, but since the internal resistance of the Hall element changes depending on temperature and magnetic field strength, it is difficult to use in devices that require high precision. A constant current source method is generally used.

第1図は定電流源方式を用いた従来のガウスメ
ータの構成例を示している。1はホール素子であ
り、その制御電流端子1a,1b間に定電流源2
を接続している。ホール素子1の出力端子1c,
1dはよく知られたように信号電圧(ホール出力
電圧)の他に同相電圧をもつ。ここで同相電圧と
は、制御電流端子1a,1b間の素子内部抵抗に
よる抵抗分圧により二つの出力端子1c,1dに
同相で現われる電圧である。即ちいま、磁界零の
状態で制御電流端子1a,1b間に直流の制御電
流を流した場合を考えると、端子1aの電圧がV
であるとすると、二つの出力端子1c,1dには
共にほぼ(1/2)Vの電圧が現われるが、この
(1/2)Vがここで言う同相電圧である。制御電流
を流し、所定の磁界が印加された時に得られるホ
ール出力電圧は、二つの出力端子1c,1d間の
電位差として現われるから、これを検出するため
には前述の同相電圧の影響を除かなければならな
い。このため同相電圧を除去すべく、2個の演算
増幅器OP1,OP2を用いた完全差動方式の高入力
インピーダンスのバツフア増幅回路3にホール素
子1の出力端子1c,1dを接続し、このバツフ
ア増幅回路3の平衡出力電圧を演算増幅器OP3
用いた差動入力、シングル出力方式の差動増幅回
路4を介してメータ5に導くようにしている。
FIG. 1 shows an example of the configuration of a conventional Gaussmeter using a constant current source method. 1 is a Hall element, and a constant current source 2 is connected between its control current terminals 1a and 1b.
are connected. Output terminal 1c of Hall element 1,
As is well known, 1d has a common mode voltage in addition to the signal voltage (Hall output voltage). Here, the common mode voltage is a voltage that appears in the same phase at the two output terminals 1c and 1d due to resistance voltage division between the control current terminals 1a and 1b by the internal resistance of the element. That is, if we consider the case where a DC control current is passed between the control current terminals 1a and 1b in a state of zero magnetic field, the voltage at the terminal 1a becomes V.
Assuming that, a voltage of approximately (1/2) V appears at both the two output terminals 1c and 1d, and this (1/2) V is the common mode voltage referred to here. The Hall output voltage obtained when a control current is passed and a predetermined magnetic field is applied appears as a potential difference between the two output terminals 1c and 1d, so in order to detect this, it is necessary to remove the influence of the above-mentioned common mode voltage. There must be. Therefore, in order to remove the common mode voltage, the output terminals 1c and 1d of the Hall element 1 are connected to a fully differential high input impedance buffer amplifier circuit 3 using two operational amplifiers OP 1 and OP 2 . The balanced output voltage of the buffer amplifier circuit 3 is led to the meter 5 via a differential input/single output type differential amplifier circuit 4 using an operational amplifier OP3 .

この場合、ホール素子1の同相成分が誤差にな
らないように高いCMMR(ommon ode
ejection atio、同相成分除去比)を得るため
に、抵抗R1〜R4はR1・R4=R2・R3を満足しなけ
ればならない。そのためには、これらの抵抗を可
変抵抗として調整可能にするとか、高精度の抵抗
を用いることが必要となる。
In this case, a high CMMR ( Common Mode R
In order to obtain the ejection ratio ( common-mode component rejection ratio), the resistors R 1 to R 4 must satisfy R 1 ·R 4 =R 2 ·R 3 . For this purpose, it is necessary to make these resistors adjustable as variable resistors or to use highly accurate resistors.

このように従来のホール素子を用いた装置で
は、高精度の測定を行うにはかなり複雑な回路を
必要とし、また可変抵抗や精密抵抗を要するため
装置全体が高価になるといつた欠点がある。
As described above, conventional devices using Hall elements require a fairly complicated circuit to perform high-precision measurements, and also have the disadvantage that the entire device is expensive because it requires variable resistors and precision resistors.

この発明は上記の点に鑑み、差動増幅回路を用
いずホール素子の同相電圧を除去し、ガウスメー
タ等の装置を簡単かつ安価な構成としてしかも高
精度の測定を可能とするホール素子装置を提供す
るものである。
In view of the above points, the present invention provides a Hall element device that removes the common mode voltage of the Hall element without using a differential amplifier circuit, makes a device such as a Gauss meter simple and inexpensive, and enables high-precision measurement. It is something to do.

この発明においては、高利得直流増幅器である
演算増幅器の一方の入力端を接地したとき、他方
の入力端がいわゆる仮想的接地(イマジナリ・シ
ヨート)となることを利用して、ホール素子の出
力端子の一方を仮想的接地とし、他方からホール
出力電圧を取出すようにする。
In this invention, when one input terminal of an operational amplifier, which is a high-gain DC amplifier, is grounded, the other input terminal becomes a so-called virtual ground (imaginary ground). One of the two is virtual grounded, and the Hall output voltage is extracted from the other.

この発明の一実施例のガウスメータを第2図に
示す。11がホール素子であり、その第1の制御
電流端子11aは定電流源12に、第2の制御電
流端子11bは演算増幅器OP11の出力端子にそ
れぞれ接続している。演算増幅器OP11の非反転
入力端は接地し、反転入力端にホール素子11の
第1の出力端子11cを接続している。そしてホ
ール素子11の第2の出力端子11dから得られ
るホール出力電圧を、演算増幅器OP12と抵抗
R11,R12からなる非反転増幅回路13を介して
メータ14に導くようにしている。
A Gaussmeter according to an embodiment of the present invention is shown in FIG. Reference numeral 11 denotes a Hall element, whose first control current terminal 11a is connected to the constant current source 12, and its second control current terminal 11b is connected to the output terminal of the operational amplifier OP11 . The non-inverting input terminal of the operational amplifier OP 11 is grounded, and the first output terminal 11c of the Hall element 11 is connected to the inverting input terminal. Then, the Hall output voltage obtained from the second output terminal 11d of the Hall element 11 is transferred to the operational amplifier OP 12 and the resistor.
The signal is led to a meter 14 via a non-inverting amplifier circuit 13 consisting of R 11 and R 12 .

このような構成とすれば、定電流源12から流
れ出した電流はホール素子11に制御電流として
流れた後、演算増幅器OP11に吸い込まれていく。
そして演算増幅器OP11は非反転入力端が接地電
位にあるから、反転入力端も仮想的接地となり、
従つてホール素子11の第1の出力端子11cも
接地電位となる。こうしてホール素子11の第2
の出力端子11dからは自動的に同相成分が除去
されたホール出力電圧のみが得られるから、これ
を通常の非反転増幅回路13により取出すことが
できる。ちなみに、第1の出力端子11cを仮想
的接地ではなく、制御電流端子11bと共に実際
に接地した場合には、制御電流端子11aと出力
端子11c間に電流パスが形成される。このよう
な電流パスが形成されることは、二つの制御電流
端子間のホール効果に寄与する制御電流の大きさ
が分からなくなり、また出力端子11c,11d
間にはホール出力電圧の他に横方向の電流による
電圧降下分が重畳するため、極めて不都合であ
る。出力端子11cを高入力インピーダンスの演
算増幅器の仮想的接地を利用して、電流の流出を
伴うことなく電位的にのみ接地することにより、
この様な不都合を回避することができる。このと
き、磁界零で制御電流のみを流した場合を考える
と、第1の出力端子11cの電位が零であるとい
うことは、素子の制御電流を流す方向の中間点が
電位零、つまり第2の出力端子11dの電位も零
ということであり、前述した同相電圧は自動的に
除去されることになる。
With such a configuration, the current flowing from the constant current source 12 flows into the Hall element 11 as a control current, and then is sucked into the operational amplifier OP 11 .
Since the non-inverting input terminal of operational amplifier OP 11 is at ground potential, the inverting input terminal also becomes virtual ground.
Therefore, the first output terminal 11c of the Hall element 11 also becomes the ground potential. In this way, the second
Since only the Hall output voltage from which the in-phase component has been automatically removed is obtained from the output terminal 11d of the output terminal 11d, it can be extracted by the ordinary non-inverting amplifier circuit 13. Incidentally, if the first output terminal 11c is not virtually grounded but actually grounded together with the control current terminal 11b, a current path is formed between the control current terminal 11a and the output terminal 11c. Formation of such a current path means that the magnitude of the control current that contributes to the Hall effect between the two control current terminals becomes unknown, and that the output terminals 11c and 11d
In addition to the Hall output voltage, a voltage drop due to a lateral current is superimposed between the two, which is extremely inconvenient. By using the virtual grounding of the operational amplifier with high input impedance to ground the output terminal 11c only in terms of potential without causing any current to flow out,
Such inconvenience can be avoided. At this time, considering the case where only the control current flows with zero magnetic field, the potential of the first output terminal 11c is zero, which means that the midpoint in the direction of the control current of the element is zero potential, that is, the second This means that the potential of the output terminal 11d is also zero, and the above-mentioned common mode voltage is automatically removed.

従つてこの発明によれば、このような効果が得
られる。
Therefore, according to the present invention, such effects can be obtained.

(1) ホール素子の1つの出力端子を仮想的接地状
態とするので、差動増幅回路を用いることなく
自動的に同相成分を除去することができ、従つ
て回路構成が簡単になる。
(1) Since one output terminal of the Hall element is placed in a virtual ground state, the common mode component can be automatically removed without using a differential amplifier circuit, and the circuit configuration is therefore simplified.

(2) 同様の理由で、従来のように同相電圧を除去
するために可変抵抗や精密抵抗を用いる必要が
なく、装置が安価なものとなる。
(2) For the same reason, there is no need to use a variable resistor or precision resistor to remove the common-mode voltage as in the conventional method, making the device inexpensive.

(3) 接地電位を基準として信号電圧を取出すた
め、増幅回路の設計も容易になる。
(3) Since the signal voltage is extracted using the ground potential as a reference, the design of the amplifier circuit becomes easier.

(4) ホール素子の1つの出力端子を仮想的接地と
するので、制御電流として交流を用いた場合、
従来の方式と比べ同じ回路電圧では約2倍の制
御電流を流すことができる。換言すれば約2倍
の感度を持たせることができる。
(4) Since one output terminal of the Hall element is virtual grounded, when alternating current is used as the control current,
Compared to conventional systems, approximately twice as much control current can flow at the same circuit voltage. In other words, the sensitivity can be approximately doubled.

第3図はこの発明を交流電力計に応用した実施
例である。第2図と相対応する部分には第2図と
同一符号を付してある。交流電圧VLはトランス
21を介し、演算増幅器OP13と抵抗R13からなる
電流源回路22によりVLに比例した電流に変換
されてホール素子11に制御電流として供給され
る。一方負荷電流ILはフエライトコア23により
その大きさに比例した磁場Bに変換されてホール
素子11に印加される。この結果、VLとILの積に
比例したホール出力電圧即ち電力値が出力端子1
1dから取出されることになる。
FIG. 3 shows an embodiment in which the present invention is applied to an AC wattmeter. Parts corresponding to those in FIG. 2 are given the same reference numerals as in FIG. 2. The AC voltage V L is converted into a current proportional to V L via a transformer 21 by a current source circuit 22 consisting of an operational amplifier OP 13 and a resistor R 13 , and is supplied to the Hall element 11 as a control current. On the other hand, the load current I L is converted by the ferrite core 23 into a magnetic field B proportional to its magnitude, and is applied to the Hall element 11 . As a result, the Hall output voltage, that is, the power value proportional to the product of V L and I L , is at the output terminal 1.
1d.

以上のようにこの発明によれば、演算増幅器の
特質を利用してホール素子の同相電圧を簡単かつ
効果的に除去し、もつてホール素子を用いた各種
装置の構成の簡略化、低価格化を図ることができ
る。
As described above, according to the present invention, the common mode voltage of the Hall element can be easily and effectively removed by utilizing the characteristics of an operational amplifier, thereby simplifying the configuration and lowering the cost of various devices using the Hall element. can be achieved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のホール素子を用いたガウスメー
タの構成を示す図、第2図はこの発明の一実施例
のガウスメータの構成を示す図、第3図はこの発
明の別の実施例の電力計の構成を示す図である。 11……ホール素子、11a,11b……制御
電流端子、11c,11d……出力端子、12…
…定電流源、OP11……演算増幅器、13……非
反転増幅回路、14……メータ。
FIG. 1 is a diagram showing the configuration of a Gauss meter using a conventional Hall element, FIG. 2 is a diagram showing the configuration of a Gauss meter according to one embodiment of the present invention, and FIG. 3 is a diagram showing the configuration of a wattmeter according to another embodiment of the present invention. FIG. 11... Hall element, 11a, 11b... Control current terminal, 11c, 11d... Output terminal, 12...
... Constant current source, OP 11 ... Operational amplifier, 13 ... Non-inverting amplifier circuit, 14 ... Meter.

Claims (1)

【特許請求の範囲】[Claims] 1 制御電流を流すための第1、第2の制御電流
端子、およびホール電圧を得る第1、第2の出力
端子を有するホール素子と、このホール素子の第
1の制御電流端子に接続された定電流源と、出力
端子が前記ホール素子の第2の制御電流端子に接
続され、一つの入力端が前記ホール素子の第1の
出力端子に接続され、他の入力端が接地されて前
記第1の出力端子を仮想的に接地する高利得演算
増幅器と、前記ホール素子の第2の出力端子に接
続された、ホール電圧を検出する増幅器とを備え
たことを特徴とするホール素子装置。
1. A Hall element having first and second control current terminals for flowing a control current and first and second output terminals for obtaining a Hall voltage, and a Hall element connected to the first control current terminal of this Hall element. a constant current source, an output terminal connected to a second control current terminal of the Hall element, one input terminal connected to the first output terminal of the Hall element, and the other input terminal grounded; A Hall element device comprising: a high gain operational amplifier whose first output terminal is virtually grounded; and an amplifier which detects a Hall voltage, which is connected to a second output terminal of the Hall element.
JP55166409A 1980-11-26 1980-11-26 In-phase voltage removing circuit for hall element Granted JPS5790176A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP55166409A JPS5790176A (en) 1980-11-26 1980-11-26 In-phase voltage removing circuit for hall element
KR1019810002936A KR850000359B1 (en) 1980-11-26 1981-08-12 In-phase voltage elimination circuit for hall element
US06/318,852 US4435653A (en) 1980-11-26 1981-11-06 In-phase voltage elimination circuit for Hall element
DE8181305346T DE3172782D1 (en) 1980-11-26 1981-11-11 Hall element circuit arranged to eliminate in-phase voltage
EP81305346A EP0052981B1 (en) 1980-11-26 1981-11-11 Hall element circuit arranged to eliminate in-phase voltage
CA000390760A CA1195735A (en) 1980-11-26 1981-11-24 In-phase voltage elimination circuit for hall element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55166409A JPS5790176A (en) 1980-11-26 1980-11-26 In-phase voltage removing circuit for hall element

Publications (2)

Publication Number Publication Date
JPS5790176A JPS5790176A (en) 1982-06-04
JPS6324268B2 true JPS6324268B2 (en) 1988-05-19

Family

ID=15830878

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55166409A Granted JPS5790176A (en) 1980-11-26 1980-11-26 In-phase voltage removing circuit for hall element

Country Status (2)

Country Link
JP (1) JPS5790176A (en)
KR (1) KR850000359B1 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0235460U (en) * 1988-08-30 1990-03-07
JPH0814616B2 (en) * 1989-05-22 1996-02-14 三菱電機株式会社 Hall element device
JP6144515B2 (en) * 2013-03-27 2017-06-07 旭化成エレクトロニクス株式会社 Hall element drive circuit
JP2015078949A (en) * 2013-10-18 2015-04-23 旭化成エレクトロニクス株式会社 Hall electromotive force signal detection circuit

Also Published As

Publication number Publication date
JPS5790176A (en) 1982-06-04
KR850000359B1 (en) 1985-03-22
KR830006696A (en) 1983-10-06

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