JPS6323657U - - Google Patents
Info
- Publication number
- JPS6323657U JPS6323657U JP11651286U JP11651286U JPS6323657U JP S6323657 U JPS6323657 U JP S6323657U JP 11651286 U JP11651286 U JP 11651286U JP 11651286 U JP11651286 U JP 11651286U JP S6323657 U JPS6323657 U JP S6323657U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- constant voltage
- supplies
- signal
- collector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005070 sampling Methods 0.000 claims description 4
- 238000009499 grossing Methods 0.000 claims 2
- 230000001360 synchronised effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
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- Electronic Switches (AREA)
Description
第１図はこの考案によるサンプリング回路の一
実施例を示す回路図、第２図は第１図の回路の動
作を説明するための波形図、第３図及び第４図は
この考案によるサンプリング回路の他の実施例を
示す回路図、第５図は従来のサンプリング回路の
回路図である。
Fig. 1 is a circuit diagram showing an embodiment of the sampling circuit according to this invention, Fig. 2 is a waveform diagram for explaining the operation of the circuit shown in Fig. 1, and Figs. 3 and 4 are sampling circuits according to this invention. FIG. 5 is a circuit diagram of a conventional sampling circuit.
Claims (1)
トランジスタ及び第二トランジスタと、 Ｂ 上記第一トランジスタ及び第二トランジスタ
のコレクタに定電圧を供給する定電圧源と、 Ｃ 第一トランジスタのコレクタに接続された平
滑回路と、 により構成され、短絡された第一トランジスタ及
び第二トランジスタのエミツタに被測定信号を周
期的に供給し、上記第一トランジスタのベースに
上記被測定信号と同期したパルス信号を供給し、
上記第二トランジスタのベースに定電圧を供給し
て、その時第一トランジスタのコレクタに得られ
る信号を上記平滑回路により平滑して出力するよ
うにして成ることを特徴とするサンプリング回路
。[Claims for Utility Model Registration] A: a first transistor and a second transistor whose emitters are short-circuited and have the same characteristics; B: a constant voltage source that supplies a constant voltage to the collectors of the first transistor and the second transistor; C: a smoothing circuit connected to the collector of the first transistor, which periodically supplies the signal under test to the short-circuited emitters of the first transistor and the second transistor, and supplies the signal under test to the base of the first transistor. Supply a pulse signal synchronized with the signal,
A sampling circuit characterized in that a constant voltage is supplied to the base of the second transistor, and the signal obtained at the collector of the first transistor is smoothed by the smoothing circuit and output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11651286U JPS6323657U (en) | 1986-07-29 | 1986-07-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11651286U JPS6323657U (en) | 1986-07-29 | 1986-07-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6323657U true JPS6323657U (en) | 1988-02-16 |
Family
ID=31001174
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11651286U Pending JPS6323657U (en) | 1986-07-29 | 1986-07-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6323657U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54109353A (en) * | 1978-02-15 | 1979-08-27 | Nec Corp | Sample holding circuit |
| JPS58185096A (en) * | 1982-04-22 | 1983-10-28 | Mitsubishi Electric Corp | Sample holding circuit |
-
1986
- 1986-07-29 JP JP11651286U patent/JPS6323657U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54109353A (en) * | 1978-02-15 | 1979-08-27 | Nec Corp | Sample holding circuit |
| JPS58185096A (en) * | 1982-04-22 | 1983-10-28 | Mitsubishi Electric Corp | Sample holding circuit |