JPS6365309U - - Google Patents

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Publication number
JPS6365309U
JPS6365309U JP16028186U JP16028186U JPS6365309U JP S6365309 U JPS6365309 U JP S6365309U JP 16028186 U JP16028186 U JP 16028186U JP 16028186 U JP16028186 U JP 16028186U JP S6365309 U JPS6365309 U JP S6365309U
Authority
JP
Japan
Prior art keywords
diode
frequency signal
circuit
receiving device
mixer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16028186U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP16028186U priority Critical patent/JPS6365309U/ja
Publication of JPS6365309U publication Critical patent/JPS6365309U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の受信装置の1実施例の一部
の結線図、第2図は第1図の直流等価回路図、第
3図は第1図のミクサ用ダイオードの動作特性図
、第4図は第1図の局部発振信号電力と変換損失
の関係図、第5図a,bはそれぞれこの考案の他
の実施例の直流等価回路図、第6図、第7図、第
8図は従来の受信装置のミクサ用ダイオードの動
作特性図、時間と通電電流の関係図、時間とコン
ダクタンスの関係図、第9図a,bはそれぞれ従
来の受信装置のミクサ回路の直流等価回路図、第
10図は第9図bのミクサ回路の局部発振信号電
力と変換損失の関係図である。 1…ミクサ回路、2…ミクサ用ダイオード、5
…バイアス給電回路。
Fig. 1 is a partial wiring diagram of one embodiment of the receiving device of this invention, Fig. 2 is a DC equivalent circuit diagram of Fig. 1, Fig. 3 is an operating characteristic diagram of the mixer diode of Fig. 1, Figure 4 is a diagram of the relationship between local oscillation signal power and conversion loss in Figure 1, Figures 5a and b are DC equivalent circuit diagrams of other embodiments of this invention, Figures 6, 7, and 8. 9A and 9B are a diagram showing the operating characteristics of a mixer diode in a conventional receiving device, a diagram showing the relationship between time and current, and a diagram showing the relationship between time and conductance, respectively. FIG. 10 is a diagram showing the relationship between local oscillation signal power and conversion loss of the mixer circuit of FIG. 9b. 1...mixer circuit, 2...mixer diode, 5
...Bias feeding circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ミクサ回路のミクサ用ダイオードに、受信高周
波信号と局部発振回路の局部発振信号を印加し、
前記ダイオードにより、前記受信高周波信号を中
間周波信号に変換する受信装置において、前記ダ
イオードに変換損失低減用の直流バイアス電圧を
印加するバイアス給電回路を設けた受信装置。
Applying the received high frequency signal and the local oscillation signal of the local oscillation circuit to the mixer diode of the mixer circuit,
A receiving device that converts the received high frequency signal into an intermediate frequency signal using the diode, the receiving device including a bias power supply circuit that applies a DC bias voltage for reducing conversion loss to the diode.
JP16028186U 1986-10-20 1986-10-20 Pending JPS6365309U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16028186U JPS6365309U (en) 1986-10-20 1986-10-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16028186U JPS6365309U (en) 1986-10-20 1986-10-20

Publications (1)

Publication Number Publication Date
JPS6365309U true JPS6365309U (en) 1988-04-30

Family

ID=31085516

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16028186U Pending JPS6365309U (en) 1986-10-20 1986-10-20

Country Status (1)

Country Link
JP (1) JPS6365309U (en)

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