JPS6152870U - - Google Patents

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Publication number
JPS6152870U
JPS6152870U JP13903184U JP13903184U JPS6152870U JP S6152870 U JPS6152870 U JP S6152870U JP 13903184 U JP13903184 U JP 13903184U JP 13903184 U JP13903184 U JP 13903184U JP S6152870 U JPS6152870 U JP S6152870U
Authority
JP
Japan
Prior art keywords
operational amplifier
circuit
input side
supplied
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13903184U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13903184U priority Critical patent/JPS6152870U/ja
Publication of JPS6152870U publication Critical patent/JPS6152870U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例の接続図、第2図は
その説明のための波形図、第3図は従来例の接続
図、第4図はその説明のための波形図である。 1及び16は夫々オペアンプ、4は積分用のコ
ンデンサ、8は出力端子、9は切換スイツチ、1
9は接続スイツチ、20は平滑回路である。
FIG. 1 is a connection diagram of an embodiment of the present invention, FIG. 2 is a waveform diagram for explaining the same, FIG. 3 is a connection diagram for a conventional example, and FIG. 4 is a waveform diagram for explaining the same. 1 and 16 are operational amplifiers, 4 is an integrating capacitor, 8 is an output terminal, 9 is a changeover switch, 1
9 is a connection switch, and 20 is a smoothing circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 正の電源に接続された第1の定電流回路が切換
スイツチの一方を介して積分回路を構成するオペ
アンプの一方の入力側に接続されると共に、負の
電源に接続された第2の定電流回路が上記切換ス
イツチの他方を介して上記オペアンプの一方の入
力側に接続され、上記切換スイツチは所定周期の
パルス信号で制御され、上記オペアンプの出力側
に上記所定周期の掃引波が得られ、この掃引波が
反転された後サンプルホールド回路に供給されて
所定のタイミングでサンプルホールドされ、その
ホールド出力が上記オペアンプの他方の入力側に
供給されることを特徴とする掃引波発生回路。
A first constant current circuit connected to a positive power supply is connected to one input side of an operational amplifier constituting an integrating circuit via one of the changeover switches, and a second constant current circuit connected to a negative power supply. A circuit is connected to one input side of the operational amplifier via the other side of the changeover switch, the changeover switch is controlled by a pulse signal with a predetermined period, and a swept wave with the predetermined period is obtained at the output side of the operational amplifier, A swept wave generation circuit characterized in that the swept wave is inverted and then supplied to a sample hold circuit where it is sampled and held at a predetermined timing, and the hold output thereof is supplied to the other input side of the operational amplifier.
JP13903184U 1984-09-13 1984-09-13 Pending JPS6152870U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13903184U JPS6152870U (en) 1984-09-13 1984-09-13

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13903184U JPS6152870U (en) 1984-09-13 1984-09-13

Publications (1)

Publication Number Publication Date
JPS6152870U true JPS6152870U (en) 1986-04-09

Family

ID=30697414

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13903184U Pending JPS6152870U (en) 1984-09-13 1984-09-13

Country Status (1)

Country Link
JP (1) JPS6152870U (en)

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