JPS63153626U - - Google Patents
Info
- Publication number
- JPS63153626U JPS63153626U JP4557487U JP4557487U JPS63153626U JP S63153626 U JPS63153626 U JP S63153626U JP 4557487 U JP4557487 U JP 4557487U JP 4557487 U JP4557487 U JP 4557487U JP S63153626 U JPS63153626 U JP S63153626U
- Authority
- JP
- Japan
- Prior art keywords
- ffb
- clock
- ffa
- hereinafter abbreviated
- flop
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Manipulation Of Pulses (AREA)
Description
第１図は本考案の一実施例の回路構成図、第２
図は、第１図で示した回路のタイミング図である
。
１，２……Ｄタイプフリツプフロツプ、３……
入力クロツク、４……帰還クロツク、５……位相
比較器出力、６……電源電圧。
Figure 1 is a circuit configuration diagram of one embodiment of the present invention, Figure 2 is a circuit diagram of an embodiment of the present invention.
The figure is a timing diagram of the circuit shown in FIG. 1, 2...D type flip-flop, 3...
Input clock, 4... Feedback clock, 5... Phase comparator output, 6... Power supply voltage.
Claims (1)
両信号の位相差をパルス幅信号に変換することに
おいて、基準クロツクをフリツプフロツプＡ（以
下ＦＦＡと略す。）のクロツクに入力しＦＦＡの
Ｑ出力をフリツプフロツプＢ（以下ＦＦＢと略す
。）のリセツトと接続しＦＦＢのＱ出力をＦＦＡ
のリセツトに接続し比較信号をＦＦＢのクロツク
に入力する回路構成を特徴とする位相比較器。 In inputting a reference signal and a comparison signal and converting the phase difference between these two signals into a pulse width signal, the reference clock is input to the clock of flip-flop A (hereinafter abbreviated as FFA), and the Q output of FFA is input to the clock of flip-flop B (hereinafter abbreviated as FFA). (hereinafter abbreviated as FFB), connect the Q output of FFB to the reset of FFB.
A phase comparator characterized by a circuit configuration in which a comparison signal is connected to a reset of an FFB and inputted to a clock of an FFB.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4557487U JPS63153626U (en) | 1987-03-30 | 1987-03-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4557487U JPS63153626U (en) | 1987-03-30 | 1987-03-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63153626U true JPS63153626U (en) | 1988-10-07 |
Family
ID=30864433
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4557487U Pending JPS63153626U (en) | 1987-03-30 | 1987-03-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63153626U (en) |
-
1987
- 1987-03-30 JP JP4557487U patent/JPS63153626U/ja active Pending