JPS63229720A - Compound semiconductor device - Google Patents

Abstract

PURPOSE:To enable the stress in both films to be cancelled for restraining properties of the title device from fluctuating by a method wherein the insulating films covering a FET are laminated with multiple types of films with inner stress subjected to opposing stresses, i.e., tension and compression. CONSTITUTION:Respective elements including an FET, a diode and a resistor are integrated on a semi-insulating substrate 1 while insulating films 7-9 are composed of at least two types of laminated film layers subjected to opposing inner stresses, i.e., compression and tension to the semi-insulating substrate 1 in a compound semiconductor device formed of the insulating films 7-9 on respective elements. Thus, both stresses are cancelled by the laminated layers of the first and the second insulating films 7, 8. Through these procedures, the threshold voltage of FET can be restrained from fluctuating.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application] The present invention relates to a compound semiconductor device, and more particularly to a compound semiconductor device that prevents variations in device characteristics due to internal stress in an insulating film covering the device.

[Conventional technology]

Compound semiconductor integrated circuits are made by forming elements such as FETs, diodes, and resistors on a semi-insulating GaAs substrate, covering them with an insulating film, providing through holes in the insulating film, and connecting the elements with wiring. Especially realized. When this insulating film is covered, internal stress of the insulating film causes variations in device characteristics.

[Problem that the invention seeks to solve]

Such variations in characteristics after forming an insulating film change the threshold voltage of the FET, and in the case of integrated circuits, this causes the circuit to stop working or malfunction. In addition, in the case of a single FET element, it may be out of specification, which is a problem.

The main cause of this characteristic variation is that the internal stress of the insulating film is
This is because it acts on the substrate surface and generates piezoelectric charges in GaAs, which is a piezoelectric crystal, thereby modulating the carrier concentration in the channel portion of an FET, for example.

SUMMARY OF THE INVENTION An object of the present invention is to solve these problems and provide a compound semiconductor device in which piezoelectric charges are not generated on the substrate using an insulating coating, thereby preventing variations in device characteristics.

[Means for solving problems]

The structure of the present invention is a compound semiconductor device in which elements including an FET, a diode, and a resistor are integrated on a semi-insulating substrate, and an insulating film is formed on each of these elements. It is characterized by being composed of a laminate of at least two types of coatings that have opposing internal stresses of compression and tension on the flexible substrate.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a vertical cross-sectional view showing one embodiment of the present invention. In this embodiment, a (001) semi-insulating GaAs substrate 1 is provided with a resistor section 2.
, the FET section 3, and the diode section 4 respectively have active layers (2,
3, 4) by ion implantation, and then a WS i It is deposited to a thickness of czm and processed as the gate electrode 5. Next, using the SiNx film as an annealing protective film,
The ion implantation layer (2°3.4) is electrically activated by annealing at 00'C for 82920 minutes. After that, A u G e / N was removed by a lift method using photoresist.
An ohmic electrode 6 of i is formed to establish ohmic contact between the AuGe/Ni layer (6) and the n-type GaAs layer (2°3.4) in H2 at 420°C.

Next, the first insulating film 7 is grown at a growth temperature of 320°C and a pressure of 0.
．． 3Torr, SiH450SCCM, 021258C
10 by low pressure CVD method as CM, N2500SCCM
A SiO□ film (7) with a thickness of 0.00 mm is deposited.

Next, a SiN film was formed as the second insulating film 8 at a temperature of 320°C.
, Pressure 2Torr, S i H4200SCCM
.

Plasma C with plasma power and frequency of 200W and 100KHz, respectively, under the conditions of N H3930SCCM.
Laminated to a thickness of 9,000 layers using the VD method. Using a photoresist, the GaAs substrate 1 is etched back to a height of 5,500 mm from the surface by an etch-back method using R and IE, and is planarized.

Next, apply the same 5i02 film as the insulating film 7 of the Magic Flute 1 to the third film.
After laminating the insulating film 9 to a thickness of 4500 mm, through holes are opened using photoresist or lithographic technology, and sputtered Ti/Pt/Au films are deposited to a thickness of 500 mm, 1000 mm, and 4000 mm, respectively. The wiring 10 is completed by ion milling.

Here, the internal stress of the first insulating film 7 is 4 to 5×109
dyn/cm” is the tensile stress. This stress is [01
1] acts on the end of the gate electrode 5 and the GaAs surface in a direction parallel to the direction 1], generates a negative piezoelectric charge, and has the effect of shifting the Vth of the FET to the negative side. Furthermore, when the gate 5 is aligned in the [011] direction, the opposite is true. The internal stress of the SiN film of the second insulating film 8 is the same as that of the first insulating film 7, but the compressive stress generates a positive piezoelectric charge. Due to the lamination of these first second layer insulating films 7.8, the stresses of both cancel each other out, and as a result, the threshold voltage of the FET is
Fluctuations will be suppressed.

By the way, the relationship between the insulation film thickness and the voltage Vt1t fluctuation is 10
It increases in proportion to the thickness up to about 0.000 people, but beyond that it tends to be saturated. In other words, the second insulating film 8 has 10
It is sufficient to stack the layers to a thickness of 00 Å or more, and it is hardly affected by the layers stacked after the second insulating film 8.

In this example, the first and second insulating film types are exchanged, and the film thickness is the same as the first. It is also possible to use the second laminated thickness, and in this case as well, the film stress is canceled out and the same effect as in the first embodiment is obtained.

〔Effect of the invention〕

As explained above, the present invention makes it possible to offset the stresses in both films by forming the insulating film covering the FET into a stack of film types having contradictory internal stresses of tension and compression. , a highly reliable device with suppressed characteristic fluctuations can be obtained.

[Brief explanation of drawings]

FIG. 1 is a longitudinal sectional view of a GaAs semiconductor integrated circuit device according to an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Semi-insulating GaAs substrate, 2... Ion-implanted layer of resistance part, 3... Ion-implanted layer of FET part, 4... Ion-implanted layer of diode part, 5... Heat-resistant gate electrode, 6
... Ohmic electrode, 7... First layer insulating film S i
02.8...Second layer insulating film SiN, 9...Third layer
Layer insulating film S i 02.10・-T i /P t/
Au electrode.

Claims (1)

[Claims] In a compound semiconductor device in which elements including an FET, a diode, and a resistor are integrated on a semi-insulating substrate, and an insulating film is formed on each of these elements, the insulating film is compressed against the semi-insulating substrate. A compound semiconductor device comprising a laminated layer of at least two types of films having mutually opposing internal stresses.