JPS632147B2 - - Google Patents

Info

Publication number
JPS632147B2
JPS632147B2 JP55179807A JP17980780A JPS632147B2 JP S632147 B2 JPS632147 B2 JP S632147B2 JP 55179807 A JP55179807 A JP 55179807A JP 17980780 A JP17980780 A JP 17980780A JP S632147 B2 JPS632147 B2 JP S632147B2
Authority
JP
Japan
Prior art keywords
case
sealing
base
resin powder
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55179807A
Other languages
Japanese (ja)
Other versions
JPS57103319A (en
Inventor
Toshio Matsushita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP17980780A priority Critical patent/JPS57103319A/en
Publication of JPS57103319A publication Critical patent/JPS57103319A/en
Publication of JPS632147B2 publication Critical patent/JPS632147B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • H05K3/284Applying non-metallic protective coatings for encapsulating mounted components

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Description

【発明の詳細な説明】 本発明は封着されたケースと基台との空間内に
回路素子が収容されている電子部品の気密封止方
法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for hermetically sealing an electronic component in which a circuit element is housed in a space between a sealed case and a base.

この種電子部品の一例としてDIP(デユアル・
インライン・パツケージ)形の混成集積回路があ
る。
An example of this type of electronic component is DIP (Dual
There are hybrid integrated circuits in the form of in-line packages.

これは従来第1図に示す如く、抵抗、コンデン
サ等の回路素子1を実装した混成集積回路基板2
と、リード端子3をインサートモールド成形した
樹脂体からなる基台4と、モールド成形した樹脂
体からなるケース5を備え、回路基板2をリード
端子3に半田接続して基台4上へ実装した後ケー
ス5をかぶせ、両者の接合面Aを超音波溶着によ
り封止して製作されている。
Conventionally, as shown in FIG. 1, this is a hybrid integrated circuit board 2 on which circuit elements 1 such as resistors and capacitors are mounted.
, a base 4 made of a resin body with lead terminals 3 molded by insert molding, and a case 5 made of a molded resin body, and a circuit board 2 is soldered to the lead terminals 3 and mounted on the base 4. It is manufactured by covering the rear case 5 and sealing the joint surface A between the two by ultrasonic welding.

このような電子部品においては回路基板2の良
好な電気特性を得るため耐湿性が要求されてお
り、基台4とケース5の気密封止は極めて重要な
問題である。
In such electronic components, moisture resistance is required in order to obtain good electrical characteristics of the circuit board 2, and hermetically sealing the base 4 and the case 5 is an extremely important issue.

ところで、従来ではこの気密封止手段として回
路基板2上にシリコンレジンによる塗膜6を形成
すると共にケース空間内に絶縁性のシリコンワニ
ス7を充填する方法を行なつているが、これでは
まだ気密が十分とは言えず更に気密性を高める必
要があり、且つ特に樹脂体同士の超音波溶着の場
合には特にこれを行なわなければならない。
By the way, conventionally, as this airtight sealing method, a coating film 6 of silicone resin is formed on the circuit board 2 and an insulating silicone varnish 7 is filled in the case space, but this method still does not provide airtight sealing. is not sufficient and it is necessary to further improve the airtightness, and this must be done particularly in the case of ultrasonic welding between resin bodies.

本発明はこのような問題点を解決させるもの
で、この目的は封着されたケースと基台との空間
内に回路素子が収容されている電子部品におい
て、前記封着前に前記空間内に熱硬化性樹脂粉末
を前記回路素子が埋まるように充填し、該樹脂粉
末を封着後に加熱して溶解させることにより、少
なくともこれの硬化した樹脂膜が前記ケースと前
記基台との接合部を内部から封止することを特徴
とした電子部品の気密封止方法により達成でき
る。
The present invention is intended to solve such problems, and the purpose is to provide an electronic component in which a circuit element is housed in a space between a sealed case and a base. By filling thermosetting resin powder so as to fill the circuit element and heating and melting the resin powder after sealing, at least the hardened resin film covers the joint between the case and the base. This can be achieved by a method for hermetically sealing electronic components, which is characterized by sealing from the inside.

以下、本発明の一実施例を第2図と第3図を参
照しながら詳述する。
Hereinafter, one embodiment of the present invention will be described in detail with reference to FIGS. 2 and 3.

第2,3図は本発明に係る気密封止方法を説明
するためのもので、第2図は基台4とケース5と
を超音波溶着した状態を示す部分断面図、第3図
は気密封止完成状態を示す部分断面図である。
Figures 2 and 3 are for explaining the airtight sealing method according to the present invention. Figure 2 is a partial sectional view showing the state in which the base 4 and the case 5 are ultrasonically welded, and Figure 3 is an airtight sealing method according to the present invention. FIG. 3 is a partial cross-sectional view showing a completed state of sealing.

本方法では基台4とケース5の空間内へのに充
填材が熱硬化性樹脂粉末であるエポキシ樹脂粉末
8〔例えば「F―240」(商品名)〕からなる点で
従来のシリコンワニス7と大きく異なる。尚、樹
脂粉末8の充填はケース5を第2図状態とは逆に
し開口側が上になるようにして入れ、該粉末8に
塗膜6を有する回路基板2が埋まるようケース5
に基台4をあてがい従来と同様に超音波溶着によ
り封着して行なう。
In this method, the filling material in the space between the base 4 and the case 5 is made of an epoxy resin powder 8 (for example, "F-240" (trade name)), which is a thermosetting resin powder, unlike the conventional silicone varnish 7. It is very different. When filling the resin powder 8, turn the case 5 in the opposite direction from the state shown in FIG.
The base 4 is attached to the base 4 and sealed by ultrasonic welding as in the conventional method.

次に、このように樹脂粉末8を充填し封着した
電子部品を第2図の如く接合面Aが下に位置する
ようにして、加熱炉中に入れ150℃で1時間程度
加熱させる。この工程により樹脂粉末8は溶解
し、これが硬化することによりケース内には第3
図の如く樹脂膜9が形成される。この樹脂膜9は
接合面Aを内部から封止し極めて良好な気密を実
現する。
Next, the electronic component filled with resin powder 8 and sealed is placed in a heating furnace with the bonding surface A facing downward as shown in FIG. 2, and heated at 150° C. for about one hour. Through this step, the resin powder 8 is melted, and as it hardens, a third layer is formed inside the case.
A resin film 9 is formed as shown in the figure. This resin film 9 seals the joint surface A from the inside and achieves extremely good airtightness.

尚、樹脂粉末8は回路基板2が埋まるようにケ
ース5内に充填されているため、第3図には図示
されないが、該樹脂粉末8の加熱溶解による樹脂
膜が回路基板2の表面も同時に被うようになり、
回路基板2の気密性が一層向上する効果も発揮さ
れる。
Note that since the resin powder 8 is filled in the case 5 so as to cover the circuit board 2, although not shown in FIG. 3, a resin film formed by heating and melting the resin powder 8 also forms on the surface of the circuit board 2. began to cover
The effect of further improving the airtightness of the circuit board 2 is also exhibited.

以上の本発明による気密封止方法は簡易で且つ
従来に比べ気密性が高い封止を達成でき、その効
果は著しいものである。
The hermetic sealing method according to the present invention described above is simple and can achieve sealing with higher airtightness than conventional methods, and its effects are remarkable.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の気密封止方法を説明するための
図、第2,3図は本発明の気密封止方法を説明す
るための部分断面図である 符号の説明、1…回路素子、4…基台、5…ケ
ース、8…熱硬化性樹脂粉末、9…樹脂膜。
Fig. 1 is a diagram for explaining the conventional hermetic sealing method, and Figs. 2 and 3 are partial sectional views for explaining the hermetic sealing method of the present invention. Explanation of symbols: 1...Circuit element; 4 ...Base, 5...Case, 8...Thermosetting resin powder, 9...Resin film.

Claims (1)

【特許請求の範囲】 1 封着されたケースと基台との空間内に回路素
子が収容されている電子部品において、前記封着
前に前記空間内に熱硬化性樹脂粉末を前記回路素
子が埋まるように充填し、該樹脂粉末を封着後に
加熱して溶解させることにより、少なくともこれ
の硬化した樹脂膜が前記ケースと前記基台との接
合部を内部から封止することを特徴とした電子部
品の気密封止方法。 2 前記硬化性樹脂粉末がエポキシ樹脂からなる
ことを特徴とした特許請求の範囲第1項記載の電
子部品の気密封止方法。 3 前記ケースと前記基台が樹脂成形体からな
り、且つ前記封着が超音波溶着であることを特徴
とした特許請求の範囲第1項記載の電子部品の気
密封止方法。
[Scope of Claims] 1. In an electronic component in which a circuit element is housed in a space between a sealed case and a base, a thermosetting resin powder is placed in the space before the sealing. The resin powder is filled so as to be buried in the case, and the resin powder is heated and melted after sealing, so that at least the hardened resin film seals the joint between the case and the base from the inside. Method for hermetically sealing electronic components. 2. The method for hermetically sealing an electronic component according to claim 1, wherein the curable resin powder is made of an epoxy resin. 3. The method for hermetically sealing an electronic component according to claim 1, wherein the case and the base are made of a resin molded body, and the sealing is performed by ultrasonic welding.
JP17980780A 1980-12-19 1980-12-19 Hermetically sealing method for electronic part Granted JPS57103319A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17980780A JPS57103319A (en) 1980-12-19 1980-12-19 Hermetically sealing method for electronic part

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17980780A JPS57103319A (en) 1980-12-19 1980-12-19 Hermetically sealing method for electronic part

Publications (2)

Publication Number Publication Date
JPS57103319A JPS57103319A (en) 1982-06-26
JPS632147B2 true JPS632147B2 (en) 1988-01-18

Family

ID=16072229

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17980780A Granted JPS57103319A (en) 1980-12-19 1980-12-19 Hermetically sealing method for electronic part

Country Status (1)

Country Link
JP (1) JPS57103319A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5111571A (en) * 1974-07-19 1976-01-29 Nitto Electric Ind Co Denkikairososhino patsukeejihoho

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5111571A (en) * 1974-07-19 1976-01-29 Nitto Electric Ind Co Denkikairososhino patsukeejihoho

Also Published As

Publication number Publication date
JPS57103319A (en) 1982-06-26

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