JPS61216438A - Manufacture of sealed electronic part - Google Patents

Manufacture of sealed electronic part

Info

Publication number
JPS61216438A
JPS61216438A JP60057891A JP5789185A JPS61216438A JP S61216438 A JPS61216438 A JP S61216438A JP 60057891 A JP60057891 A JP 60057891A JP 5789185 A JP5789185 A JP 5789185A JP S61216438 A JPS61216438 A JP S61216438A
Authority
JP
Japan
Prior art keywords
resin
frame
resin material
electronic part
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60057891A
Other languages
Japanese (ja)
Inventor
Toshihiko Horiuchi
敏彦 堀内
Hisao Takahashi
高橋　久生
Kenji Takahashi
健二 高橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nikon Corp
Original Assignee
Nippon Kogaku KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Kogaku KK filed Critical Nippon Kogaku KK
Priority to JP60057891A priority Critical patent/JPS61216438A/en
Publication of JPS61216438A publication Critical patent/JPS61216438A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Abstract

PURPOSE:To improve operating efficiency, and to enable automation by a method wherein an electronic part is fitted onto a substrate for a circuit, the electronic part and a conductor are connected by a conductive member, a resin frame is formed around the electronic part and the conductor and cured, and the inside of the frame is filled with a cast resin material which is later cured. CONSTITUTION:A semiconductor 1 is mounted at a predetermined position by a solder material for an alloy or a joining material 2 such as conductive adhesives on a substrate 3 for a circuit, on the surface thereof conductor patterns 4 are formed, and terminal electrodes and the conductors 4 are connected by gold wires 5. A liquefied resin material is wire-drawing applied on the outer circumference of the semiconductor element 1 and wire bonding sections for the element 1 and cured, thus shaping a resin frame 6. A fixed quantity of a resin pellet molded to a prescribed shape or a liquefied cast resin material 7 is injected into the resin frame 6, and the semiconductor element 1 and the gold wires 5 are buried and casted by the resin frame 6 and the cast resin material 7. Accordingly, operating efficiency is improved, and automation is enabled.

Description

【発明の詳細な説明】 （発明の技術分野） 本発明は、封止された電子部品例えば半導体素子の製造
方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Technical Field of the Invention) The present invention relates to a method for manufacturing encapsulated electronic components, such as semiconductor devices.

（発明の背景） ガラスニーキン樹脂基板やセラミック基板あるいは金属
板の表面を樹脂コーティングした回路用基板上に所、望
のパターンの導体を形成し、これに直接半導体素子を装
着し、かつ半導体素子の外部接続用端子電極と上記導体
とを金（Ａｕ）やアルミニウム（、Ａ　ｊ　）等の金属
細線で接続してなる半導体装置においては、半導体素子
の封止手段として樹脂ポツティング方法が一般的に用い
られている。(Background of the Invention) A conductor in a desired pattern is formed on a circuit board whose surface is resin-coated, such as a glass knee resin substrate, a ceramic substrate, or a metal plate, and a semiconductor element is directly mounted thereon. In a semiconductor device in which a terminal electrode for external connection and the above-mentioned conductor are connected with a thin metal wire such as gold (Au) or aluminum (A j ), a resin potting method is generally used as a means for sealing the semiconductor element. It is used.

しかし、上述の方法は枠体を使用しているため　　′封
止構造の小型化が限定されたり、あるいは枠体を接着し
なければならず、このため作業内容が煩わしく工数を要
し、自動化が困難であるといった問題を有している。However, since the above method uses a frame, the miniaturization of the sealing structure is limited, or the frame must be glued, which makes the work cumbersome and requires many man-hours, making automation difficult. The problem is that it is difficult.

（発明の目的） 本発明は、これらの欠点を解決した電子部品の封止方法
、換言すれば封止された電子部品の製造方法を提供する
ことを目的とする。(Objective of the Invention) An object of the present invention is to provide a method for sealing an electronic component that solves these drawbacks, in other words, a method for manufacturing a sealed electronic component.

（発明の概要） このため１本発明は、　表面に導体パターンのある回路
用基板上に電子部品を装着し、電子部品（の端子電極）
と導体とを導電部材で接続した後、その周囲に液体樹脂
材料を線引き塗布して樹脂枠を形成し、所定に硬化させ
た後、その枠内に注型樹脂材料を充填して硬化させるこ
とにより、前記電子部品を封止することを特徴とする封
止された電子部品の製造方法を提供する。(Summary of the Invention) For this reason, the present invention provides a method for mounting electronic components on a circuit board having a conductive pattern on its surface, and
After connecting the conductor and the conductor with a conductive member, a resin frame is formed by drawing a line of liquid resin material around it, and after hardening it to a specified degree, filling the molding resin material into the frame and hardening it. Accordingly, there is provided a method for manufacturing a sealed electronic component, characterized in that the electronic component is sealed.

以下、実施例により本発明を具体的に説明するが、本発
明はこれに限定されるものではない。EXAMPLES Hereinafter, the present invention will be specifically explained with reference to Examples, but the present invention is not limited thereto.

（実施例） 第１図、第２図および第３図は本発明の詳細な説明する
ための要部断面図である。(Example) FIG. 1, FIG. 2, and FIG. 3 are main part sectional views for explaining the present invention in detail.

まず第１図に示す様に表面に導体パターン４を設けた回
路用基板３上に半導体重を合金用ロウ材あるいは導電性
接着剤等の接合材料２により所定の位置に装着する。さ
らに半導体素子１の端子電極と導体４とは金線５によっ
て接続（ワイヤーボンド）される。First, as shown in FIG. 1, a semiconductor layer is mounted at a predetermined position on a circuit board 3 having a conductive pattern 4 on its surface using a bonding material 2 such as alloy brazing material or conductive adhesive. Further, the terminal electrode of the semiconductor element 1 and the conductor 4 are connected (wire bonded) by a gold wire 5.

その後、半導体素子ｌとそのワイヤボンド部分の外周に
液状樹脂材料を線引き塗布し、所定に硬化させ、樹脂枠
６を形成させる。Thereafter, a liquid resin material is drawn and applied to the outer periphery of the semiconductor element 1 and its wire bond portion, and is cured to a predetermined degree to form a resin frame 6.

さらにその半導体素子１、金線５ならびに金線５と導体
４とのワイヤーボンド部分等を樹脂封止すべ（所定形状
に成形した樹脂ペレットもしくは、液状の注型樹脂材料
７を前記樹脂枠６内に所定量だけ注入し、第３図に示す
ように樹脂枠６と注型樹脂材料７によって半導体素子１
および金線５を埋設するごとく注型する。Furthermore, the semiconductor element 1, the gold wire 5, the wire bonding portion between the gold wire 5 and the conductor 4, etc. are sealed with resin (resin pellets molded into a predetermined shape or liquid cast resin material 7 are placed inside the resin frame 6). A predetermined amount is injected into the semiconductor element 1 using the resin frame 6 and the casting resin material 7 as shown in FIG.
Then, the gold wire 5 is cast as if buried.

注型後、樹脂材料７の硬化を所定温度で所定時間行なう
ことにより半導体素子１の封止を完了し、封止された電
子部品を製造した。After casting, the resin material 7 was cured at a predetermined temperature for a predetermined time to complete the sealing of the semiconductor element 1, and a sealed electronic component was manufactured.

なお、注型樹脂材料７としては、エボキン樹脂、シリコ
ーン樹脂等が一般的に用いられることが多いが、樹脂枠
６の材料の選定に当たっては、これらの注型樹脂材料７
とぬれの悪い材料を使用すると注型樹脂材料７のあふれ
出しを防止する効果がある。特に注型樹脂材料７として
エポキシ樹脂を使用する場合、シリコーン樹脂を樹脂枠
６の材料とすると、この効果が大きい。実施例において
は、注型樹脂材料７として、液状エボキン樹脂を使用し
たので、樹脂枠６材料として熱硬化型の液状シリコーン
樹脂を採用・し、注型樹脂７のあふれ出し防止効果を高
めた。Note that Evokin resin, silicone resin, etc. are generally used as the casting resin material 7, but when selecting the material for the resin frame 6, these casting resin materials 7
Using a material with poor wettability has the effect of preventing the casting resin material 7 from overflowing. In particular, when using epoxy resin as the casting resin material 7, this effect is great if silicone resin is used as the material for the resin frame 6. In the example, since liquid Evoquin resin was used as the casting resin material 7, a thermosetting liquid silicone resin was used as the resin frame 6 material to enhance the effect of preventing the casting resin 7 from overflowing.

（発明の効果） 以上のように本発明の製造方法は、注型樹脂の流れ防止
を液状樹脂の線引き塗布によって実施するようにしたも
のであり、単体部品の枠体を使用したり、その枠体を接
着する必要がない上に、作業能率の向上ならびに自動化
を可能にする等多くの効果を有するものである。(Effects of the Invention) As described above, the manufacturing method of the present invention prevents the flow of casting resin by applying a line of liquid resin, and uses a frame of a single component or In addition to not requiring the body to be glued together, it has many effects such as improving work efficiency and enabling automation.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は、本発明の実施例における回路用基板に半導体
素子を装着し、ワイヤーボンドした状態の要部断面図で
ある。 第２図は、第１図において半導体素子の周囲に液状樹脂
を線引き塗布後、所定の硬化を行ない樹脂枠を形成した
状態の要部断面図である。 第３図は、第２図において樹脂封止した状態の要部断面
である。 〔主要部分の符号の説明〕 １−・・−・・−電子部品の一例としての半導体素子２
−・・−・−装着材　　　　　　３−・−・・・−・・
−回路用基板４−−−−−一〜−−−−導体 ５−・−・−導電部材の一例としての金線６−・−一−
−−−樹脂枠FIG. 1 is a sectional view of a main part in a state where a semiconductor element is mounted on a circuit board and wire-bonded according to an embodiment of the present invention. FIG. 2 is a cross-sectional view of a main part in a state in which a resin frame is formed by applying a line of liquid resin around the semiconductor element in FIG. FIG. 3 is a sectional view of the main part in a resin-sealed state in FIG. 2. [Explanation of symbols of main parts] 1-...-- Semiconductor element 2 as an example of electronic component
−・・−・−Attachment material 3−・−・・・−・・
- Circuit board 4 - - - Conductor 5 - - - Gold wire 6 as an example of a conductive member - - -
---Resin frame

Claims (1)

【特許請求の範囲】 １　表面に導体パターンのある回路用基板上に電子部品
を装着し、電子部品と導体とを導電部材で接続した後、
その周囲に液体樹脂材料を線引き塗布して樹脂枠を形成
し、所定に硬化させた後、その枠内に注型樹脂材料を充
填して硬化させることにより、前記電子部品を封止する
ことを特徴とする封止された電子部品の製造方法。 ２　前記液体樹脂材料がシリコーン樹脂で、前記注型樹
脂材料がエポキシ樹脂であることを特徴とする特許請求
の範囲前記第１項の製造方法。[Claims] 1. After mounting an electronic component on a circuit board having a conductive pattern on its surface and connecting the electronic component and the conductor with a conductive member,
A resin frame is formed by drawing a line of liquid resin material around it, and after it is cured to a predetermined degree, the electronic component is sealed by filling the frame with a casting resin material and curing it. A method for manufacturing encapsulated electronic components. 2. The manufacturing method according to claim 1, wherein the liquid resin material is a silicone resin, and the casting resin material is an epoxy resin.
JP60057891A 1985-03-22 1985-03-22 Manufacture of sealed electronic part Pending JPS61216438A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60057891A JPS61216438A (en) 1985-03-22 1985-03-22 Manufacture of sealed electronic part

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60057891A JPS61216438A (en) 1985-03-22 1985-03-22 Manufacture of sealed electronic part

Publications (1)

Publication Number Publication Date
JPS61216438A true JPS61216438A (en) 1986-09-26

Family

ID=13068607

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60057891A Pending JPS61216438A (en) 1985-03-22 1985-03-22 Manufacture of sealed electronic part

Country Status (1)

Country Link
JP (1) JPS61216438A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03254134A (en) * 1990-03-05 1991-11-13 Taiyo Yuden Co Ltd Resin seal of electric components
JPH04225539A (en) * 1990-12-27 1992-08-14 Seiko Instr Inc Method of manufacturing semiconductor device
JP2017224687A (en) * 2016-06-14 2017-12-21 株式会社ジェイデバイス Method for manufacturing semiconductor package

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03254134A (en) * 1990-03-05 1991-11-13 Taiyo Yuden Co Ltd Resin seal of electric components
JPH04225539A (en) * 1990-12-27 1992-08-14 Seiko Instr Inc Method of manufacturing semiconductor device
JP2017224687A (en) * 2016-06-14 2017-12-21 株式会社ジェイデバイス Method for manufacturing semiconductor package

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