JP2004158753A - Lead frame material, manufacturing method, and semiconductor device and manufacturing method - Google Patents

Lead frame material, manufacturing method, and semiconductor device and manufacturing method Download PDF

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Publication number
JP2004158753A
JP2004158753A JP2002324888A JP2002324888A JP2004158753A JP 2004158753 A JP2004158753 A JP 2004158753A JP 2002324888 A JP2002324888 A JP 2002324888A JP 2002324888 A JP2002324888 A JP 2002324888A JP 2004158753 A JP2004158753 A JP 2004158753A
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Prior art keywords
component
lead frame
manufacturing
semiconductor device
insulating material
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JP2002324888A
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Japanese (ja)
Inventor
Ryozaburo Shioda
良三郎 塩田
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Sony Corp
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Sony Corp
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Priority to JP2002324888A priority Critical patent/JP2004158753A/en
Publication of JP2004158753A publication Critical patent/JP2004158753A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor

Abstract

<P>PROBLEM TO BE SOLVED: To provide a lead frame material, on which a semiconductor element such as an IC and a peripheral circuit device for the element can be mounted and which can realize proper electrical connection, and to provide a method for manufacturing the frame material, a semiconductor device, and a method for manufacturing the semiconductor device. <P>SOLUTION: The lead frame material 1 has a component-mounting region made of an insulating substance 3, other than a die pad 2, and the method for manufacturing the frame material is also provided. A lead frame 6 has a component-mounting region made of an insulating substance 3 other than the die pad 2, a semiconductor element 12, and a passive element 11 are mounted on the frame 6. The elements are sealed with resin so as to be covered with it to form a semiconductor device 16. The method for manufacturing the semiconductor device includes the steps of preparing the body of the lead frame 6, of coating the insulating material 3 on a region other than the die pad 2 of the body of the frame 6, of mounting the semiconductor element 12 on the die pad 2, of mounting a predetermined passive element 11 on the component-mounting area, and sealing the elements with resin to cover the main body of the lead frame 6 with it. <P>COPYRIGHT: (C)2004,JPO

Description

【0001】
【発明の属する技術分野】
本発明は、リードフレーム材及びその製造方法、並びに半導体装置及びその製造方法に関するものである。
【0002】
【従来の技術】
電子機器等の電子回路は、IC(integrated circuit)等の半導体素子と、抵抗やコンデンサ等の受動部品が、プリント基板上に実装されて形成される。
【0003】
近年の電子機器への要求は、小型、軽量、高性能、高機能、低コストなどであるが、これらに付け加えて、開発設計期間の短縮も重要な課題となっている。そして、これらを満足させるために様々な工夫がなされているが、電子回路の機能ブロックを形成するICとその周辺回路部品を一体化した電子回路モジュール、いわゆるハイブリッドICやSIP(System In Package)等は、まさにこれらの要求から生み出されたものである。
【0004】
この電子回路モジュールを採用することにより、電子機器の電子回路を短期間で開発設計できるという利点がある。
【0005】
【発明が解決しようとする課題】
しかしながら、上記ハイブリッドICやSIP等は、ICや周辺回路部品を実装するためのインターポーザーと呼ばれる配線回路基板が必要であり、これには有機プリント基板やセラミックス基板等が用いられるが、最近の低コスト要求は、このインターポーザーの部品コストが無視できないものとなっている。
【0006】
そこで、図6に示すような半導体パッケージに多用されている安価なリードフレーム材20から作製される図7に示すリードフレーム28を用い、図8に示すように、リードフレーム28のダイパッド21上に半導体素子22を実装し、金属ワイヤー23を用いて半導体素子22の電極24とインナーリード部25をそれぞれ接続すると共に、インナーリード部25に抵抗やコンデンサ等の受動部品(周辺回路部品)26を実装することが望まれる。
【0007】
上記のように、リードフレーム28上に半導体素子22を実装すると共に、受動部品26もまた実装する場合、半導体素子22に接続された金属ワイヤー23は極細のため非常に弱く、ワイヤリング後に触れると変形や断線、短絡を発生させてしまうので、リードフレーム28のインナーリード部25への受動部品26の実装は、半導体素子22の実装前にすることとなる。
【0008】
しかしながら、リードフレーム28への受動部品26接続において、例えば接続材27としてはんだを用いる場合、はんだに含有されているフラックス成分がリード上を濡れ広がり、これがワイヤーボンドエリアにまで及び、良好なワイヤーボンド接続が得られない。
【0009】
また、リードフレーム28への受動部品26接続において、例えば接続材27として導電ペーストを用いると、導電ペースト自体が濡れ広がり、これがワイヤーボンドエリアにまで及び、良好なワイヤーボンド接続が得られない。
【0010】
また、はんだ又は導電ペーストの濡れ広がりにより、リード間を短絡させてしまう。
【0011】
さらに、受動部品26実装後に半導体素子22を実装するが、この半導体素子22実装時のワイヤーボンドの加熱によってはんだが再溶融し、受動部品26が位置ずれを起こす。
【0012】
本発明は、上述したような問題点を解決するためになされたものであって、その目的は、有機プリント基板やセラミックス基板等の高価なインターポーザーを使用せず、安価なリードフレーム上にIC等の半導体素子と、この半導体素子の周辺回路部品とを搭載することができ、電気回路モジュールとして良好な電気的接続が実現可能なリードフレーム材及びその製造方法、並びに半導体装置及びその製造方法を提供することにある。
【0013】
【課題を解決するための手段】
即ち、本発明は、半導体素子実装領域以外の領域に、絶縁物質からなる部品搭載領域を有する、リードフレーム材に係り、また、リードフレーム本体を作製する工程と、前記リードフレーム本体の半導体素子実装領域以外の領域に、部品搭載領域となる絶縁物質を被着する工程とを有する、リードフレーム材の製造方法に係るものである。
【0014】
また、半導体素子実装領域以外の領域に、絶縁物質からなる部品搭載領域を有し、前記半導体素子及び前記部品がリードフレーム上に実装され、これらを覆うように樹脂封止されている、半導体装置に係り、さらに、リードフレーム本体を作製する工程と、前記リードフレーム本体の半導体素子実装領域以外の領域に、部品搭載領域となる絶縁物質を被着する工程と、前記半導体素子実装領域に半導体素子を実装する工程と、前記部品搭載領域に所定の部品を実装する工程と、前記リードフレーム本体を覆うように樹脂封止する工程とを有する、半導体装置の製造方法に係るものである。
【0015】
ここで、前記部品とは、主として、前記半導体素子の周辺回路部品、即ち、抵抗、コンデンサ、インダクタ等の受動素子を意味するものである。
【0016】
本発明によれば、前記半導体素子実装領域以外の領域に、前記絶縁物質からなる前記部品搭載領域を有し、前記半導体素子が前記半導体素子実装領域に実装され、前記部品が前記絶縁物質からなる前記部品搭載領域に実装されるので、例えば前記部品の接続にはんだを用いても、従来のように、はんだに含有されているフラックス成分がリード上を濡れ広がることなく、良好なワイヤーボンド等の前記半導体素子の接続を得ることができる。
【0017】
また、例えば前記部品の接続に導電ペーストを用いた場合も、上記と同様の理由で、従来のように導電ペースト自体が濡れ広がることがなく、良好なワイヤーボンド等の前記半導体素子の接続を得ることができる。
【0018】
また、はんだ又は導電ペーストの濡れ広がりがないので、リード間の短絡を防止することができる。
【0019】
さらに、上記したように、従来はワイヤーボンドの加熱によってはんだが再溶融し、実装部品が位置ずれを起こす問題があったが、これに対し本発明は、前記部品が前記絶縁物質からなる前記部品搭載領域に実装されるので、はんだが再溶融した場合でも前記部品が位置ずれを起こすことはない。
【0020】
従って、本発明は、有機プリント基板やセラミックス基板等の高価なインターポーザーを使用せず、安価なリードフレーム上にIC等の前記半導体素子と、この半導体素子の周辺回路部品としての前記部品とを搭載することができ、電気回路モジュールとして良好な電気的接続が実現可能である。
【0021】
【発明の実施の形態】
本発明において、前記半導体素子実装領域以外の領域に、前記絶縁物質からなる前記部品搭載領域を有することが特徴的であるが、特に、前記半導体素子実装領域以外の周辺部において、前記絶縁物質に部品装入用の凹部が形成されていることが望ましい。
【0022】
具体的には、図1に本発明に基づくリードフレーム材1の概略平面図を示すように、前記半導体素子実装領域としてのダイパッド2以外の領域に、絶縁物質3からなる前記部品搭載領域を有しており、さらにダイパッド2以外の周辺部、例えばインナーリード部4において、絶縁物質3に前記部品装入用の凹部5が形成されている。ここで、凹部5の底面にインナーリード部4の一部分が露出していることが望ましく、例えば凹部5は、インナーリード部4の一部分が露出している部分5aと、前記部品の電極間の面が接する浅い部分5bとからなる。
【0023】
また、インナーリード部4を両面から挟持するように、絶縁物質3を被着することが好ましい。
【0024】
凹部5としては、前記部品としての受動素子の最大外形寸法より大きい寸法と、前記部品としての受動素子の厚み以下の深さに形成することが好ましい。これにより、前記部品としての受動素子を実装する際の位置決め精度がより向上し、従来のようなはんだ等の接続材の流れ出しをより一層防ぐことができる。
【0025】
図2は、本発明に基づくリードフレーム材及び半導体装置の製造方法の一例を工程順に示す図1のA−A’線の概略断面図である。
【0026】
まず、図示省略したが、リードフレーム6本体を作製する。リードフレーム6本体の作製方法としては、従来公知の方法がいずれも適用可能であり、アウターリード部のピッチは例えば0.4mmである。そして、図2(a)に示すように、インナーリード部4を両面から挟持するように、上型7及び下型8を配し、成形空間(キャビティ)9を形成する。このとき、上記の凹部5を形成するための凸部を上型7に予め形成しておく。
【0027】
そして、成形空間9に絶縁物質3を注入し、これを硬化して上型7及び下型8を外すことによって、図2(b)に示すように、リードフレーム6本体のダイパッド(図示省略)以外の領域に、インナーリード部4を両面から挟持するように、前記部品搭載領域となる絶縁物質3を被着して成形することができる。また、この成形と同時に、前記半導体素子実装領域以外の周辺部において、絶縁物質3に部品装入用の凹部5を形成し、凹部5の底面にインナーリード部4の一部分を露出させる。また、絶縁物質3としては、後の工程に使用するモールド樹脂と馴染みの良い材質、例えばエポキシ樹脂等を用いることができる。
【0028】
なお、凹部5は、前記部品としての受動素子の最大外形寸法より大きい寸法と、前記部品としての受動素子の厚み以下の深さに形成することが好ましい。
【0029】
次に、図2(c)に示すように、凹部5に接続材10を付着させる。接続材10としては、後の工程において、前記部品としての受動素子をインナーリード部4に接続固定する時に流動性のある、例えばはんだ等のペースト状の導電性材料を用いることが好ましい。そして、図2(d)に示すように、導電性接続材10を介して、凹部5の底面のインナーリード部4露出域において、前記部品としての受動素子11をインナーリード部4に接続固定する。
【0030】
上記のようにして絶縁物質3の凹部5に受動素子11を接続固定後、図3に本発明に基づく半導体装置の概略平面図を示すように、ダイパッド2上に半導体素子12を圧着して貼り付け(マウント)、金属ワイヤー13を用いてインナーリード部4と半導体素子12の電極14をそれぞれ接続(ボンディング)する。ここで、半導体素子12のマウントの方法としては、ダイパッド2上に半球状の銀ペーストをポッティングする樹脂マウント法等の従来公知の方法がいずれも適用可能である。また、インナーリード部4と、半導体素子12の電極14との金属ワイヤー13による接続(ボンディング)方法についても、従来公知の方法がいずれも適用可能である。
【0031】
そして、半導体素子12及び受動素子11が実装されたリードフレーム6を覆うよう、モールド樹脂15を用いて樹脂封止することによって、図4に示すような本発明に基づく半導体装置16を製造することができる。
【0032】
本発明に基づく半導体装置16は、上記のようにして、前記半導体素子実装領域としてのダイパッド2以外の領域、例えばインナーリード部4に、絶縁物質3からなる前記部品搭載領域を有し、また絶縁物質3に受動素子11装入用の凹部5が形成され、半導体素子12が前記半導体素子実装領域としてのダイパッド2に実装されると共に、前記部品としての受動素子11が、絶縁物質3からなる前記部品搭載領域に形成されかつ底面にインナーリード部4の一部分が露出している凹部5に接続固定されるので、受動素子11を接続固定する際の位置決め精度がより向上する。
【0033】
また、例えば受動素子11の接続材10としてはんだを用いても、従来のように、はんだに含有されているフラックス成分がリード上を濡れ広がることなく、より良好なワイヤーボンド等の半導体素子12の接続を得ることができる。
【0034】
また、例えば受動素子11の接続材10として導電ペーストを用いた場合も、上記と同様の理由で、従来のように導電ペースト自体が濡れ広がることがなく、より良好なワイヤーボンド等の半導体素子12の接続を得ることができる。
【0035】
また、接続材10としてのはんだ又は導電ペースト等の導電性材料の濡れ広がりがないので、リード間の短絡を防止することができる。
【0036】
さらに、半導体素子12実装時において、例えばワイヤーボンドの加熱によってはんだが再溶融しても、本発明に基づく半導体装置16は、前記部品としての受動素子11が絶縁物質3からなる前記部品搭載領域の凹部5に接続固定されるので、受動素子11が位置ずれを起こすことはない。
【0037】
従って、本発明に基づくリードフレーム材1及び半導体装置16は、有機プリント基板やセラミックス基板等の高価なインターポーザーを使用せず、安価なリードフレーム6上にIC等の半導体素子12と、この半導体素子12の周辺回路部品としての受動素子11とを搭載することができ、電気回路モジュールとしてより一層良好な電気的接続が実現可能である。
【0038】
ここで、上記に金属ワイヤー13を用いて半導体素子12の電極14と、インナーリード部4とをそれぞれ接続する例を示したが、本発明に基づく半導体装置16の製造方法によれば、上述した以外にも、例えば図5に示すように、フェイスダウン方式によるビームリード接続も可能である。
【0039】
この場合、例えば図5(a)に示すように、ポリイミドからなる基板17上にリードフレーム6を固定し、前記部品としての受動素子11を実装する箇所に凹部5を有する絶縁物質3を被着して、凹部5に導電性接続材10を付着させる。
【0040】
そして、図5(b)に示すように、導電性接続材10を介して絶縁物質3の凹部5に受動素子11をはんだ10で接続固定し、また半導体素子12の電極14とリードフレーム6とを圧着接続することができる。
【0041】
また、上記にインナーリード部4を両面から挟持するように上型7及び下型8を配して凹部5と共に絶縁物質3を成形したが、成形空間9に絶縁物質3を注入して成形した後、凹部5を後加工で形成してもよい。
【0042】
さらに、本発明に基づく半導体装置16は、アウターリード部19を介して実装基板(マザーボード)などに電気的に接続することができるが、例えばアウターリード部19は設けず、モールド樹脂15に凹部を形成して、この凹部の底面にインナーリード部4の一部分を露出させ、はんだ等を用いてリードレスで実装基板上に、本発明に基づく半導体装置16を実装することも可能である。
【0043】
【発明の作用効果】
本発明によれば、前記半導体素子実装領域以外の領域に、前記絶縁物質からなる前記部品搭載領域を有し、前記半導体素子が前記半導体素子実装領域に実装され、前記部品が前記絶縁物質からなる前記部品搭載領域に実装されるので、例えば前記部品の接続にはんだを用いても、従来のように、はんだに含有されているフラックス成分がリード上を濡れ広がることなく、良好なワイヤーボンド等の前記半導体素子の接続を得ることができる。
【0044】
また、例えば前記部品の接続に導電ペーストを用いた場合も、上記と同様の理由で、従来のように導電ペースト自体が濡れ広がることがなく、良好なワイヤーボンド等の前記半導体素子の接続を得ることができる。
【0045】
また、はんだ又は導電ペーストの濡れ広がりがないので、リード間の短絡を防止することができる。
【0046】
さらに、前記半導体素子実装時の例えばワイヤーボンドの加熱によってはんだが再溶融しても、前記部品が前記絶縁物質からなる前記部品搭載領域に実装されるので、前記部品が位置ずれを起こすことはない。
【0047】
従って、本発明は、有機プリント基板やセラミックス基板等の高価なインターポーザーを使用せず、安価なリードフレーム上にIC等の前記半導体素子と、この半導体素子の周辺回路部品としての前記部品とを搭載することができ、電気回路モジュールとして良好な電気的接続が実現可能である。また、保護としての前記樹脂封止は、従来の半導体パッケージで一般的に用いられるトランスファーモールドが可能であるので、ハイブリッドICやSIPと同様の機能モジュールを、低コストの樹脂封止半導体パッケージで実現することができる。
【図面の簡単な説明】
【図1】本発明の実施の形態による、リードフレーム材の概略平面図である。
【図2】同、リードフレーム材及び半導体装置の製造方法の一例を工程順に示す概略断面図である。
【図3】同、半導体装置の概略平面図である。
【図4】同、半導体装置の概略断面図である。
【図5】本発明の他の実施の形態による、半導体装置の製造方法の概略断面図である。
【図6】従来例による、リードフレーム材の概略平面図である。
【図7】同、リードフレームの一部分拡大概略平面図である。
【図8】同、半導体装置の概略平面図である。
【符号の説明】
1…リードフレーム材、2…ダイパッド、3…絶縁物質、
4…インナーリード部、5…凹部、6…リードフレーム、7…上型、8…下型、
9…成形空間、10…接続材、11…受動素子、12…半導体素子、
13…金属ワイヤー、14…電極、15…モールド樹脂、16…半導体装置、
17…ポリイミド基板、18…はんだ、19…アウターリード部
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a lead frame material and a method for manufacturing the same, and a semiconductor device and a method for manufacturing the same.
[0002]
[Prior art]
An electronic circuit such as an electronic device is formed by mounting a semiconductor element such as an integrated circuit (IC) and passive components such as a resistor and a capacitor on a printed circuit board.
[0003]
In recent years, demands for electronic devices include small size, light weight, high performance, high functionality, and low cost. In addition to these, shortening the development and design period is also an important issue. Various attempts have been made to satisfy these requirements, but an electronic circuit module in which an IC that forms a functional block of an electronic circuit and its peripheral circuit components are integrated, a so-called hybrid IC, SIP (System In Package), or the like. Is exactly the result of these requirements.
[0004]
Adopting this electronic circuit module has the advantage that the electronic circuit of the electronic device can be developed and designed in a short time.
[0005]
[Problems to be solved by the invention]
However, the above-described hybrid IC and SIP require a printed circuit board called an interposer for mounting the IC and peripheral circuit components. For this, an organic printed board or a ceramic substrate is used. Cost requirements are such that the component cost of this interposer cannot be ignored.
[0006]
Then, using a lead frame 28 shown in FIG. 7 made from an inexpensive lead frame material 20 frequently used for a semiconductor package as shown in FIG. 6, the lead frame 28 is mounted on the die pad 21 of the lead frame 28 as shown in FIG. The semiconductor element 22 is mounted, the electrode 24 of the semiconductor element 22 is connected to the inner lead portion 25 using a metal wire 23, and a passive component (peripheral circuit component) 26 such as a resistor or a capacitor is mounted on the inner lead portion 25. It is desired to do.
[0007]
As described above, when the semiconductor element 22 is mounted on the lead frame 28 and the passive component 26 is also mounted, the metal wire 23 connected to the semiconductor element 22 is extremely weak because it is extremely thin, and is deformed when touched after wiring. Therefore, the passive component 26 is mounted on the inner lead portion 25 of the lead frame 28 before the semiconductor element 22 is mounted.
[0008]
However, in the connection of the passive component 26 to the lead frame 28, for example, when solder is used as the connection material 27, the flux component contained in the solder wets and spreads on the lead, and this spreads to the wire bond area, and a good wire bond area is formed. No connection.
[0009]
Further, in the connection of the passive component 26 to the lead frame 28, for example, if a conductive paste is used as the connecting material 27, the conductive paste itself spreads and spreads to the wire bond area, and good wire bond connection cannot be obtained.
[0010]
In addition, a short circuit occurs between the leads due to the spread of the solder or the conductive paste.
[0011]
Further, the semiconductor element 22 is mounted after the passive component 26 is mounted. However, the solder is re-melted due to the heating of the wire bond when the semiconductor component 22 is mounted, and the passive component 26 is displaced.
[0012]
SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and an object of the present invention is to use an IC on an inexpensive lead frame without using an expensive interposer such as an organic printed circuit board or a ceramic substrate. And a method for manufacturing the same, and a method for manufacturing the same, and a semiconductor device and a method for manufacturing the same. To provide.
[0013]
[Means for Solving the Problems]
That is, the present invention relates to a lead frame material having a component mounting area made of an insulating material in an area other than a semiconductor element mounting area, and a step of manufacturing a lead frame main body, and mounting the semiconductor element on the lead frame main body. Applying an insulating material to be a component mounting area to a region other than the region.
[0014]
A semiconductor device having a component mounting region made of an insulating material in a region other than the semiconductor device mounting region, wherein the semiconductor element and the component are mounted on a lead frame and sealed with a resin so as to cover these components. In addition, a step of manufacturing a lead frame main body, a step of applying an insulating material serving as a component mounting area to an area other than the semiconductor element mounting area of the lead frame main body, and a step of forming a semiconductor element in the semiconductor element mounting area And mounting a predetermined component on the component mounting area, and sealing with resin so as to cover the lead frame body.
[0015]
Here, the components mainly mean peripheral circuit components of the semiconductor element, that is, passive elements such as resistors, capacitors, and inductors.
[0016]
According to the present invention, the component mounting area made of the insulating material is provided in an area other than the semiconductor element mounting area, the semiconductor element is mounted in the semiconductor element mounting area, and the component is made of the insulating material. Since it is mounted in the component mounting area, for example, even if solder is used to connect the component, the flux component contained in the solder does not wet and spread on the lead, as in the related art, such as a good wire bond. The connection of the semiconductor element can be obtained.
[0017]
Also, for example, when a conductive paste is used to connect the components, the conductive paste itself does not spread and wet as in the related art, and a good connection of the semiconductor element such as a wire bond is obtained for the same reason as described above. be able to.
[0018]
Further, since there is no spread of the solder or the conductive paste, a short circuit between the leads can be prevented.
[0019]
Furthermore, as described above, conventionally, there was a problem that the solder was re-melted due to the heating of the wire bond and the mounted component was displaced. On the other hand, the present invention relates to the component in which the component is made of the insulating material. Since the components are mounted in the mounting area, the components do not shift even if the solder is re-melted.
[0020]
Therefore, the present invention does not use an expensive interposer such as an organic printed circuit board or a ceramics substrate, and uses a semiconductor element such as an IC on an inexpensive lead frame and the component as a peripheral circuit part of the semiconductor element. It can be mounted, and good electrical connection can be realized as an electric circuit module.
[0021]
BEST MODE FOR CARRYING OUT THE INVENTION
In the present invention, it is characteristic that the component mounting region made of the insulating material is provided in a region other than the semiconductor element mounting region. It is desirable that a concave portion for mounting components is formed.
[0022]
More specifically, as shown in FIG. 1, a schematic plan view of a lead frame material 1 according to the present invention has the component mounting area made of an insulating material 3 in a region other than the die pad 2 as the semiconductor element mounting region. Further, in a peripheral portion other than the die pad 2, for example, in the inner lead portion 4, the insulating material 3 is formed with the concave portion 5 for charging the component. Here, it is desirable that a part of the inner lead portion 4 is exposed on the bottom surface of the concave portion 5. For example, the concave portion 5 is a portion between the portion 5 a where the inner lead portion 4 is exposed and the surface between the electrodes of the component. And a shallow portion 5b in contact with it.
[0023]
Further, it is preferable to apply the insulating material 3 so as to sandwich the inner lead portion 4 from both sides.
[0024]
The recess 5 is preferably formed to have a size larger than the maximum external dimension of the passive element as the component and a depth equal to or less than the thickness of the passive element as the component. Thereby, the positioning accuracy when mounting the passive element as the component is further improved, and it is possible to further prevent the outflow of the connecting material such as the solder as in the related art.
[0025]
FIG. 2 is a schematic cross-sectional view taken along line AA ′ of FIG. 1 showing an example of a method of manufacturing a lead frame material and a semiconductor device according to the present invention in the order of steps.
[0026]
First, although not shown, a lead frame 6 main body is manufactured. As a method for manufacturing the lead frame 6 main body, any conventionally known method can be applied, and the pitch of the outer lead portions is, for example, 0.4 mm. Then, as shown in FIG. 2A, the upper die 7 and the lower die 8 are arranged so as to sandwich the inner lead portion 4 from both sides, and a molding space (cavity) 9 is formed. At this time, a convex portion for forming the concave portion 5 is formed in the upper die 7 in advance.
[0027]
Then, the insulating material 3 is injected into the molding space 9 and is cured to remove the upper die 7 and the lower die 8, thereby forming a die pad (not shown) on the main body of the lead frame 6 as shown in FIG. The insulating material 3 serving as the component mounting area can be applied to a region other than the region so as to sandwich the inner lead portion 4 from both sides, and can be formed. Simultaneously with this molding, a concave portion 5 for mounting components is formed in the insulating material 3 in a peripheral portion other than the semiconductor element mounting region, and a part of the inner lead portion 4 is exposed on the bottom surface of the concave portion 5. Further, as the insulating material 3, a material that is familiar with the mold resin used in the subsequent process, such as an epoxy resin, can be used.
[0028]
The recess 5 is preferably formed to have a size larger than the maximum outer dimension of the passive element as the component and a depth equal to or less than the thickness of the passive element as the component.
[0029]
Next, as shown in FIG. 2C, the connecting material 10 is attached to the recess 5. As the connecting material 10, it is preferable to use a paste-like conductive material such as solder, which is fluid when connecting and fixing the passive element as the component to the inner lead portion 4 in a later step. Then, as shown in FIG. 2D, the passive element 11 as the component is connected and fixed to the inner lead portion 4 via the conductive connecting material 10 in the exposed region of the inner lead portion 4 on the bottom surface of the concave portion 5. .
[0030]
After connecting and fixing the passive element 11 to the recess 5 of the insulating material 3 as described above, as shown in a schematic plan view of the semiconductor device according to the present invention in FIG. Attachment (mount), and the inner lead portion 4 and the electrode 14 of the semiconductor element 12 are connected (bonded) using the metal wire 13. Here, as a method for mounting the semiconductor element 12, any conventionally known method such as a resin mounting method of potting a hemispherical silver paste on the die pad 2 can be applied. In addition, as for a method of connecting (bonding) the inner lead portion 4 and the electrode 14 of the semiconductor element 12 with the metal wire 13, any conventionally known method can be applied.
[0031]
Then, a semiconductor device 16 based on the present invention as shown in FIG. 4 is manufactured by resin-sealing with a mold resin 15 so as to cover the lead frame 6 on which the semiconductor element 12 and the passive element 11 are mounted. Can be.
[0032]
As described above, the semiconductor device 16 according to the present invention has the component mounting region made of the insulating material 3 in a region other than the die pad 2 as the semiconductor element mounting region, for example, in the inner lead portion 4, A recess 5 for mounting the passive element 11 is formed in the material 3, the semiconductor element 12 is mounted on the die pad 2 as the semiconductor element mounting area, and the passive element 11 as the component is formed of the insulating material 3. Since the passive element 11 is connected and fixed to the concave portion 5 formed in the component mounting area and partially exposing the inner lead portion 4 on the bottom surface, the positioning accuracy when connecting and fixing the passive element 11 is further improved.
[0033]
Further, for example, even if solder is used as the connection material 10 of the passive element 11, the flux component contained in the solder does not spread on the lead as in the conventional case, and the semiconductor element 12 such as a wire bond can be formed more favorably. You can get a connection.
[0034]
Also, for example, when a conductive paste is used as the connection material 10 of the passive element 11, for the same reason as described above, the conductive paste itself does not wet and spread as in the related art, and a better semiconductor element 12 such as a wire bond is used. Connection can be obtained.
[0035]
In addition, since there is no spread of the conductive material such as solder or conductive paste as the connecting material 10, a short circuit between the leads can be prevented.
[0036]
Further, when the semiconductor element 12 is mounted, even if the solder is re-melted due to, for example, the heating of the wire bond, the semiconductor device 16 according to the present invention provides the passive element 11 as the component in the component mounting region formed of the insulating material 3. Since the passive element 11 is connected and fixed to the recess 5, the passive element 11 does not shift.
[0037]
Therefore, the lead frame material 1 and the semiconductor device 16 according to the present invention do not use an expensive interposer such as an organic printed circuit board or a ceramics substrate, and the semiconductor element 12 such as an IC and the like on the inexpensive lead frame 6. The passive element 11 as a peripheral circuit component of the element 12 can be mounted, and a better electrical connection as an electric circuit module can be realized.
[0038]
Here, the example in which the electrode 14 of the semiconductor element 12 is connected to the inner lead portion 4 using the metal wire 13 has been described above. However, according to the method of manufacturing the semiconductor device 16 according to the present invention, the above description is given. In addition to the above, for example, as shown in FIG. 5, beam lead connection by a face-down method is also possible.
[0039]
In this case, for example, as shown in FIG. 5A, a lead frame 6 is fixed on a substrate 17 made of polyimide, and an insulating material 3 having a concave portion 5 is applied to a place where the passive element 11 as the component is mounted. Then, the conductive connecting material 10 is attached to the recess 5.
[0040]
Then, as shown in FIG. 5B, the passive element 11 is connected and fixed to the concave portion 5 of the insulating material 3 with the solder 10 via the conductive connecting material 10, and the electrode 14 of the semiconductor element 12 and the lead frame 6 are connected. Can be crimped.
[0041]
In addition, the insulating material 3 was molded together with the concave portion 5 by disposing the upper die 7 and the lower die 8 so as to sandwich the inner lead portion 4 from both sides, but the insulating material 3 was injected into the molding space 9 and molded. Thereafter, the recess 5 may be formed by post-processing.
[0042]
Further, the semiconductor device 16 according to the present invention can be electrically connected to a mounting board (mother board) or the like via the outer lead portion 19. However, for example, the outer lead portion 19 is not provided. The semiconductor device 16 according to the present invention can be mounted on a mounting substrate in a leadless manner using solder or the like, by exposing a portion of the inner lead portion 4 to the bottom surface of the concave portion.
[0043]
Operation and Effect of the Invention
According to the present invention, the component mounting area made of the insulating material is provided in an area other than the semiconductor element mounting area, the semiconductor element is mounted in the semiconductor element mounting area, and the component is made of the insulating material. Since it is mounted in the component mounting area, for example, even if solder is used to connect the component, the flux component contained in the solder does not wet and spread on the lead, as in the related art, such as a good wire bond. The connection of the semiconductor element can be obtained.
[0044]
Also, for example, when a conductive paste is used to connect the components, the conductive paste itself does not spread and wet as in the related art, and a good connection of the semiconductor element such as a wire bond is obtained for the same reason as described above. be able to.
[0045]
Further, since there is no spread of the solder or the conductive paste, a short circuit between the leads can be prevented.
[0046]
Furthermore, even if the solder is re-melted due to, for example, heating of the wire bond at the time of mounting the semiconductor element, the component is mounted on the component mounting region made of the insulating material, so that the component does not shift. .
[0047]
Therefore, the present invention does not use an expensive interposer such as an organic printed circuit board or a ceramics substrate, and uses a semiconductor element such as an IC on an inexpensive lead frame and the component as a peripheral circuit part of the semiconductor element. It can be mounted, and good electrical connection can be realized as an electric circuit module. In addition, since the resin encapsulation as protection can be performed by transfer molding generally used in conventional semiconductor packages, a functional module similar to a hybrid IC or SIP can be realized in a low-cost resin-encapsulated semiconductor package. can do.
[Brief description of the drawings]
FIG. 1 is a schematic plan view of a lead frame material according to an embodiment of the present invention.
FIG. 2 is a schematic cross-sectional view showing an example of a method for manufacturing a lead frame material and a semiconductor device in the order of steps.
FIG. 3 is a schematic plan view of the same semiconductor device.
FIG. 4 is a schematic sectional view of the same semiconductor device.
FIG. 5 is a schematic sectional view of a method for manufacturing a semiconductor device according to another embodiment of the present invention.
FIG. 6 is a schematic plan view of a lead frame material according to a conventional example.
FIG. 7 is a partially enlarged schematic plan view of the lead frame.
FIG. 8 is a schematic plan view of the same semiconductor device.
[Explanation of symbols]
1. Lead frame material 2. Die pad 3. Insulating material
4 inner lead portion, 5 recess, 6 lead frame, 7 upper die, 8 lower die,
9: molding space, 10: connecting material, 11: passive element, 12: semiconductor element,
13 ... metal wire, 14 ... electrode, 15 ... mold resin, 16 ... semiconductor device,
17: polyimide substrate, 18: solder, 19: outer lead part

Claims (27)

半導体素子実装領域以外の領域に、絶縁物質からなる部品搭載領域を有する、リードフレーム材。A lead frame material having a component mounting area made of an insulating material in an area other than a semiconductor element mounting area. 前記半導体素子実装領域以外の周辺部において、前記絶縁物質に部品装入用の凹部が形成されている、請求項1に記載したリードフレーム材。2. The lead frame material according to claim 1, wherein a concave portion for mounting components is formed in the insulating material in a peripheral portion other than the semiconductor element mounting region. 3. 前記凹部が、前記部品の最大外形寸法より大きい寸法と、前記部品の厚み以下の深さに形成されている、請求項2に記載したリードフレーム材。The lead frame material according to claim 2, wherein the recess is formed with a size larger than a maximum outer dimension of the component and a depth equal to or less than a thickness of the component. インナーリード部に前記絶縁物質が被着され、この絶縁物質に前記凹部が形成され、前記凹部の底面に前記インナーリード部の一部分が露出しており、この露出域において前記部品が前記インナーリード部に接続固定される、請求項2に記載したリードフレーム材。The insulating material is applied to the inner lead portion, the concave portion is formed in the insulating material, and a part of the inner lead portion is exposed on the bottom surface of the concave portion. The lead frame material according to claim 2, which is connected and fixed to the lead frame member. 前記絶縁物質が、前記インナーリード部を両面から挟持している、請求項4に記載したリードフレーム材。The lead frame material according to claim 4, wherein the insulating material sandwiches the inner lead portion from both sides. 前記半導体素子及び前記部品がリードフレーム上に実装され、これらを覆うよう樹脂封止される、請求項1に記載したリードフレーム材。The lead frame material according to claim 1, wherein the semiconductor element and the component are mounted on a lead frame, and are sealed with a resin so as to cover them. 前記部品が受動素子である、請求項1に記載したリードフレーム材。The lead frame material according to claim 1, wherein the component is a passive element. 半導体素子実装領域以外の領域に、絶縁物質からなる部品搭載領域を有し、前記半導体素子及び前記部品がリードフレーム上に実装され、これらを覆うように樹脂封止されている、半導体装置。A semiconductor device having a component mounting area made of an insulating material in an area other than a semiconductor element mounting area, wherein the semiconductor element and the component are mounted on a lead frame and sealed with a resin so as to cover them. 前記半導体素子実装領域以外の周辺部において、前記絶縁物質に部品装入用の凹部が形成されている、請求項8に記載した半導体装置。9. The semiconductor device according to claim 8, wherein a concave portion for mounting a component is formed in the insulating material in a peripheral portion other than the semiconductor element mounting region. 前記凹部が、前記部品の最大外形寸法より大きい寸法と、前記部品の厚み以下の深さに形成されている、請求項9に記載した半導体装置。The semiconductor device according to claim 9, wherein the recess is formed with a size larger than a maximum outer dimension of the component and a depth equal to or less than a thickness of the component. インナーリード部に前記絶縁物質が被着され、この絶縁物質に前記凹部が形成され、前記凹部の底面に前記インナーリード部の一部分が露出しており、この露出域において前記部品が前記インナーリード部に接続固定されている、請求項9に記載した半導体装置。The insulating material is applied to the inner lead portion, the concave portion is formed in the insulating material, and a part of the inner lead portion is exposed on the bottom surface of the concave portion. The semiconductor device according to claim 9, wherein the semiconductor device is fixedly connected to the semiconductor device. 前記接続固定が、接続時に流動性のある導電性材料によって行われている、請求項11に記載した半導体装置。The semiconductor device according to claim 11, wherein the connection is fixed by a conductive material having fluidity at the time of connection. 前記絶縁物質が、前記インナーリード部を両面から挟持している、請求項11に記載した半導体装置。The semiconductor device according to claim 11, wherein the insulating material sandwiches the inner lead portion from both sides. 前記部品が受動素子である、請求項8に記載した半導体装置。9. The semiconductor device according to claim 8, wherein said component is a passive element. リードフレーム本体を作製する工程と、前記リードフレーム本体の半導体素子実装領域以外の領域に、部品搭載領域となる絶縁物質を被着する工程とを有する、リードフレーム材の製造方法。A method for manufacturing a lead frame material, comprising: a step of manufacturing a lead frame main body; and a step of applying an insulating material to be a component mounting area to a region other than a semiconductor element mounting region of the lead frame main body. 前記半導体素子実装領域以外の周辺部において、前記絶縁物質に部品装入用の凹部を形成する、請求項15に記載したリードフレーム材の製造方法。16. The method for manufacturing a lead frame material according to claim 15, wherein a concave portion for mounting components is formed in the insulating material in a peripheral portion other than the semiconductor element mounting region. 前記凹部を、前記部品の最大外形寸法より大きい寸法と、前記部品の厚み以下の深さに形成する、請求項16に記載したリードフレーム材の製造方法。17. The method for manufacturing a lead frame material according to claim 16, wherein the concave portion is formed to have a size larger than a maximum outer dimension of the component and a depth equal to or less than a thickness of the component. 前記凹部の底面にインナーリード部の一部分が露出するように、成形によって前記インナーリード部に前記凹部を有する前記絶縁物質を被着する、請求項16に記載したリードフレーム材の製造方法。17. The method for manufacturing a lead frame material according to claim 16, wherein the insulating material having the concave portion is applied to the inner lead portion by molding so that a part of the inner lead portion is exposed on the bottom surface of the concave portion. 前記インナーリード部を両面から挟持するように、前記絶縁物質を被着する、請求項18に記載したリードフレーム材の製造方法。The method for manufacturing a lead frame material according to claim 18, wherein the insulating material is applied so as to sandwich the inner lead portion from both sides. 前記部品を受動素子とする、請求項15に記載したリードフレーム材の製造方法。The method for manufacturing a lead frame material according to claim 15, wherein the component is a passive element. リードフレーム本体を作製する工程と、前記リードフレーム本体の半導体素子実装領域以外の領域に、部品搭載領域となる絶縁物質を被着する工程と、前記半導体素子実装領域に半導体素子を実装する工程と、前記部品搭載領域に所定の部品を実装する工程と、前記リードフレーム本体を覆うように樹脂封止する工程とを有する、半導体装置の製造方法。A step of manufacturing a lead frame main body, a step of applying an insulating material to be a component mounting area to an area other than the semiconductor element mounting area of the lead frame main body, and a step of mounting a semiconductor element in the semiconductor element mounting area. A method of manufacturing a semiconductor device, comprising: mounting a predetermined component on the component mounting region; and sealing the resin so as to cover the lead frame body. 前記半導体素子実装領域以外の周辺部において、前記絶縁物質に部品装入用の凹部を形成する、請求項21に記載した半導体装置の製造方法。22. The method of manufacturing a semiconductor device according to claim 21, wherein a concave portion for mounting a component is formed in the insulating material in a peripheral portion other than the semiconductor element mounting region. 前記凹部を、前記部品の最大外形寸法より大きい寸法と、前記部品の厚み以下の深さに形成する、請求項22に記載した半導体装置の製造方法。23. The method of manufacturing a semiconductor device according to claim 22, wherein the recess is formed to have a size larger than a maximum outer dimension of the component and a depth equal to or less than a thickness of the component. 前記凹部の底面にインナーリード部の一部分が露出するように、成形によって前記インナーリード部に前記凹部を有する前記絶縁物質を被着し、この露出域において前記部品を前記インナーリード部に接続固定する、請求項22に記載した半導体装置の製造方法。The insulating material having the concave portion is applied to the inner lead portion by molding so that a part of the inner lead portion is exposed on the bottom surface of the concave portion, and the component is connected and fixed to the inner lead portion in the exposed area. A method of manufacturing a semiconductor device according to claim 22. 前記接続固定を、接続時に流動性のある導電性材料によって行う、請求項24に記載した半導体装置の製造方法。The method of manufacturing a semiconductor device according to claim 24, wherein the connection is fixed by a conductive material having fluidity at the time of connection. 前記インナーリード部を両面から挟持するように、前記絶縁物質を被着する、請求項24に記載した半導体装置の製造方法。The method of manufacturing a semiconductor device according to claim 24, wherein the insulating material is applied so as to sandwich the inner lead portion from both sides. 前記部品を受動素子とする、請求項21に記載した半導体装置の製造方法。22. The method according to claim 21, wherein the component is a passive element.
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