JPS63207161A - Manufacture of resin sealed type semiconductor device - Google Patents

Manufacture of resin sealed type semiconductor device

Info

Publication number
JPS63207161A
JPS63207161A JP3904287A JP3904287A JPS63207161A JP S63207161 A JPS63207161 A JP S63207161A JP 3904287 A JP3904287 A JP 3904287A JP 3904287 A JP3904287 A JP 3904287A JP S63207161 A JPS63207161 A JP S63207161A
Authority
JP
Japan
Prior art keywords
reinforcing
lead frame
semiconductor device
resin
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3904287A
Other languages
Japanese (ja)
Inventor
Masanori Miyoshi
雅則 三好
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP3904287A priority Critical patent/JPS63207161A/en
Publication of JPS63207161A publication Critical patent/JPS63207161A/en
Pending legal-status Critical Current

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Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To improve the effect of heat dissipation at low cost by exposing a reinforcing body outside a sealing resin layer. CONSTITUTION:A technique in which reinforcing bands, tie bars 3, tying the opposed frame bodies of a lead frame 1 for DIP (Dual In-line Package) are exposed outside a sealing resin layer 10 into which a semiconductor element 8 is buried. Consequently, the fabrication of the reinforcing bands 3 is executed at the same time as lead machining in a Cut and Bend process in the final process of the lead frame 1 utilized for the assembly process of the semiconductor element 8, and the reinforcing bands 3 which have been discarded in the Cut and Bend process are applied. Accordingly, the effect of heat dissipation can be improved at low cost without increasing manhours.

Description

【発明の詳細な説明】 〈発明の目的〉 (産業上の利用分野) 本発明は、樹脂封止型半導体装置におけるり−ドフレー
ム一体形の放熱フィンの改良に関するものである。
DETAILED DESCRIPTION OF THE INVENTION <Object of the Invention> (Industrial Field of Application) The present invention relates to an improvement in a radiation fin integrated with a lead frame in a resin-sealed semiconductor device.

(従来の技術) 従来から半導体素子の組立工程にはリードフレームを利
用する方式が広〈実施されており、このリードフレーム
にも個別半導体素子が主な対象となるSIP(Sing
le In1ine Package)タイプと、集積
回路素子などのようにピン数の多いものを対象とするD
IP(Dual In1ine Package)型な
らびにいわゆる合掌型タイプ等が知られている。これら
のリードフレームは導電性金属であるAQ、 Cu、 
Feならびにそれらの合金からなる板体をプレスもしく
は食刻工程で形成し、これを利用して半導体素子の組立
工程を実施する。一方、半導体素子にあっては、その高
機能化に伴って発熱量が増すに従って効果的な熱放散が
注目されており、リードフレームにも種々の改良が施さ
れている。特開昭55−133558号公報にはセラミ
ックDIPパッケージを適用する半導体ICに対して、
チップ接続体から導熱体を介して外部に延びる冷却片を
設け、更に封止部の導熱体を開孔しておいて、放熱効果
と気密性を改善する技術が開示されている。
(Prior art) The use of lead frames has been widely used in the assembly process of semiconductor elements, and these lead frames are also used in SIP (Singing), which is mainly used for individual semiconductor elements.
LE In1ine Package) type, and D type, which targets devices with a large number of pins such as integrated circuit elements.
IP (Dual Inline Package) type and so-called gassho type are known. These lead frames are made of conductive metals such as AQ, Cu,
A plate made of Fe or an alloy thereof is formed by a pressing or etching process, and is used to perform a semiconductor device assembly process. On the other hand, effective heat dissipation is attracting attention as semiconductor elements generate more heat as they become more sophisticated, and various improvements have been made to lead frames. JP-A-55-133558 discloses a semiconductor IC using a ceramic DIP package.
A technique has been disclosed in which a cooling piece is provided that extends from the chip connector to the outside via a heat conductor, and the heat conductor of the sealing portion is further provided with holes to improve the heat dissipation effect and airtightness.

この技術に適用するリードフレームを第4図により説明
すると、この図面はある程度加工したリードフレームを
示しており、しかも単一の半導体素子用が書かれている
ので、その長手方向は一見すると判然としないが、外部
に延びる冷却片23の長手方向と推定される。とすると
このリードフレームは極めて特殊な形状に整形されてお
り、しかもこの冷却片23を接続する導熱体21には開
孔22を設ける方式を採用している。
The lead frame applied to this technology is explained with reference to Figure 4. This drawing shows a lead frame that has been processed to some extent, and since it is written for a single semiconductor element, its longitudinal direction is not obvious at first glance. Although not, it is presumed to be in the longitudinal direction of the cooling piece 23 extending outside. Therefore, this lead frame is shaped into a very special shape, and a method is adopted in which an opening 22 is provided in the heat conductor 21 to which the cooling piece 23 is connected.

これを第1図に示す標準タイプのDIP用リードフレー
ムと対比するとその相違が明確になる。
When this is compared with the standard type DIP lead frame shown in FIG. 1, the difference becomes clear.

即ちこのDIP用リードフレームよでは相対向する枠体
2,2を等間隔で区分して単位体4・・・を構成するた
めに、この枠体2,2に直交する方向に各単位体毎に補
強帯(いわゆるタイバー)3・・・を設け、しかもこの
単位体4・・・の中心位置に配置するベッド部5には補
強帯3に接続する導体6を設ける。更に、この補強帯3
を出発点として遊端をベッド部付近とするリード端子7
を形成する。
That is, in this DIP lead frame, in order to construct the unit bodies 4 by dividing the opposing frames 2, 2 at equal intervals, each unit body is divided in the direction perpendicular to the frames 2, 2. A reinforcing band (so-called tie bar) 3 is provided on each of the unit bodies 4, and a conductor 6 connected to the reinforcing band 3 is provided on the bed portion 5 disposed at the center of the unit body 4. Furthermore, this reinforcement band 3
A lead terminal 7 whose free end is near the bed section with the starting point at
form.

このリードフレームと第4図に示すものとを対応すると
、冷却片23は、第3図の枠体31・・・に沿った方向
を長手方向としていることが明らかであり、前述のよう
に極めて特別な形状を持っている。
Comparing this lead frame with the one shown in FIG. 4, it is clear that the longitudinal direction of the cooling piece 23 is along the frame body 31 in FIG. 3, and as mentioned above, it is extremely It has a special shape.

(発明が解決しようとする問題点) 第2図に示すリードフレームを利用して放熱フィンを半
導体素子に形成すると、極めて高価なものとなることは
確実であり、更に第3図に示すものにあってはタイバー
と称する補強帯ならびにベッド部間を連結する導体は半
導体素子の樹脂封止工程に続くリード端子のCut a
nd Bend工程後工程−ドフレームの残部として廃
棄されており、材料効率の面では好ましくない。
(Problems to be Solved by the Invention) If a heat dissipation fin is formed on a semiconductor element using the lead frame shown in FIG. 2, it will definitely become extremely expensive. The reinforcing bands, sometimes called tie bars, and the conductors connecting the bed parts are cut a of the lead terminals following the resin sealing process of the semiconductor element.
After the nd bend process, it is discarded as the remaining part of the frame, which is not preferable in terms of material efficiency.

本発明は上記難点を克服する新規な樹脂封止型半導体装
置の製造方法を提供することを目的とし、特に放熱効果
の増大を安価な手段で達成した。
The object of the present invention is to provide a novel method for manufacturing a resin-sealed semiconductor device that overcomes the above-mentioned difficulties, and in particular achieves an increase in the heat dissipation effect using inexpensive means.

〈発明の構成〉 (問題点を解決するための手段) この目的を達成するのに、DIP用リードフレームの相
対向する枠体間を結ぶ補強帯いわゆるタイバーを半導体
素子が埋設される封止樹脂層外に露出する手法を採用す
る。
<Structure of the Invention> (Means for Solving the Problems) In order to achieve this object, reinforcing bands, so-called tie bars, connecting the opposing frames of the DIP lead frame are made of a sealing resin in which semiconductor elements are embedded. Adopt a method that exposes outside the layer.

(作 用) このように半導体素子の組立工程に利用するリードフレ
ームの最終工程のCut and Bend工程で行う
リード加工と同時に、本発明の補強帯成形加工を実施し
ており、更に従来このCut and Bend工程で
廃棄していた前記補強帯を活用しているので、工数増加
なしでかつ安価に達成できる利点を発揮できる。
(Function) As described above, the reinforcing band forming process of the present invention is carried out at the same time as the lead processing performed in the cut and bend process of the final process of the lead frame used in the assembly process of semiconductor elements. Since the reinforcing band that was discarded in the bending process is utilized, the advantage can be achieved at low cost without increasing the number of man-hours.

(実施例) 第1図乃至第3図により本発明を詳述するが、従来の技
術欄の説明と重複する記載も都合上あるが、新番号を付
して説明する。
(Example) The present invention will be described in detail with reference to FIGS. 1 to 3. Although there are some descriptions that overlap with the description in the conventional technology column for convenience, new numbers will be used to explain them.

第1図イは本発明方法を適用して完成した樹脂封止型半
導体装置の斜視図であり、第1図口はこの第1図イの背
面図を示しており、これらの装置を製造するのに利用す
るリードフレームの上面図を第3図に示した。
FIG. 1A is a perspective view of a resin-sealed semiconductor device completed by applying the method of the present invention, and the opening in FIG. 1 shows a rear view of this FIG. 1A. Figure 3 shows a top view of the lead frame used for this purpose.

このリードフレーム1は標準型のDIP用であり、相対
向する枠体2,2間には直交する補強帯3・・・を設置
して、同面積をもつ単位体4・・・を形成し、このほぼ
中央に半導体素子をマウントするベッド部5をこの補強
帯3・・・に接続する導体6・・・によって架設する。
This lead frame 1 is for a standard type DIP, and a reinforcing band 3 orthogonal to each other is installed between opposing frames 2 to form a unit body 4 having the same area. A bed portion 5 on which a semiconductor element is mounted approximately in the center is constructed by conductors 6 connected to the reinforcing bands 3.

このリードフレームエはAQ、 Fe、 Cuならびに
各金属合金からなる板体をプレス工程もしくは食刻工程
を利用して形成するので、当然導電性をもつ金属で構成
する。
Since this lead frame is formed from a plate made of AQ, Fe, Cu, and metal alloys using a pressing process or an etching process, it is naturally made of conductive metal.

補強帯3・・・には、ベッド部5付近に位置する遊端を
もち導体より幅が狭いリード端子7・・・を設けて、後
述する封止工程後の半導体装置外部リードとして機能さ
せる。
Lead terminals 7 having free ends located near the bed portion 5 and narrower in width than the conductor are provided on the reinforcing bands 3 to function as external leads of the semiconductor device after a sealing process to be described later.

このように各単位体4・・・には同一の寸法ならびに形
状をもつ補強帯3・・・、ベッド部5、リード端子7・
・・ならびに導体6,6が形成され、又図示しないが枠
体2,2にはこのリードフレーム上搬送時に適用する開
口を設ける。
In this way, each unit body 4... has a reinforcing band 3..., a bed portion 5, a lead terminal 7, and a bed portion 5 having the same dimensions and shape.
. . . and conductors 6, 6 are formed, and although not shown, the frames 2, 2 are provided with openings that are used during conveyance over this lead frame.

ところで、前述のようにベッド部5には所定の半導体素
子8をダイボンディング後リード端子7・・・とこの半
導体素子に形成する電極間を金属細線9・・・によって
架橋して電気的接続を図ってから、トランスファーモー
ルド法によって半導体素子8、金属細線9・・・やベッ
ド部5等を封止樹脂層10(第1図及び第2図)内に埋
設する。
By the way, as mentioned above, after die bonding a predetermined semiconductor element 8 to the bed part 5, electrical connections are made by bridging the lead terminals 7 and the electrodes formed on the semiconductor element with thin metal wires 9. After this, the semiconductor element 8, thin metal wires 9, etc., the bed portion 5, etc. are embedded in the sealing resin layer 10 (FIGS. 1 and 2) using a transfer molding method.

次いで常法に従ってCut and Bend工程に移
行する。
Next, the process proceeds to a cut and bend step according to a conventional method.

従来はこの工程により枠体2,2、補強帯3・・・等封
止樹脂層10より露出した部分を切断し、更に、外部端
子となる各リード端子7・・・を所定の形状に整形する
Conventionally, through this process, the parts exposed from the sealing resin layer 10, such as the frames 2, 2, reinforcing bands 3, etc., are cut, and each lead terminal 7, which becomes an external terminal, is shaped into a predetermined shape. do.

本発明方法では導体6ならびに補強帯3・・・をそのま
ま利用するために枠体2・・・から切断して第1図及び
第2図に示すように補強帯3・・・を封止樹脂層10の
裏側(第2図口)もしくは第3図のように封止樹脂層1
0の平坦面に沿う方向に露出して放熱フィンとして機能
させる。
In the method of the present invention, in order to use the conductor 6 and reinforcing bands 3 as they are, they are cut from the frame 2... and the reinforcing bands 3 are sealed with resin as shown in FIGS. 1 and 2. The back side of the layer 10 (the opening in Figure 2) or the sealing resin layer 1 as shown in Figure 3.
It is exposed in the direction along the flat surface of 0 and functions as a heat radiation fin.

〈発明の効果〉 本発明方法では半導体装置の組立工程中最終に近いいわ
ゆるCut and Bend工程で、金遣リードフレ
ームの廃棄物であったタイバー即ち補強帯ならびに幅の
広い導体の成形加工を実施して、放熱フィンとしての機
能を持たせたもので、極めて安価に省スペース化が達成
できる。
<Effects of the Invention> In the method of the present invention, in the so-called cut and bend process near the end of the semiconductor device assembly process, tie bars or reinforcing bands and wide conductors, which were waste products from lead frames, are formed. It has the function of a heat dissipation fin, and can save space at an extremely low cost.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図イは、本発明方法を適用した樹脂封止型半導体装
置の斜視図、第1図口はこの半導体装置の背面図、第2
図は本発明方法による他の樹脂封止型半導体装置の斜視
図、第3図は標準的なリードフレームの正面図、第4図
は従来の放熱フィン付リードフレームの斜視図である。
FIG. 1A is a perspective view of a resin-sealed semiconductor device to which the method of the present invention is applied; FIG.
3 is a front view of a standard lead frame, and FIG. 4 is a perspective view of a conventional lead frame with radiation fins.

Claims (1)

【特許請求の範囲】[Claims] 相対向する枠体を区分して単位体を形成し、この各単位
体の前記枠体に直交する補強帯を設け、この単位体のほ
ぼ中心に配置するベット部ならびにこの補強帯間を導体
によって接続し、前記補強帯に連続して形成し前記ベッ
ド部付近に遊端をもつリード端子を設け、前記ベッド部
にダイボンディングした半導体素子電極ならびにこのリ
ード端子間を金属細線で架橋し、この半導体素子及び金
属細線を封止樹脂層に埋設する製造方法において、前記
補強体を封止樹脂層外に露出することを特徴とする樹脂
封止型半導体装置の製造方法。
A unit body is formed by dividing opposing frames, and a reinforcing band is provided perpendicular to the frame body of each unit body, and a conductor is provided between the bed part disposed approximately in the center of this unit body and the reinforcing band. A lead terminal is formed continuously on the reinforcing band and has a free end near the bed portion, and the semiconductor element electrode die-bonded to the bed portion and the lead terminal are bridged with a thin metal wire. 1. A method of manufacturing a resin-sealed semiconductor device in which an element and a thin metal wire are embedded in a resin-sealing layer, the reinforcing body being exposed outside the resin-sealing layer.
JP3904287A 1987-02-24 1987-02-24 Manufacture of resin sealed type semiconductor device Pending JPS63207161A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3904287A JPS63207161A (en) 1987-02-24 1987-02-24 Manufacture of resin sealed type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3904287A JPS63207161A (en) 1987-02-24 1987-02-24 Manufacture of resin sealed type semiconductor device

Publications (1)

Publication Number Publication Date
JPS63207161A true JPS63207161A (en) 1988-08-26

Family

ID=12542066

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3904287A Pending JPS63207161A (en) 1987-02-24 1987-02-24 Manufacture of resin sealed type semiconductor device

Country Status (1)

Country Link
JP (1) JPS63207161A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02284456A (en) * 1989-04-26 1990-11-21 Hitachi Ltd Lead frame
EP0880178A2 (en) * 1997-05-21 1998-11-25 Nec Corporation Method of manufacturing a semiconductor device with a pair of radiating terminals and a plurality of lead terminals formed from single lead frame

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02284456A (en) * 1989-04-26 1990-11-21 Hitachi Ltd Lead frame
EP0880178A2 (en) * 1997-05-21 1998-11-25 Nec Corporation Method of manufacturing a semiconductor device with a pair of radiating terminals and a plurality of lead terminals formed from single lead frame
EP0880178A3 (en) * 1997-05-21 1999-02-03 Nec Corporation Method of manufacturing a semiconductor device with a pair of radiating terminals and a plurality of lead terminals formed from single lead frame
US6165818A (en) * 1997-05-21 2000-12-26 Nec Corporation Method of manufacturing a semiconductor device with a pair of radiating terminals and a plurality of lead terminals formed from a single lead frame
US6177720B1 (en) 1997-05-21 2001-01-23 Nec Corporation Method of manufacturing a semiconductor device with a pair of radiating terminals and a plurality of lead terminals formed from a single lead frame
KR100286906B1 (en) * 1997-05-21 2001-06-01 가네꼬 히사시 Method for manufacturing a semiconductor device having a pair of heat dissipation terminals and a plurality of lead terminals formed from a single lead frame, and a single lead frame

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