JPS63200352U - - Google Patents

Info

Publication number
JPS63200352U
JPS63200352U JP1987091644U JP9164487U JPS63200352U JP S63200352 U JPS63200352 U JP S63200352U JP 1987091644 U JP1987091644 U JP 1987091644U JP 9164487 U JP9164487 U JP 9164487U JP S63200352 U JPS63200352 U JP S63200352U
Authority
JP
Japan
Prior art keywords
optical semiconductor
base
metal cap
lead wire
housing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987091644U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987091644U priority Critical patent/JPS63200352U/ja
Publication of JPS63200352U publication Critical patent/JPS63200352U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
JP1987091644U 1987-06-15 1987-06-15 Pending JPS63200352U (id)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987091644U JPS63200352U (id) 1987-06-15 1987-06-15

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987091644U JPS63200352U (id) 1987-06-15 1987-06-15

Publications (1)

Publication Number Publication Date
JPS63200352U true JPS63200352U (id) 1988-12-23

Family

ID=30952619

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987091644U Pending JPS63200352U (id) 1987-06-15 1987-06-15

Country Status (1)

Country Link
JP (1) JPS63200352U (id)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006509373A (ja) * 2002-12-06 2006-03-16 クリー インコーポレイテッド 1つの小さい設置面積を有するledパッケージダイ

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006509373A (ja) * 2002-12-06 2006-03-16 クリー インコーポレイテッド 1つの小さい設置面積を有するledパッケージダイ
JP4675627B2 (ja) * 2002-12-06 2011-04-27 クリー インコーポレイテッド 1つの小さい設置面積を有するledパッケージダイ

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