JPS63200240A - Multiplex central processing unit system - Google Patents

Abstract

PURPOSE:To grasp the connection state of a connector by confirming whether the assured value stored previously in a memory of the remote side device is equal to a prescribed level or not before the information is transferred between the devices connected via a connector. CONSTITUTION:A device B transfers the information to a device A and a writing circuit 12 and a reading circuit 13 writes and reads the information given from a common memory 5 based on an instruction of a CPU 11. A synchronizing circuit 14 informs the CPU 11 the permission of application of the memory 5. Then the device B reads the 1st data and the data assured value out of the memory 5 via the circuit 13 if the application of the memory 5 is allowed. A comparator 15 checks whether the bit inverted value of the 1st data is equal or not to that of the data assured value. If so, it is decided that a connector 6 has a normal connection state.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a multi-CPU system in which a plurality of central processing units (CPUs) are attached and detached via connectors.

[Conventional technology]

Recently, multiple arithmetic processing devices (CPP) such as electronic computers, programmable controllers, and other data processing devices are
In multi-CPU systems using o), the demand for functional separation of component devices according to the processing content is increasing day by day, and for this reason, modularized devices for each function are being connected using connectors as necessary. ing.

However, when connecting the above-mentioned modules, it is necessary to understand the connection state, and it is conventionally known that a lock switch is often turned on after the connectors are connected.

(Problems to be Solved by the Invention) However, this system has a major problem in that the lock switch is turned on when the connector is connected and turned off when the connector is disconnected, which makes this operation complicated.

SUMMARY OF THE INVENTION An object of the present invention is to provide a multiple central processing unit (multi-CPU) system that can easily grasp the connection state of connectors and thereby prevent malfunctions of the system.

(Means for Solving the Problems) In order to achieve such an object, the present invention has a first central processing unit and a second central processing unit that perform arithmetic processing, and the first central processing unit In a multiple central processing unit system in which a device and a second central processing unit are connected by a connector via a bus, a first area connected to the bus on the first central processing unit side and storing first information; , a second area for storing second information having a predetermined relationship with the first information; and a second area connected to the bus on the second central processing unit side; and a reading means for reading the information stored in the second area, and when the read information in the first area and the information in the second area are in a predetermined relationship, the connection state of the connector is normal. and determining means for determining that the connection state of the connector is abnormal when the information in the first area and the information in the second area do not have a predetermined relationship. do.

[For production]

In the present invention, a reading means reads information in a first area and a second area stored in a storage means, and a determining means determines whether or not the read information has a predetermined relationship. Therefore, when the connector is disconnected, this relationship does not hold, so the connection state of the connector can be easily determined without visually checking the connector.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 shows an example of a configuration in an embodiment of the present invention. 1st
In the figure, A has a calculation processing unit (CPtl) 1,
This is a device that operates using the results of arithmetic processing by the CPU.

Device A includes a common memory 5 for CPLII arithmetic processing;
It has a write circuit 2, a read circuit 3, and a synchronization circuit 4.

The write circuit 2 is a circuit that writes information to the common memory 5 based on instructions from the CPIll. Also, readout circuit 3
is a circuit that reads information based on instructions from the CPH. The synchronization circuit 4 is a circuit that notifies the CPU II of permission to use the memory 5 based on instructions from the CPUI.

B is a device that exchanges information with device A, and device B is C
It has a write circuit 12, a read circuit 43, a synchronization circuit 14, and a comparison circuit 15.

The write circuit 12 and the read circuit 13 are cputi
Information is read and written from the common memory 5 based on instructions from the common memory 5. Further, the synchronization circuit is a circuit that notifies CPt1l of permission to use the common memory 5.

A comparison circuit 15 compares information stored in the common memory 5. 6 is a detachable connector that connects the signal line (bus) 7 of device A and device B.

In the case of connecting a plurality of devices separated by function, the present invention provides that the device on the sending side or the receiving side is stored in the memory of the receiving side or the sending side before the information is transferred. This is an attempt to understand the connection state of the connector by checking whether the guaranteed value is a predetermined value. Note that in the Kinomu 2ifE example, the device B on the receiving side checks the connection state of the connector 6.

Next, the above-mentioned guaranteed value will be explained. FIG. 2 shows an example of the memory configuration of the memory 5 commonly used by device A and device B.

In FIG. 2, 51 is an area for storing a predetermined guaranteed value. 52 is a memory area commonly used by device A and device B.

In this example, since the setting is such that the n-th data of the first data stored in the memory area 52 is transmitted from device A to device B, the data guarantee value is the inverted value of the first data. For example, data 1 is “12°° (hexadecimal)”
In the case of 1-byte data such as , the guaranteed data value is ``ED'' (hexadecimal number). Note that when the memory 5 is a read-only memory (ROM) or a non-volatile memory, a predetermined value may be used as the guaranteed value, and when the memory 5 is a volatile memory, the first data to start transmitting the memory area 52 is used. The inverted value of can be used as the guaranteed value.

Next, the operation in the embodiment of the present invention will be explained with reference to the flowchart of FIG. In FIG. 3, in device B, when use of the common memory 5 is permitted, the first data and data guarantee value in the memory 5 are read by the reading circuit 13 (steps 51 to S3). The comparison circuit 15 checks whether the bit inversion values of the first data and the data guarantee value are equal (step S4).

When these values are equal, it is determined that the connector 6 is in a normal connection state, and, for example, normal information transfer processing is performed (step S5). If the first data and the inverted value of the data guarantee value are not equal, it is determined that the connector has been disconnected, and error handling is performed (step S6).

In the embodiment of the present invention, the inverted value of the first data stored in the memory area 52 is used as the data guarantee value, but the data guarantee value may be the total value of the memory area 52 of the memory 5 or the CRC.
It is also possible to use data etc.

Further, according to the present invention, since the connection state of the connector is checked using the data stored in the memory 5, for example, when 8-bit data is used, it is possible to check if the connection state of any of the 8-bit connector pins is poor. Even if this data is checked bit by bit, bins with poor connectivity can be detected.

〔Effect of the invention〕

As is clear from the above description, according to the present invention, when a plurality of devices are connected by a connector, even if some of these devices are repeatedly connected and disconnected during operation, they will not be disconnected from the connector. It is possible to detect malfunctions of the system caused by this, and there is no need to provide a lock switch to check whether the connector is attached or detached, thereby greatly improving the operability of the device.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an example of the configuration in an embodiment of the present invention, FIG. 2 is an explanatory diagram showing an example of the memory configuration of the memory 5 in the embodiment of the present invention, and FIG. 3 is a control of CPIII in the embodiment of the present invention. It is a flowchart which shows an example of a procedure. 1.11...CPII. 2.12...Writing circuit, 3.13...Reading circuit, 4.14...Synchronization circuit, 5...Common memory, 6...Connector, 15...Comparison circuit. ; Book 9. Brochure diagram of Meiji Asahi 1 Figure 1 Address Data Invention Act 7! In the evening 1, I will explain the configuration of the Met95 shown in Figure 2.

Claims (1)

[Scope of Claims] It has a first central processing unit and a second central processing unit that perform arithmetic processing, and the first central processing unit and the second central processing unit are connected by a connector via a bus. In the connected multiple central processing unit system, a first area connected to a bus on the first central processing unit side and storing first information, and a predetermined relationship with respect to the first information. storage means having a second area for storing second information stored in the first central processing unit;
reading means for reading information stored in the area and the second area; when the read information in the first area and the information in the second area are in the predetermined relationship; The connection state of the connector is determined to be normal, and the connection state of the connector is determined to be abnormal when the information in the first area and the information in the second area do not have the predetermined relationship. 1. A multiple central processing unit system, comprising: determination means for making a determination.