JPH01321539A - Circuit for checking connecting state of bus connector - Google Patents

Abstract

PURPOSE:To check the connection state of a bus connector by outputting data from a connection check memory and checking whether the data is put on a data bus or not. CONSTITUTION:A processor starts a program at the side of a main system 2 to check the contents read out of a connection check memory 43 in a state where a bus connector 6 is accurately connected. Thus a specified address and the ROM read signal RM are produced and a memory selection circuit 42 is started. Then the contents of the memory 43 are outputted onto a data bus 41 and checked by the processor of the system 2 via the bus 41, the connector 6 and a data bus 21. Thus the correct connection of the connector 6 is checked. As a result, the defective state of an input/output element or the defective connection of the connector 6 can be decided when a malfunction occurs.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an information processing device, and more particularly to a bus connector connection state check circuit that can check the connection state of a bus connector.

[Conventional technology]

In general, the main system and subsystems are
Connected using a bus connector.

In such a circuit, only input/output elements on the subsystem side are connected to the bus.

[Problem to be solved by the invention]

In the circuit that connects the main system and subsystem using the conventional bus connector described above, only the input/output elements on the subsystem side are connected to the bus, so when a malfunction occurs, it is likely that the input/output element is defective. The disadvantage is that it is not possible to determine whether the connection is bad or the bus connector is not making good contact.

The present invention has been made to solve the above-mentioned drawbacks, and an object of the present invention is to provide a bus connector connection state check circuit that can check the connection state of a bus connector.

[Means to solve the problem]

In order to achieve the above object, the bus connector connection status check circuit of the present invention connects a main system and a subsystem using a bus connector, and stores data for checking the connector connection status on the subsystem side. A connection check memory is provided, and data can be output from the connection check memory onto a data bus during the check.

The bus connector connection state check circuit of the present invention configured as described above is provided with a connection check memory capable of outputting data for checking the connection state onto the data bus on the subsystem side, and reads data from this connection check memory. You can check the connection status of the bus connector by outputting the data and checking whether it is correctly on the data bus.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a configuration diagram showing an embodiment of a bus connector connection state check circuit according to the present invention.

In FIG. 1, the main system 2 side and the subsystem 4 side are connected through a bus connector 6. An address bus 20 and a data bus 21 are provided on the main system 2 side. Also, main system 2
On the side, a ROM read signal RM is connected to a bus connector 6. The subsystem 4 is provided with an address bus 40 and a data bus 41. An address bus 20 and a data bus 21 are connected to the bus connector 6, as well as other signal-related devices necessary for the system. Similarly, address bus 4 is connected to bus connector 6.
0 and a data bus 41 are connected, and other signal-related devices necessary for the system are also connected. Also,
A memory select circuit 42 and a connection check memory 43 are provided on the subsystem 4 side. The memory select circuit 42 generates a signal that enables the contents of the connection check memory 43 to be read based on the address signal from the address bus 40 and the ROM read signal RM. The connection check memory 43 outputs its stored contents onto the data bus 41 in accordance with the designation of the signal from the memory select circuit 42 and the address signal from the address bus 40.

The operation of the bus connector connection state check circuit of the embodiment configured as described above will be explained.

First, with the bus connector 6 correctly connected,
On the main system 2 side, a processing device (not shown) starts a program that checks the contents read from the connection check memory 43.

Then, the specified address and ROM read signal RM are generated. This activates the memory select circuit 42 and outputs the contents of the connection check memory 43 onto the data bus 41. This is connected to the main system 2 via the data bus 411 bus connector 6 and the data bus 21.
The processing device on the side checks to make sure it is properly connected.

On the other hand, if the contact of the bus connector 6 is abnormal due to poor contact, etc., the contents of the connection check memory 43 will be changed to the data bus 4.
1, the processing device (not shown) determines that there is an abnormality in the bus connector 6.

〔Effect of the invention〕

As explained above, the present invention provides a connection check memory that can output data for checking the connection state onto the data bus on the subsystem side, outputs data from this connection check memory, and confirms that the data is correct. By checking whether the user is on the bus, the connection status of the bus connector can be checked.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a bus connector connection state check circuit according to an embodiment of the present invention. 2...Main system, 4...Subsystem, 6.
...Bus connector, 42...Memory select circuit, 43...Memory for connection check.

Claims (1)

[Claims] In systems that connect a main system and a subsystem using a bus connector, a connection check memory that stores data for checking the connector connection state is provided on the subsystem side, and when checking, data is transferred from the connection check memory onto the data bus. A bus connector connection state check circuit characterized in that the circuit is configured to output the data.