JPS63193360A - Magnetic recording and reproducing device - Google Patents

Abstract

PURPOSE:To lighten the load on hardware, and to obtain an automatic tracking function by effectively using a capture circuit. CONSTITUTION:A capture controller 800 and a capture register block 700, which constitute the capture circuit,fetch a count data, the minimum resolution precision of which is higher than that of the execution cycle of an instruction, from a time base counter 500, when the edge of a capture signal arrives. Then, they output the result to an arithmetic operator (ALU) 300 or a register 100 or a random access memory (RAM) 200 by a specified instruction from an execution circuit 400. Accordingly, only by changing a program, stored in the execution circuit 400, the operation state of a device can be easily changed. Thus, an exclusive and complicated hardware circuit comes not only unnecessary, but a magnetic recording and reproducing device with the automatic tracking function, which can flexibly deal with various specification changes, is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a magnetic recording/reproducing apparatus having an effective auto-tracking function for use in a video tape recorder.

BACKGROUND OF THE INVENTION In recent years, microprocessors have become widespread and are now being used in many household electrical appliances. Home video tape recorder (hereinafter abbreviated as VTR).

) is no exception, and microprocessors are actively used at the center of the system, such as controlling the loading mechanism that pulls the magnetic tape out of the cassette and winding it around the rotating head, and the program reservation system that combines a timer. However, precision rotation control devices for the cylinder motor that drives the rotating head and the capstan motor that runs the magnetic tape at a constant speed require complex judgment operations and rapid processing of detection signals, so microprocessors are not required. Figure 9 is a block diagram showing the configuration of a servo mechanism during playback of a conventional VTR, and shows the cylinder motor 2 that drives the rotary head 8 and the rotation speed of the cylinder motor 2. a first frequency generator 3 for detecting the rotational phase of the cylinder motor 2, a phase detector 4 for detecting the rotational phase of the cylinder motor 2, and a first frequency generator 3 for detecting the error with respect to the reference period of the output signal of the first frequency generator 3. Frequency discriminator 40 and reference signal generator 42
, a first phase comparator 41 for detecting a phase error between the rotational phase signal obtained from the phase detector 4 and the reproduced reference signal obtained from the reference signal generator 42; a first adder 43 that mixes the phase error output of the first frequency discriminator 40 and the speed error output of the first frequency discriminator 40;
a first amplifier 44 and a first amplifier 44 for driving the cylinder motor 2;
a drive circuit 12 for driving the magnetic tape 1; a capstan motor 6 for running the magnetic tape 1 at a constant speed; a second frequency generator 7 for detecting the rotational speed of the capstan motor 6;
a control head 5 that detects a control signal recorded at the lower end of the second frequency generator 7; a second frequency discriminator 45 that detects an error in the output signal of the second frequency generator 7 with respect to a reference period; A tracking mono multi circuit 46 whose delay time is varied by a variable resistor 5o triggered by the output signal of 42 detects the phase error between the control signal obtained from the control head 6 and the output signal of the tracking mono multi circuit 46. a second adder 48 that mixes the phase error output of the second phase comparator 47 and the speed error output of the second frequency discriminator 45; with an amplifier 49.

◇ The VTR configured as described above is constructed by a second drive circuit 13 that drives the capstan motor 6. Briefly explain the operation.

10N is the output waveform of the reference signal generator 42 of FIG. 9, and this signal is supplied to the first phase comparator 41 and the tracking monomulti circuit 46 as a reference signal during VTR playback. be done.

The trapezoidal wave signal in FIG. 10Q is the internal waveform of the first phase comparator 41, and is the phase reference signal of the cylinder motor triggered by the rising edge in FIG.
The rotational phase signal obtained from the phase detector 4 in the figure, that is, the first
Sampled by the falling edge of 0 figure P,
The hold signal (not shown) and the speed error signal obtained from the first frequency discriminator 4o in FIG.
is supplied to the drive circuit 12 of. Therefore, the cylinder motor, that is, the rotary head 8 rotates in phase synchronization with the reference signal N in FIG. 10. ◇Q in FIG. This is a charging/discharging waveform, and is triggered by the rising edge of N in FIG. 10, and its delay time can be varied by changing the time constant with the variable resistor 50 in FIG. 9. 10R is the output waveform of the tracking monomulti circuit 46, the trapezoidal island signal of FIG. 10S is the internal waveform of the second phase comparator 47 of FIG. 9, and the falling edge of FIG. 9) The phase reference signal of the triggered capstan motor, which is a reproduction control signal obtained from the control head 5 in FIG. 9, is sampled by the rising edge of T in FIG. 10, and its hold signal ( (not shown) and the speed error signal obtained from the second frequency discriminator 45 in FIG. be done. Therefore, the capstan motor 6 is the 10th
It rotates in phase synchronization with the output signal of the tracking monomulti circuit 46 of FIG. 10H, which is obtained by phase-shifting the reference signal of FIG. As described above, during VTR playback, by synchronizing the phases of the rotary head 8 and the playback control signal (T in FIG. 10), the rotary head 8 can optimally track the tracks recorded on the magnetic tape 1. Become.

Problems to be Solved by the Invention If the formats of the tracks recorded on the magnetic tape are compatible, the variable resistor 50 may be a fixed resistor, but the magnetic tape may change due to environmental changes such as temperature changes. Other Vs that have expanded or contracted or have mechanical errors.
When reproducing a tape recorded with TR, it is necessary to change the tracking state during reproduction, that is, the phase relationship between the rotary head and the reproduction control signal. For this purpose, the variable resistor 6o shown in FIG. 9 is necessary. Furthermore, this variable resistor 5o needs to be a volume with a click point in order to be open to the user. Generally, the resistance value at the click point of a volume with a click point varies, and in order to correct the variation, another variable resistor is required. Therefore, the conventional VTR does not require an adjustment volume for tracking, and it is necessary to improve the operability, that is, the ease of use.

In view of the above problems, the present invention provides a magnetic recording and reproducing device that does not require an adjustment volume and has an auto-tracking function with good operability by effectively using a capture circuit. Means for Solving the above problems In order to solve the above-mentioned problems, the magnetic recording and reproducing apparatus of the present invention includes a memory means for storing data, an arithmetic means for performing operations on the data, and instructions to be executed sequentially,
command execution means for controlling the operations of the memory means and the calculation means based on the command; cylinder motor drive means for driving the rotary head based on the program stored in the memory means; and cylinder motor drive means for driving the tape at a constant speed. a capstan motor drive means, a first switch that generates a command signal to operate an auto-tracking function, and a command to manually vary a reference phase between a head switching signal of the rotary head and a control signal obtained from a magnetic tape. A second switch that generates a signal, a time base counter that counts the reference clock signal, and a digital-to-analog converter (hereinafter abbreviated as a DA converter) that converts the count value of the time base counter into an analog value. and a comparator that compares the level of the output signal of the DA converter and the detection signal of the reproduced envelope signal obtained from the rotary head, and when the edge of the output signal of the comparator arrives, the count data from the time base counter is read. a capture circuit that captures the result and sends the result to the arithmetic means or the memory means according to a specific command from the command execution means; and a head switching signal of the rotary head and the magnetic tape obtained from the head switching signal of the rotary head according to the command from the command execution means. a phase control means for calculating a phase difference with a control signal from data obtained from the capture circuit and detecting an error with respect to a reference phase;
．． tracking variable means for varying the reference phase of the head switching signal of the rotary head and the control signal based on the state of a second switch; an envelope detection means for capturing the data of the capture circuit after a time into the calculation means or the memory means; and an envelope detection means for capturing data from the capture circuit by the envelope detection means according to an instruction from the instruction execution means and previously captured data. An envelope comparison means is provided for performing the comparison.

Function The present invention achieves an analog-to-digital converter (hereinafter abbreviated as an AD converter) that reduces the burden on hardware by effectively using the capture circuit with the above-described configuration. A magnetic recording/reproducing device having a tracking function can be obtained.0 Examples Examples of the present invention will now be described with reference to the drawings. Figure 1 shows a VTR having an auto-tracking function according to an example of the present invention. The block diagram shows a cylinder motor 2 that drives two pairs of rotating heads 8 and 9 that record and reproduce video and audio signals, respectively, and a tape 1.
A microprocessor 1o controls the capstan motor 6 that drives the cylinder at a constant speed and realizes an auto-tracking function, and a signal output from the microprocessor 10 via the first analog signal output terminal 27 controls the cylinder motor The first drive circuit 1 that drives the
2, a second drive circuit 13 that drives the capstan motor 6 by a signal output from the microprocessor 10 via the second analog signal output terminal 28, and a reproduction envelope obtained from the rotary head 8.9. Amplification circuits 14 and 16 that amplify each signal, a detection circuit 15 and 17 that peak-detect the amplified reproduced envelope signal, and the detection outputs of the detection circuits 15 and 17 are input, and the detection circuit 17 records the audio signal. In other words, if no audio signal is recorded or the level of the audio signal is below a certain value, the output of the detection circuit 15 is controlled by a signal that detects the presence or absence of the detection circuit 15; includes a switch circuit 18 for selecting the output of the detection circuit 17, and a comparator to which the signal output from the switch circuit for one day is outputted from the microprocessor 1o via the third analog signal output terminal 26. 19, and the input terminals 21 to 25 of the microprocessor 1o are connected to the first frequency generator 3, the first phase detector 4, the control head 6, the second frequency generator 7, and the The output of comparator 19 is connected.

The inside of the microprocessor 10 includes a register 100 for storing data and a random access memory (indicated by the abbreviation RAM in the figure, hereinafter referred to as R).
It is abbreviated as AM. ) 200, a 16-pit arithmetic unit (indicated by the abbreviation ALU in the figure, hereinafter abbreviated as ALU) 300 that executes arithmetic and logical operations on digital data, and an instruction execution circuit (indicated by the abbreviation PLA in the figure) 4oo, which stores and controls the operations of the register 100, RAM 200, and ALU 3oo via the control bus 450 based on the instruction; A one-bit time base counter (indicated by the abbreviation TBC in the figure) 50o that counts down the reference clock signal applied to the terminal 20, and the time base counter 500 via a counter path 560.
A capture register block (indicated by the abbreviation CAPREG in the figure) 7oO is supplied with count data of , and its output data is sent to the data bus 600 connected to the register 10o1, the RAM 200, and the ALU 300. , the first to fifth input terminals 21,
22, 23° and 24.25, and a capture controller that transfers the count data of the time base counter 5oO to the capture register block 700 when the edge of six types of capture symbols, each having a different generation source, arrives. In the figure, CAPTRCTR
It is indicated by the abbreviation L. ) 800.

Further, the reference clock signal applied to the clock terminal 20 is supplied to the instruction execution circuit 400 via a timing generator (indicated by the abbreviation TG in the figure) 900, and to the data bus 600. Read-only memory (indicated by the abbreviation ROM in the figure. Hereinafter abbreviated as ROM) 1ooo, I10) 100. First (7) DA converter 1200, second D
A converter 1300. A 30th DA converter 14oO is connected to the RAM 200 and the ROM 100.
0 have address decoders 250 and 1050, respectively.

Note that the capture controller 800 and the capture register block 700 take in count data from the time base counter 600 when the edge of the capture signal arrives, and the minimum decomposition accuracy is higher than the execution cycle of the instruction. It constitutes a capture circuit that sends the result to the ALU 300, the register 1oo, or the RAM 200 according to a specific instruction from the CPU.

Regarding the VTR configured as described above, the configuration diagram shown in FIG. 1 and the capture controller 8 shown in FIG.
The operation will be explained with reference to a specific configuration diagram of oO and a timing chart of the main parts shown in FIG.

First, FIG. 2 shows the capture controller 800 of FIG.
This is a logic circuit diagram showing a specific configuration example of the first to fifth input terminals 21, 22, 23°24, 2tsK.
Control units 810 to 860 having the same configuration are connected, and the control units 810 to 85
0 each have a common reference clock input terminal 801 and a data transfer lock input terminal 802 to the capture register block 700, and also have an individual reset terminal 8.
11 to 861 and individual flag output terminals 812 to 852
and individual data transfer terminals 813-853.

Next, FIG. 3 shows a control unit 8 that constitutes the third DA converter 1400 and comparator 11 shown in FIG. 1 as well as the capture controller 800 shown in FIG.
6o and a capture register block 70o. FIG. 3A shows the clock signal waveform applied to the clock terminal 2° in FIG. 3B is a signal waveform obtained by frequency-dividing the signal waveform of FIG. 3A, and this signal is supplied to the reference clock input terminal 801 of FIG. 2 as a reference clock signal. Further, FIG. 3C shows a time base counter 50 constructed of a synchronous counter whose unit stage is a master slave type flip-flop.
This shows the count clock signal waveform of 0. At the leading edge (leading edge) marked with an arrow, the output of the master part of the flip-flop of each unit stage changes, and at the trailing edge (trailing edge) The output of the slap section changes. The third diagram shows a clock signal waveform for data transfer created from the signal waveforms of FIGS. 3A and 3B, and is supplied to the data transfer lock input terminal 802 of FIG. Furthermore, FIG. 3E shows the third DA applied to the non-inverting input terminal of the comparator 11 in FIG.
This is the analog output signal of the converter 14oO, and FIG. 3F is an output signal obtained by comparing the peak detection signal of the reproduced envelope signal output from the detection circuit 1o of FIG. It is.

Now, when the signal waveform shown in FIG. 3F is applied to the fifth input terminal 26 in FIG.
”, the output level of the NAND gate 854 shifts to “1” as shown in FIG. 3G, and furthermore,
When the level of the reference clock input terminal 801 shifts to "0", the output level of the NAND gate 856 shifts to "1" as shown in FIG. When the level shifts to "1", the output level of the NAND gate 866 shifts to "1" as shown in Figure 3. The NAND gates 854, 855 and 856 are all paired with another NAND gate.
Since it forms a bistable circuit with the D gate, when the output level shifts to "1", it maintains that state until a reset signal is applied to another NAND gate.
When the output level of the AND gate 856 shifts to "1", the output level of the paired NAND gate 857 shifts to "1".
0", and the output level of the AND gate 858 also becomes "o".
”, so the NAND gate 854.855
The output level of returns to rOJ.

In this way, when the leading edge of the external signal arrives at the sixth input terminal 26, the second data transfer terminal 8
A signal waveform as shown in FIG. 3 is sent to 53 via an AND gate 859, and this signal causes count data to be transferred from time base counter 500 in FIG. 1 to capture register block 700.

That is, in the signal waveform of FIG. 3F, the timing at which the level shifts from roJ to "1" depends on the potential of the output signal of the detection circuit 1o of FIG. The count data of the base counter 5oO also depends on the potential of the output signal of the detection circuit 10.

The output signal of the NAND gate 866 is sent to the flag output terminal 852 and is used as a capture flag signal indicating that the count data of the time base counter 500 has been transferred.
1, a reset signal is applied after software (program) confirms that this capture flag is set.

Next, FIG. 4 shows a capture register block, a unit register 760 composed of eight memory cells whose data output terminals are connected to the Q1 terminal to Q8 terminal, and a unit register 760 whose data input terminals are connected to the DO terminal to D16 terminal, respectively. A unit register 7 configured by 16 memory cells connected to each other and whose data output terminals are connected to terminals Q1 to Q16.
40°730 and the data input terminal is the D1 terminal ~
Connected to D16 terminal, data output terminal is connected to Q1 terminal ~ Q
The entire unit is constituted by unit registers 720 and 710 constituted by 16 memory cells connected to 16 terminals. Note that each unit register 710 to 750 has two control signal input terminals, and a data transfer signal from the capture controller 800 shown in FIG. ~752 has an instruction execution port lol! r
The output side of each unit register is activated by a specific read command stored in the program storage area of 40o, and data is read out to the data bus 600 in FIG. 1 via the Q1 terminal to Q16 terminal for data output. A select signal is applied.

Now, the transfer control signal from the data transfer terminal 853 in FIG. 2 is supplied to the read terminal 751 in FIG. However, in the embodiment of the present invention shown in FIG. 1, the scan counter for conversion and the register for storing the conversion result use a mechanism prepared as a capture circuit, so the hardware is not required. The burden will be much lighter.

By the way, in FIG. 4, unit registers 730 to 760
The connection position between the data input terminal and the data output terminal is shifted by one bit for the following reason.

First, the input section of the 8-bit unit register 750 has a first
The same 8-pit count data as that supplied to the DA converter 14oO of the figure is supplied, but in order to increase the sampling rate, the DA converter 140o and the unit register 760 are supplied with the data closer to the LSB (least significant bit). It is preferable to supply the count data of the time base counter 600. Regarding the unit registers 730 to 740, the LSB of the time base counter 500 is
and the LSB of the unit register are made to match, but for the unit registers 710 to 720, the unit register 730 is
The data input terminal is shifted to the left by one bit so that twice as many intervals can be processed at once with the same number of bits as ~740. Such a unit register 730~
Due to the bit shift configuration of the unit register 740, for example, when the frequency of the reference clock signal is selected to be 2 MHz, count data having a resolution of 500 ns is obtained from the unit registers 730 to 740, while the unit register 71
From 0 to 720, the arrival period of an external signal having a frequency of about 30) [z can be measured in one process.

The operation of the VTR having the auto-tracking function configured as described above will be explained with reference to the configuration diagram shown in FIG. 1, and the operation flowcharts and operation waveform diagrams shown in FIGS. 6 to 8.

FIG. 6 shows a control means for operating the capstan motor 6 by processing the count data obtained when the leading edge of the control signal recorded on the magnetic tape arrives as magnetic tape running phase detection data. 2 is a flowchart showing an example in which phase control during reproduction is realized by a program built into the microprocessor 10 of FIG. 1. FIG. The flowchart in FIG. 5 will be explained with reference to the operational waveform diagram of a conventional VTR in FIG. 10.

Processing blocks 451 and 453 and branch 462 in FIG.
A reference signal for VTR playback, that is, a signal corresponding to N in FIG. 10 is created by R in the processing block 463.
EF and TRM are constants, which are the repetition period of the reference signal and the center value of the tracking shifter amount, respectively, and the memory 6 stores the count value corresponding to the leading edge of the next reference signal and the rising edge of N in Figure 10. The time corresponding to the edge is written into the memory 7, and the tracking shift amount, that is, the time corresponding to the falling edge in FIG. 10H is written in the memory 7. As will be explained in detail later, the amount of change in the tracking shifter amount from the center value is written in the memory 4 for the auto-tracking function. Next, processing blocks 454 and 456 and branch 456 create a trapezoidal wave signal corresponding to the capstan motor phase reference signal S in FIG.
At step 66, it is determined whether the count value of the time base counter SOO in FIG. The NL flag for checking the presence is reset (indicating non-arrival), and the high level (hereinafter abbreviated as H level) of the trapezoidal wave signal shown in FIG. The count value is written. Therefore, TPZ in processing block 466 is a constant corresponding to the H level period. Next, in branch 467, it is checked whether a reproduction control signal has arrived.

This indicates that the capture controller 80o has transferred the count value of the time base counter 500 to the capture register block 700 at the leading edge of the playback control signal applied to the third input terminal 23 of the microprocessor 1o in FIG. This can be done by checking whether the CTL flag is set. If the CTL flag is set, processing then proceeds to processing block 458 where the latched count value is stored in the register file, via accumulator Acc of register 100 of FIG. 1, in capture register block 700 of FIG. Transferred to 9. After checking the NL flag in branch 459, processing block 460 and branch 461 determine the time at which the control signal arrives at the time written in memory 8, that is, the boundary point between the H level section and the slope section in FIG. We are determining whether it is faster. If yes, the process proceeds to processing block 463, in which the accumulator Ace is set to a value corresponding to the H level in FIG. Processing block 462 and branch 46
4, the arrival time of the control signal is now the 10th
It is checked whether the slope section shown in Figure S has been passed. KEISHA in processing block 462 is a count value (constant) corresponding to the slope section of FIG. 10S. and if the slope section has been passed, processing block 465
Then, the accumulator Aac is set to a value corresponding to the low level (hereinafter abbreviated as L level) of the trapezoidal wave signal shown in FIG. 10S. and then processing block 469
．． 470, the value corresponding to the phase error left in the accumulator Ace is written to the memory 1o, and the value corresponding to the phase error left in the accumulator Ace is written to the memory 1o and
The flag is set. If the control signal has not arrived in branch 457, that is, if the CTL flag is not set, processing block 466 and branch 467 change the count value of time base counter 600 to the slope section S of FIG. It is checked whether the time corresponding to the boundary point of the section has passed, and if yes, in processing block 468, a value corresponding to the L level in FIG. . As described above, the capstan motor 60 phase control is performed.

Next, the auto-tracking operation will be explained using the flowcharts shown in FIGS. 6 and 8 and the operation waveform diagram shown in FIG. 7. The microprocessor 10 of FIG.
This is a flowchart showing an example of a program realized by a program built into the cylinder motor. The reproduced envelope signal obtained is the reproduced envelope signal, and FIG. 7M shows the signal whose peak is detected by the above-mentioned detection circuit 1o. In other words, the signal in FIG.
This signal is applied to the inverting input terminal of the capture controller 800. as explained above. The signal is AD converted by the capture register block 700 or the like.

Branches 401, 404, and 408 in FIG. 6 are processes for branching the flow according to the value of state variable A set in RAM, that is, memory. First, when A=o, branch 401 causes processing blocks. Proceeding to step 402, it is determined whether the signal level of the head switching signal (H3W, K in FIG. 7) input to the Ilo port 1100 in FIG.
The state variable A is set to 1. When A=1, the process proceeds to processing block 405 via branch 404, where it is determined whether the signal level of the head switching signal (hereinafter abbreviated as H3W signal) is high level, and if yes, H3W signal is determined.
The rising edge of the W signal has been detected, and the process proceeds to processing block 406, where a timer is set to detect approximately 8 ms later.As can be seen from the envelope signal shown in Figure 7, this is due to rotation Since the envelope signal output obtained from the head is not constant due to variations in the head and nonlinearity of the recording track, the point at which the envelope output is compared is always at the same position, that is, approximately ams after the rising edge of the H3W signal. The 0 and timer settings for this purpose can be realized by using the time base counter 500 shown in FIG. 1, or by using a soft counter based on the number of times a particular command on the program has been passed. Next, processing block 407
Go to and increment the state variable A to 2.

When A=2, processing block 40 is executed by branch 408.
9 and determines whether the timer set when A=1 has completed counting.

If yes, the process proceeds to processing block 410, and as explained in FIGS. 3 and 4, a register into which a digital value obtained by AD converting the peak-detected signal (M in FIG. 7) of the reproduced envelope signal is input. The count value latched in the capture register block 700 in FIG. 1 is transferred to the memory 1. Next, in processing block 411, state variable A is reset to zero. By repeating the above flow, the amplitude level of the envelope signal for a certain period of time from the rising edge of the H8W signal can be always input into the memory.

Next, the main flow of automatic fist tracking is explained in Part 8.
Explain using the flowchart in the figure. First, branch 4
21 determines whether or not the first switch circuit 31 in FIG. and memory 2. Clear memory 3, set variable C to 15, and proceed to branch 424. If no in branch 421, the process goes to branch 423, and it is determined whether variable C is 0. If no, the process goes to branch 424, and depending on the value of state variable B, the process goes to branch 423.
．． 427.434.441 branches the flow. First, when B is 0, the process proceeds to processing block 425 via branch 424, and processing block 410 in the flow of FIG.
At , the data in memory 1 in which the amplitude level of the reproduced envelope signal has been captured is transferred to the accumulator (Acc) and stored again in memory 2 as 0. Then, in processing block 426, state variable B is incremented to 1. When B is 1, the process proceeds to processing block 428 via branch 427, and in order to shift the tracking shifter amount by 1 ms, a value corresponding to the data busy tracking amount of 1 ms in the memory 4 described in the explanation of FIG. 5 is added. The process then proceeds to processing block 429, sets the variable C to 2, decrements the value of variable C by 1 in processing block 430, determines whether the value of variable C has become 1 in branch 431, and if yes, processes. In block 432, state variable B is set to 3; if not, processing block 43
3, state variable B is set to 2. When B is 2, a branch 434 advances to a processing block 435 where the variable ari is decremented by 1, and then a branch 436 determines whether the variable ari is 0 or not. In other words, a soft timer is realized by the processing blocks 429 and 435 and the branch 436 using variables, and the time required for the program to pass through the processing block 435 twice is delayed. This is processing block 428
This is because it takes time for the capstan motor 6 in FIG. 1 to complete phase pull-in after the tracking thick amount is shifted by 1 ms at 0. Then, after a predetermined time has elapsed, the process proceeds to processing block 437, and after changing the tracking shift amount. The data in the memory 1, in which the amplitude level of the reproduced envelope is taken in by the flow shown in FIG. The difference between the data and the data in memory 2 is calculated.

Then, in branch 438, it is determined whether the value remaining in the accumulator is positive or negative. If it is positive, if the envelope signal level is higher after changing the tracking thick amount, processing block 439 determines whether the tracking The amplitude level of the reproduced envelope signal after changing the thick amount is transferred to the memory 2, and the data in the memory 4 in which the tracking thick amount is stored is transferred to the memory 5.

That is, the memory 2 and memory 6 store the maximum envelope signal level up to that point and the tracking thick amount at that time. Next, processing block 440
State variable B is set to 1 in .

When B is 3, processing block 44 is executed by branch 441.
2, the best tracking shifter amount stored in memory 6 is transferred to memory 4 via the accumulator, and variables B and C are cleared in processing block 443.

According to the above flow, the tracking shifter amount is shifted 15 times by 1 mg, the reproduced enprobe signal level is compared each time, and the tracking thick amount that is the maximum signal level among the 16 can be detected.

By the way, if the above branch 423 is positive, that is, if the auto-tracking operation is not in progress, the process proceeds to a processing block 444, where the maximum amplitude level of the reproduced envelope signal detected in the above-mentioned auto-tracking operation is captured and stored in the memory 2. The data of A c is transferred to the accumulator (Aca), and the data of A c c is shifted to the right, that is, halved. Next, the process proceeds to processing block 446, and in processing block 410 of the flowchart of FIG. If the data remaining in ice is positive, and if the amplitude level of the currently reproduced envelope signal becomes less than half (6 dB) of the maximum amplitude during auto tracking operation, the process jumps to processing block 422 and auto tracking is performed.
Transition to tracking state.

The branch 447 is branched depending on the position of the second switch circuit 32 shown in FIG. In other words, the second switch circuit 32 is a 3-position switch, and when its output is at H level, the process moves to a processing block 448, and the data in the memory 4 is transferred via ice to increase the tracking shift amount by 0.5 ms. 0.5ms to
Add the value corresponding to +. Also, the second switch circuit 3
If the output level of 2 is L level, processing block 44
9, and in order to reduce the tracking thick amount by 0.5ms, the data in memory 4 is transferred to 0.5 ms via AccC.
The value corresponding to m s is subtracted 0 This enables manual tracking 0 Effects of the Invention As is clear from the above description, the magnetic recording/reproducing apparatus of the present invention has a memory means (implemented) for storing data. In the example, it stores a register 1oo or a RAM 200), an arithmetic means for executing data operations (in the embodiment, it consists of an ALU 300), and instructions to be executed sequentially. instruction execution means (in the embodiment shown in FIG. 1, an instruction execution circuit 40) for controlling the operations of the memory means and the calculation means based on the
0), and a cylinder motor drive means (in the embodiment, composed of a drive circuit 1 and a cylinder motor 2) for rotationally driving the rotary head so that the rotary head scans the recording track on the magnetic tape. ), a capstan motor drive means for transporting the magnetic tape (consisting of a drive circuit 2 and a capstan motor 6 in the embodiment), and a command signal for operating an auto-tracking function. a first switch circuit for manually changing the reference phase of the head switching signal of the rotary head and a control signal obtained from the magnetic tape; and a time base counter (for counting the reference clock signal).
In the embodiment, it is indicated by the symbol SOO. ), a DA converter (indicated by reference numeral 14oO in the embodiment) that converts the count value of the time base counter into an analog quantity, and an output signal of the DA converter and a recording track on the magnetic tape. A comparator (indicated by reference numeral 11 in the embodiment) compares the detection output (M in FIG. 7) of the reproduced envelope signal obtained by scanning the rotary head, and an edge of the output signal of the comparator arrives. the count value from the time base counter (indicated by the symbol SOO in the embodiment) when A capture circuit (consisting of a capture controller 800 and a capture register block 70o in the embodiment) and a command from the command execution means determine the position between the head switching signal of the rotary head and the control signal obtained from the magnetic tape. a phase control means (in the embodiment, the phase control means is configured according to the flowchart of FIG. 5) that calculates a phase difference from data obtained from the capture circuit and detects an error with respect to a reference phase; According to a command from the first means. Tracking variable means for varying the reference phase of the head switching signal of the rotary head and the control signal based on the state of the second switch circuit (in the embodiment, processing block 428.4 in FIG. 8)
48.449 constitutes a tracking variable means 0), and an envelope for capturing data of the capture circuit after a certain period of time from the head switching of the rotary head into the memory means according to a command from the command execution means. Detection means (In the embodiment, the envelope detection means is configured according to the flowchart shown in FIG. 6.)
and 1. Envelope comparing means (in the embodiment, processing blocks 437 and 439 in FIG. 8 The branch 438 constitutes an envelope comparing means. It is possible to obtain a magnetic recording/reproducing device having an auto-tracking function that not only eliminates the need for a dedicated complicated hardware circuit but also can flexibly respond to various specification changes. Of course, since there is no need for an adjustment volume like in a conventional VTR, operability can also be improved.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a magnetic recording and reproducing device having an auto-tracking function in an embodiment of the present invention, and FIG. 2 is a specific logic circuit diagram of the capture controller shown in FIG. 1.
3 is a timing chart explaining the circuit operation of FIG. 2, FIG. 4 is a configuration diagram of a capture register block, and FIGS. 5 and 6. FIG. 8 is a flowchart showing the operation of the main parts of FIG.
FIG. 7 is a timing chart for explaining the flowchart in FIG. 6, FIG. 9 is a block diagram showing the configuration of the servo mechanism during playback of a conventional VTR, and FIG.
5 is a timing chart for explaining the operation of the main parts of the figure. 1...Magnetic tape, 2...Cylinder motor, 6...Capstan motor, 11...
... Comparator, 100 ... Register, 2
0o...RAM, 300...ALU,
400... Instruction execution means, 500...
Time base counter, 700...Capture register controller, 800...Capture controller, 1000--ROM, 1400...
...DA converter. Name of agent: Patent attorney Toshio Nakao and one other person #S
Figure 2 (eQ CJ Q 1.1. I L L!r Engineering f
-+ MQ method 5th figure 6th figure

Claims (2)

[Claims] (1) Memory means for storing data, arithmetic means for executing operations on data, and instruction execution means for storing instructions to be executed sequentially and controlling operations of the memory means and the arithmetic means based on the instructions. a cylinder motor driving means for rotationally driving the rotary head so that the rotary head scans a recording track on the magnetic tape; a capstan motor driving means for transporting the magnetic tape; and a command for operating an auto-tracking function. A first switch that generates a signal, a second switch that generates a command signal that manually varies a reference phase between a head switching signal of the rotary head and a control signal obtained from a magnetic tape, and a reference clock signal that counts. a time base counter that converts the count value of the time base counter into an analog quantity;
A comparator that compares the output signal of the digital-to-analog converter with the detection output of the reproduced envelope signal obtained by scanning the recording track on the magnetic tape with the rotary head, and an edge of the output signal of the comparator is provided. a capture circuit that captures count data from the time base counter at the time and sends the result to the arithmetic means or the memory means according to a specific instruction from the instruction execution means; a phase control means for calculating a phase difference between a head switching signal of the head and a control signal obtained from the magnetic tape from data obtained from the capture circuit and detecting an error with respect to a reference phase; Said first and second
tracking variable means for varying the reference phase of the head switching signal of the rotary head and the control signal based on the state of a switch; and a tracking variable means for varying the reference phase of the head switching signal of the rotary head and the control signal based on the state of the switch; an envelope detection means for capturing data of the capture circuit into the calculation means or the memory means; and a comparison of the data captured from the capture circuit by the envelope detection means with previously captured data in response to an instruction from the instruction execution means. A magnetic recording/reproducing device comprising envelope comparison means for performing the following. (2) If an audio signal is recorded on the magnetic tape in a magnetic recording/reproducing device having a rotary head for recording and reproducing video signals and audio signals respectively, the rotary head output of the audio signal is selected as the reproduction envelope signal. 2. A magnetic recording and reproducing apparatus according to claim 1, wherein the magnetic recording and reproducing apparatus is characterized in that: (2) Immediately after starting reproduction of the magnetic tape by a specific command from the command execution means, the output level of the reproduction envelope signal is a certain level with respect to the level immediately after operating the auto tracking function. 2. The magnetic recording and reproducing apparatus according to claim 1, wherein an auto-tracking function is automatically operated when the value is less than or equal to a value.