JPH02137155A - Magnetic recording and reproducing device - Google Patents

Abstract

PURPOSE:To execute a stable automatic tracking even to a tape for which compatibility is deteriorated by comparing the size of sampling data at a time that a reference phase is made variable with the size of sampling data just before the reference phase is made variable. CONSTITUTION:The size of differential data between the sampling data from a sampling means at the time that the reference phase is made variable by a tracking varying means and the sampling data just before the above mentioned reference phase is made variable is compared with the size of a reference value by a comparing means. Thus, the stable automatic tracking can be executed even to a magnetic tape 1, for which the so-called compatibility is deteriorated to be expanded/contracted by an environmental change such as a temperature change, etc., or to be recorded by another video tape recorder for which an error is generated on a mechanism.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a magnetic recording/reproducing device having an auto-tracking function.

(Prior Art) In recent years, microprocessors have become widespread and are being used in many household electrical products. Home video tape recorder (hereinafter abbreviated as VTR)
Microprocessors are no exception, and microprocessors are actively used at the center of systems such as controlling the loading mechanism that pulls the magnetic tape out of the cassette and winding it around the rotating head, and the program reservation system that combines a timer. However, precise rotation control devices for the cylinder motor that drives the rotating head and the capstan motor that runs the magnetic tape at a constant speed require complex judgment operations and rapid processing of detection signals, so microprocessors are required. Instead, they have relied on dedicated hardware.

FIG. 11 is a block diagram showing the configuration of a servo mechanism during playback of a conventional VTR, including a cylinder motor 2 that drives a rotary head 8 and a first frequency generator that detects the rotational speed of the cylinder motor 2. a phase detector 4 that detects the rotational phase of the cylinder motor 2, a first frequency discriminator 40 that detects an error in the output signal of the first frequency generator 3 with respect to a reference period, and a reference signal generator. 42 and
A first phase comparator 41 detects a phase error between the rotational phase signal obtained from the phase detector 4 and the reproduced reference signal obtained from the reference signal generator 42; and a phase error output of the first phase comparator 41; a first adder 43 that mixes the speed error output of the first frequency discriminator 40; a first amplifier 44;
A first drive circuit 12 that drives the cylinder motor 2, a capstan motor 6 that runs the magnetic tape at a constant speed, a second frequency generator 7 that detects the rotational speed of the capstan motor 6, and the magnetic tape 1. a control head 5 that detects a control signal recorded on the lower end of the
a second frequency discriminator 45 that detects an error in the output signal of the second frequency generator 7 with respect to a reference period; and a tracking monochrome that is triggered by the output signal of the reference signal generator 42 and whose delay time is varied by a variable resistor 50. Multi circuit 46
a second phase comparator 47 that detects a phase error between the control signal obtained from the control head 5 and the output signal of the tracking monomulti circuit 46; and a phase error output of the second phase comparator 47. a second adder 48 that mixes the speed error output of the second frequency discriminator 45;
, a second amplifier 49 , and a second drive circuit 13 that drives the capstan motor 6 .

The operation of the VTR constructed as described above will be briefly explained with reference to the configuration diagram in FIG. U and the timing chart of the main parts shown in FIG.

FIG. 12N shows the output waveform of the reference signal generator 42 in FIG. 11, and this signal is used as a reference signal during VTR playback.
The signal is supplied to a first phase comparator 41 and a tracking monomulti circuit 46 . The trapezoidal wave signal in FIG. 120 is the internal waveform of the first phase comparator 41, and is the phase reference signal of the cylinder motor triggered by the rising edge in FIG. The rotational phase signal obtained from the first frequency discriminator 40, that is, the hold signal (not shown) sampled by the falling edge of FIG. The signals are mixed by a first adder 43 and supplied to the first drive circuit 12 via a first amplifier 44 . Therefore, the cylinder motor, that is, the rotary head 8 rotates in phase synchronization with the reference signal shown in FIG. 12N. FIG. 12 Q is a charging/discharging waveform of a capacitor (not shown) in the tracking monomulti circuit 46 of FIG. 11, which is triggered by the rising edge of FIG. By changing the constant, the delay time can be varied. 12R is the output waveform of the tracking monomulti circuit 46, the trapezoidal wave signal of FIG. 12S is the internal waveform of the second phase comparator 47 of FIG. 11, and the falling edge of FIG. The phase reference signal of the capstan motor triggered by the playback control signal obtained from the control head 5 of FIG. 11, that is, sampled by the rising edge of T of FIG. 12, and its hold signal (not shown) 11th
The speed error signal obtained from the second frequency discriminator 45 shown in the figure is mixed by the second adder 48, and the second frequency discriminator 45
9 to the second drive circuit 13.

Therefore, the capstan motor 6 rotates in phase synchronization with the output signal of the tracking monomulti circuit 46 shown in FIG. 12R, which is obtained by phase-shifting the reference signal N shown in FIG. 8 and the reproduction control signal (T in FIG. 12), the one-rotation head 8 can optimally track the track recorded on the magnetic tape 1.

(Problem to be Solved by the Invention) If the formats of the tracks recorded on the magnetic tape are compatible, the variable resistor 50 may be a fixed resistor, but the magnetic tape expands and contracts due to environmental changes such as temperature changes. or other VTRs with mechanical errors.
When playing back a tape recorded in the above, it is necessary to change the tracking state during playback, that is, the phase relationship between the rotary head and the playback control signal. for that,
The variable resistor 50 shown in FIG. 11 is necessary. Additionally, this variable resistor needs to be a volume with a click point to release it to the user. Generally, the resistance value at the click point of a volume with a click point varies, and in order to correct the variation, another variable resistor is required.

Therefore, conventional VTRs not only require an adjustment volume for tracking, but also require improvements in operability, that is, usability.

The purpose of the present invention is to eliminate the drawbacks of the conventional technology and prevent magnetic tape from expanding and contracting due to environmental changes such as temperature changes.

It also provides stable auto playback for tapes with degraded compatibility recorded on other VTRs with mechanical errors.
An object of the present invention is to provide a magnetic recording/reproducing device that realizes a tracking function.

(Means for Solving the Problems) A magnetic recording and reproducing apparatus of the present invention is provided on an already recorded recording medium in which a frequency modulated wave signal is recorded by a rotating head, and a control signal having a constant period is recorded by the control head. When reproducing a recorded signal, an error with respect to a reference phase in a phase difference between a head switching signal indicating the rotational phase of the rotary head and the reproduced control signal is detected, and the running of the recorded recording medium is detected based on the error signal. A magnetic recording/reproducing device for controlling the rotation of a motor for use in a computer, the tracking variable means for varying the reference phase, and a signal based on the frequency modulated wave signal reproduced from the recorded recording medium as the head switching signal. sampling means for sampling at a constant phase; and difference data between the sample data from the sampling means when the reference phase is varied by the tracking variable means and the sample data immediately before the reference phase is varied, and a reference value. The apparatus is equipped with a comparison means for comparing sizes.

(Function) With the above-described configuration, the present invention can prevent the magnetic tape from expanding or contracting due to environmental changes such as temperature changes, or tapes with deteriorated compatibility recorded on other VTRs with mechanical errors. It is also possible to obtain a magnetic recording and reproducing device that realizes a stable auto-tracking function.

(Example) An example of the present invention will be described based on FIGS. 1 to 10.

FIG. 1 shows a configuration diagram of a VTR having an auto-tracking function according to an embodiment of the present invention.
It controls the cylinder motor 2 that drives the two pairs of rotary heads 8 and 9 that record and reproduce video and audio signals, respectively, and the capstan motor that runs the tape 1 at a constant speed, and also realizes an auto-tracking function. a microprocessor lO and a first one from microprocessor 10;
A first drive circuit 12 that drives the cylinder motor 2 by a signal output via an analog signal output terminal 27 of the first drive circuit 12.
a second drive circuit 13 that drives the capstan motor 6 with a signal output from the microprocessor 10 via a second analog signal output terminal 28; and a reproduction envelope signal obtained from the rotary heads 8 and 9. amplification circuits 14 and 16, respectively, and detection circuits 15 and 17, which peak-detect the amplified reproduction envelope signal.
, the detection output of the detection circuit 15.17 is input, and the detection circuit 17 is controlled by a signal that detects whether or not an audio signal is recorded, that is, when no audio signal is recorded.
Alternatively, the switch circuit 1 selects the output of the detection circuit 15 when the level of the audio signal is below a certain value, and selects the output of the detection circuit 17 when the audio signal is recorded.
8 and a comparator 11 to which the output of the switch circuit 18 is inputted, and a signal outputted from the microprocessor 10 via the third analog signal output terminal 26. 2
1 to 25 include a first frequency generator 3, a first phase detector 4, a control head 5, and a second frequency generator 7.
and the output of the comparator 11 are connected.

Inside the microprocessor IO, there is a register 100 for storing data and a random access memory (indicated by the abbreviation RAM in the figure, hereinafter referred to as RAM).
) 200, a 16-bit arithmetic unit (ALU in the figure) that executes arithmetic and logical operations on digital data.
(hereinafter abbreviated as ALU)
300, and instructions to be executed sequentially are stored in the register 100 via the control bus 450 based on the instructions.
and an instruction execution circuit (indicated by the abbreviation PLA in the figure) 400 that controls the operations of the RAM 200 and ALU 300, and a 17-bit time base counter that counts down the reference clock signal applied to the clock terminal 20. 500 (indicated by the abbreviation TBC in the figure) and the count data of the time base counter 500 is supplied via a counter bus 550, and the output data is supplied to the register 100. RAM M2O
0,' Data bus 60 connected to A L U300
0 to the capture register block (indicated by the abbreviation CAPREG in the figure) 700 and the first to fifth input terminals 21.22.23.24.25, each with a different generation signal. a capture controller (indicated by the abbreviation CAPTRCTRL in the figure) 800 that transfers the count data of the time base counter 500 to the capture register block 700 when the edge of six types of capture symbols having sources arrive;
It is equipped with Further, the reference clock signal applied to the clock terminal 20 is supplied to the instruction execution circuit 400 via a timing generator (indicated by the abbreviation TO in the figure) 900, and the data bus 600 is provided with a read-only signal. Memory (indicated by the abbreviation ROM in the figure, hereinafter abbreviated as ROM) 1000. I10 port 1100. First DA converter 1200. Second DA
Converter 1300 and third DA converter 1400 are connected, and furthermore, RAM 200 and ROMlooO each have address decoders 250 and 1050.

Note that the capture controller 800 and the capture register block 700 take in count data from the time base counter 500 when the edge of the capture signal arrives, and the minimum decomposition accuracy is higher than the instruction execution cycle, and It constitutes a capture circuit that sends the result to the ALU 300, the register 100, or the RAM 200 depending on the instruction.

Regarding the VTR configured as described above, the configuration diagram shown in FIG. 1 and the capture controller 80 shown in FIG.
The operation will be explained with reference to a specific configuration diagram of 0 and a timing chart of the main parts shown in FIG.

First, FIG. 2 shows the capture controller 80 of FIG.
0 is a logic circuit diagram showing a specific configuration example of
l! to the fifth input terminal 21.22.23.24.25! Control unit with the same configuration 810.1 + 20°83
0, 840.850 are connected, and the control units 810.820.830.840.850 each have a common reference clock input terminal 801 and a data transfer lock input terminal 802 to the capture register block 700. , furthermore, a separate reset terminal 81
1.821.831.841.851 and separate flag output terminals 812.822.832.842.852 and 1
Individual data transfer terminal 813.823.833.843
．． I have 853.

Next, FIG. 3 shows a control unit 85 that constitutes the third DA converter 1400 and comparator 11 in FIG. 1 as well as the capture controller 800 shown in FIG.
0 and a capture register block 700, FIG. 3A shows a clock signal waveform applied to the clock terminal 20 of FIG. Figure B is the third
This signal waveform is obtained by frequency-dividing the signal waveform of FIG. A, and this signal is supplied to the reference clock input terminal 801 of FIG. 2 as a reference clock signal. Further, FIG. 3C shows a time base counter 500 constituted by a synchronous counter whose unit stage is a master-slave type flip-flop.
This figure shows the count clock signal waveform of the master part of the flip-flop of each unit stage changes at the leading edge (leading edge) marked with an arrow, and the output of the slave part changes at the trailing edge (trailing edge). output changes. The third diagram shows a clock signal waveform for data transfer created from the signal waveforms of FIGS. 3A and 3B, and is supplied to the data transfer lock input terminal 802 of FIG. Furthermore, FIG. 3E shows the third DA applied to the non-inverting input terminal of the comparator 11 in FIG.
FIG. 3F is an analog output signal of the converter 1400, and FIG. It's a signal.

Now, when the signal waveform shown in FIG. 3F is applied to the fifth input terminal 25 in FIG.
At the point in time, the output level of the NAND gate 854 shifts to "1" as shown in FIG. 3G, and furthermore,
At the point when the level of the reference clock input terminal 801 shifts to "0", the output level of the NAND gate 855 shifts to "1" as shown in FIG. When it moves to "1".

The output level of the NAND gate 856 shifts to "1" as shown in Figure 3. NAND gate 854°855,
Each of the 856's forms a bistable circuit with another NAND gate that pairs with them, so once the output level shifts to "1", it will maintain that state until another NAND AD converter cut signal is applied. However, when the output level of the NAND gate 856 shifts to "1", the paired NAN
The output level of the D gate 857 shifts to "0", and the AND
Since the output level of the gate 858 also shifts to "0", the output level of the NAND gate 854.855 (7) becomes r.
OJL knee back.

In this way, when the leading edge of the external signal arrives at the fifth input terminal 25, the leading edge of the external signal arrives at the second data transfer terminal 8.
A signal waveform as shown in FIG. 3J is sent to 53 via AND gate 859, and this signal causes count data to be transferred from time base counter 5oo to capture register block 700 in FIG.

That is, in the signal waveform of FIG. 3F, the timing at which the level shifts from "0" to "1" depends on the potential of the output signal of the detection circuit 15 or 17 of FIG. The count data of the time base counter 500 transferred to the detection circuit 15 or 17 also depends on the potential of the output signal of the detection circuit 15 or 17.

Note that the output signal of the NAND gate 856 is as follows.

It is sent to the flag output terminal 852 and used as a capture flag signal indicating that the count data of the time base counter 500 has been transferred, and is sent to the reset terminal 8.
After software (program) confirms that this capture flag is set, a reset signal is applied to 51.

Next, FIG. 4 is a configuration diagram showing a specific example of the capture register block 700, in which each data input terminal is connected to the DO terminal to the D7 terminal, and the data output terminal is connected to the Q1 terminal to the Q8 terminal. The unit register 750 consists of 8 memory cells, and the 16 memory cells each have data input terminals connected to the DO terminal to D15 terminal, and data output terminals connected to the Q1 terminal to Q16 terminal. Configured unit register 740.
730 and.

The unit registers 720 and 710 are composed of 16 memory cells each having a data input terminal connected to a D1 terminal to a 016 terminal, and a data output terminal connected to a Q1 terminal to a Q16 terminal. In addition,
Each unit register 710.720.730.740゜75
0 each have two control signal input terminals,
Reading terminal 711.721.731.741.751
are each equipped with a capture controller 8 shown in Fig. 2.
The data transfer signal from 00 is applied, and the select terminal 7
12.722.732.742.752 activates the output side of each unit register by a specific read command stored in the program storage area of the instruction execution circuit 400, and connects the Q1 to Q16 terminals for data output. A select signal for reading is applied to the data bus 600 in FIG. 1 via the data bus 600 of FIG.

Now, the transfer control signal from the data transfer terminal 853 in FIG. 2 is supplied to the read terminal 751 in FIG. However, in the embodiment of the present invention shown in FIG. 1, a mechanism prepared as a capture circuit is used for the scan counter for conversion and the register for storing the conversion result.
The burden on hardware is significantly reduced.

By the way, in FIG. 4, the unit register 730°74
The connection position between the data input terminal and data output terminal of 0 and 750 is shifted by one bit for the following reason.

First, the input section of the 8-bit unit register 750 has a first
The same 8-bit count data as that supplied to DA converter 1400 in the figure is supplied, but to increase the sampling rate, DA converter I 400 and unit register 750 are supplied with time near the LSB (least significant bit). It is preferable to supply the count data of the base counter 500. Regarding the unit registers 730 and 740, the LSB of the time base counter 500 and the LSB of the unit register are made to match in order to improve the resolution of the timing of capturing the edge of the external signal, but the unit registers 710 and 720 are register 730.74
The data input terminal is shifted to the left by one bit so that twice as many intervals can be processed at once with the same number of bits as 0. Such unit register 730.740
For example, when the frequency of the reference clock signal is set to 2 MHz, the unit register 730
．． Count data with a resolution of 500 ns is obtained from 740, while unit register 71o.

720, the arrival period of an external signal having a frequency of about 307 can be measured in one process.

The operation of the VTR having the auto-tracking function configured as described above will be explained with reference to the configuration diagram shown in FIG. 1 and the operation flowcharts and operation waveform diagrams shown in FIGS. 5 to 10.

Figure 5 shows a control means for operating the capstan motor 6 by processing the count data obtained when the leading edge of the control signal recorded on the magnetic tape arrives as the running phase detection data of the magnetic tape, that is, the capstan. 2 is a flowchart showing an example of phase control during motor regeneration using a program built into the microprocessor 10 of FIG. 1; The flowchart in FIG. 5 will be explained with reference to the operational waveform diagram of a conventional VTR in FIG. 12.

Processing blocks 401 and 403 and branch 402 in FIG.
A reference signal for VTR playback, that is, a signal corresponding to N in FIG. The count value corresponding to the leading edge of the next reference signal, that is, the time corresponding to the rising edge of FIG. 12N, is stored in memory 1, and the tracking shift amount,
In other words, the time corresponding to the falling edge of FIG. 12R is written. As will be explained in detail later, the amount of change in the tracking shifter amount from the center value is written in the memory 3 for the auto-tracking function.

Processing blocks 404 and 406 and branch 405 then generate the recapstan motor phase reference signal, i.e. the 12th phase reference signal.
A trapezoidal wave signal corresponding to FIG. If it exceeds, the processing block 406 resets the NL flag (indicating that the reproduction control signal has not arrived) to check whether or not the reproduction control signal has arrived. A count value corresponding to the boundary point between the level (hereinafter abbreviated as H level) period and the slope section is written. Therefore, T in processing block 406
PZ is a constant corresponding to the H level period.

Next, branch 407 checks whether a reproduction control signal has arrived. This means that at the leading edge of the playback control signal applied to the third input terminal 23 of the microprocessor 10 of FIG.
This can be executed by checking whether a CTL flag indicating that the capture controller 800 has transferred the count value of the time base counter 500 to the capture register block 700 is set. If the CTL flag is set, processing then proceeds to block 408 where the accumulator Ace of register 100 of FIG.
The count value latched in the register file, that is, the capture register block 700 in FIG. 1, is transferred to the memory 5 via the register file. After checking the NL flag in branch 409, processing block 41O and branch 411 determine that the time when the control signal arrived is the time written in memory 4, that is, H in FIG.
It is determined whether it is earlier than the boundary point between the level section and the slope section. If yes, the process proceeds to processing block 413, where the accumulator Ace is set to a value corresponding to the H level in FIG.

Processing block 412 and branch 414 now check whether the arrival time of the control signal has passed the slope section of FIG. 12S. Processing block 4
KE15HA in 12 is a count value (constant) corresponding to the slope section of FIG. A value corresponding to the low level (hereinafter abbreviated as L level) of the wave signal is set.

Then, according to processing blocks 419 and 420, the value corresponding to the phase error left in the accumulator Ace is written to the memory 6, and the NL flag is set.

If the control signal has not arrived in branch 407, that is, if the CTL flag is not set, processing block 416 and branch 417 cause the count value of time base counter 500 to change to the slope section and L level section of FIG. Check whether the time corresponding to the boundary point of FIG.
A value corresponding to the level is set, and the processing block 41
Phase control of the capstan motor 6 is performed by 0 or more, which advances to 9.

Next, the auto-tracking operation will be explained using the flowcharts shown in FIGS. 6 and 8 and the operation waveform diagram shown in FIG. 7.

FIG. 6 shows a capture circuit and a DA converter in which the reproduced envelope signal obtained from the rotary head 8 or 9 of FIG. 7 is a flowchart showing an example in which a means for capturing digital data AD-converted by a comparator into a memory is realized by a program built in the microprocessor 10 shown in FIG. 1; Fig. 7 is a head switching signal of the rotary head 8 or 9, and Fig. 7 M is a reproduction envelope signal obtained from the rotary head 8 or 9. This shows the signal that was generated. That is, the signal M in FIG. 7 is the signal applied to the inverting input terminal of the comparator 19 in FIG.
0. The signal is AD converted by the capture register block 700 and the like.

Branches 421, 424, and 428 in FIG. 6 are processes for branching the flow according to the value of state variable A set in RAM, that is, memory. First, when A=0, branch 421 Proceeding to processing block 422, it is determined whether the signal level of the head switching signal (H8W, K in FIG. 7) input to the I10 boat 1100 in FIG. Set state variable A to 1.

When A=1, processing block 42 is executed by branch 424.
Proceeding to step 5, it is determined whether the signal level of the head switching signal (hereinafter abbreviated as H8W signal) is H level, and if it is, it means that the rising edge of the H8W signal has been detected, and the process proceeds to processing block 426. Proceed to and set a timer to detect approximately 8ag from the current time. This is because, as can be seen from the envelope signal shown in Figure 7, the envelope signal output obtained from the rotating head is not constant due to variations in the head and non-linearity of the recording track. This is to ensure that the point is always at the same position, that is, approximately 8 degrees behind the rising edge of the H8W signal. In addition, regarding the timer set, time base counter 5 in Figure 1
This can be achieved by using 00 or by using a soft counter based on the number of times a specific instruction on the program has been passed. Processing block 427 then advances to state variable A
Increment to 2.

When A=2, branch 428 causes processing block 42
9 and determines whether the timer set when A=1 has completed counting. If yes, proceed to processing block 430, FIG.

As explained in FIG. 4, the register file containing the digital value obtained by AD converting the peak-detected signal of the reproduced envelope signal (M in FIG. 7), that is, the count latched in the capture register block 700 in FIG. The value is transferred to memory 7. Next, processing block 43
1, the state variable A is reset to 0. By repeating the above flow, the amplitude level of the envelope signal after a certain period of time from the rising edge of the H8W signal can always be taken into the memory.

Although the microprocessor 6 in FIG. 1 of this embodiment does not have an interrupt mechanism, if the microprocessor has one interrupt mechanism, the AD conversion described above can be further facilitated by using the head switching signal as an interrupt signal. Furthermore, in this embodiment, the sampling point is one point per period of the head switching signal, but it can be easily inferred that accuracy is improved by sampling at multiple points and using the average value of the sampling data. .

Next, regarding the main flow of auto tracking,
This will be explained using the flowchart shown in FIG.

First, the branch 432 connects to the first switch circuit 3 of FIG.
Determine whether 1 is pressed by the user or not, and if yes (if the switch is ON), process block 433
Proceeding to step 434, the timer is set to determine the period for detecting the maximum value of the envelope signal amplitude level, and then, in processing block 434, the variable B set in the memory is cleared (=O).
L, proceed to branch 440 6 again. If no in branch 432, the process proceeds to branch 435, where it is determined whether or not the timer set in the processing block 433 has completed counting, and if no, the process proceeds to branch 440, and depending on the value of state variable B, .443.447.45
5. Performs maximum envelope signal level detection processing in which the flow is branched by 459.

First, when B is O, the process proceeds to processing block 441 via branch 440, and processing block 430 in the flow of FIG.
The data in the memory 7 in which the amplitude level of the reproduced envelope signal has been taken is transferred to the accumulator Ace and stored in the memory 8 again.

Then, in processing block 442, state variable B is incremented to one.

When B is 1, processing block 44 is executed by branch 443.
Proceeding to step 4, in order to shift the tracking thick amount by +1, a value corresponding to the tracking amount of 1 is added to the data in the memo IJ3 described in the explanation of FIG. Processing block 445 then sets variable B to 5, and processing block 446 incremented state variable B to 2.

When B is 2, processing block 44 is executed by branch 447.
8, the variable RI is decremented by 1, and then, in branch 449, it is determined whether the variable RI is 0 or not. That is, the processing block 445.4 is
48 and branch 449 implement a soft timer, which delays the time required for the program to pass through processing block 448 five times. This is because it takes time for the first @ capstan motor 6 to complete phase pull-in after the tracking shifter amount is shifted by 1 m in processing block 444. Then, after a predetermined period of time has elapsed, the process proceeds to processing block 450;
About 8 m after the rising edge of the H8W signal after changing the tracking shifter amount, that is, at point a in FIG. 7, the amplitude level of the reproduction envelope is transferred to the accumulator Aco by transferring the data in the memory 7 taken in by the flow shown in FIG. 6, Approximately 8 times from the rising edge of the H8W signal before changing the tracking thick amount, the data and processing block 441 or processing block 454 (described later) are used.
The difference between the maximum amplitude level of the reproduced envelope signal after M and the data stored in the memory 8 is taken. Then, in branch 451, it is determined whether the value remaining in the accumulator Acc is positive or negative. If it is positive, that is, if the envelope signal level after changing the tracking shifter amount is larger than the maximum amplitude level, the state variable B is set to 1 in processing block 452, and processing block 454
At this point, the data in the memory 7 containing the current amplitude level of the reproduced envelope signal is stored in the memory 8.

If it is negative, that is, if the envelope signal level after changing the tracking shifter amount is not larger than the maximum amplitude level, processing block 453 sets the state variable B to 3.
Make it.

When B is 3, processing block 45 is executed by branch 455.
Proceeding to step 6, in order to shift the tracking shifter amount by -1, the value corresponding to the tracking amount of 1 m is subtracted from the data in the memory 3 described in the explanation of FIG. Processing block 457 then sets the variable B to 5, and processing block 458 incremented state variable B to 4.

When B is 4, processing block 46 is executed by branch 459.
The program proceeds to 0, decrements the variable by 1, and then checks whether the variable is O in branch 461. That is, processing block 457.460 using variables
and branch 461 realizes a soft timer,
This results in a delay of the time required for the program to pass through processing block 460 five times. This changes the tracking shifter amount to ll118 in processing block 456.
This is because it takes time for the capstan motor 6 shown in FIG. 1 to complete phase pull-in after shifting. After a predetermined time has elapsed, the process proceeds to processing block 462, and the amplitude level of the reproduction envelope at point a in FIG. 7, approximately 8 meters after the rising edge of the H5W signal after changing the tracking shifter amount, is determined by the flowchart in FIG. 6. The data in the memory 7 taken in by the accumulator A c
c, and in a processing block 454, the difference between that data and the data in the memory 8, which contains the maximum amplitude level of the reproduced envelope signal approximately 8w1s after the rising edge of the H8W signal before changing the tracking shifter amount, is calculated. . Then, in branch 463, it is determined whether the value remaining in the accumulator is positive or negative. If it is positive, that is, if the envelope signal level after changing the tracking shifter amount is greater than the maximum amplitude level, processing block 464 sets state variable B to 3, and processing block 454 captures the current amplitude level of the reproduced envelope signal. The data stored in the memory 7 is stored in the memory 8. If it is negative, that is, if the envelope signal level after changing the tracking shifter amount is smaller than the maximum amplitude level, processing block 465 sets state variable B to 1.

According to the above flow, while the timer set in processing block 433 is counting, the maximum envelope signal level can be obtained by repeatedly shifting the tracking shift amount in the positive or negative direction in the direction in which the amplitude level of the envelope signal increases. When the timer completes counting, the operation is stopped, and the envelope signal level immediately before the stop is detected as the maximum value.

Next, in branch 435, if the timer set in the processing block 433 has completed counting, detection of the maximum envelope signal level has been completed, and branch 435
6, it is determined whether the state variable E (described later) is 5, and if it is not 5 (auto tracking operation is not completed), the process proceeds to branch 469, and branches depending on the value of the state variable E. 469, 473, 481, 485, and 493, the optimal tracking position detection process is performed.

First, when E is 0, processing proceeds to processing block 470 via branch 469, and in order to shift the tracking thick amount by plus 0.5 ms, the data in memory 3 described in the explanation of FIG. 5 is changed to a tracking amount of 0.5 ms. Add value. The process then proceeds to processing block 471, where the variable RI is set to 5, and the state variable E is incremented to 1 at processing block 472.

When E is 1, processing block 47 is executed by branch 473.
Step 4 decrements the variable RI by 1, and then in branch 475 it is determined whether the variable RI is O or not. That is, using the variables, the processing blocks 471.47
4 and branch 475 implement a soft timer, which delays the time required for the program to pass through processing block 448 five times. This changes the tracking shifter amount to 0.5a in processing block 470.
This is because it takes time for the capstan motor 6 in FIG. 1 to complete phase pull-in after the i-shift. Then, after a predetermined period of time has elapsed, the process proceeds to processing block 476;
Approximately 8 ms after the rising edge of the H8W signal after changing the tracking shifter amount, that is, the amplitude level of the reproduced envelope signal at point a in FIG. 7, the data in the memory 7 captured by the flow in FIG. 6 is transferred to the accumulator. The difference between this data and the maximum envelope signal level value (memory 8) detected in the maximum envelope signal level detection processing routine described above is calculated. Then, in branch 477, it is determined whether the value remaining in the accumulator is less than a certain value (negative rotation). If yes, that is, if the envelope signal level after changing the tracking shifter amount is smaller than the maximum amplitude level by ε or more, the process proceeds to processing block 478, after which the current tracking shifter amount (memory 3) is stored in the memory 9. In processing block 479, state variable E is set to 2, and if not, that is, if the envelope signal level after changing the tracking shifter amount is not smaller than the maximum amplitude level by 8 or more, state variable E is set to 0 in processing block 480. do.

When the state variable E is 2, the process proceeds to processing block 482 via branch 481, and the tracking shifter amount is increased by plus 0.
5LL shift, the memory 3 mentioned in the explanation of FIG.
The value corresponding to the tracking amount 0.5@s is subtracted from the data. Processing block 483 then sets the variable E to 5, and processing block 484 incremented state variable E to 3.

When the state variable E is 3, a branch 485 advances to a processing block 486, where the variable is decremented by 1, and then a branch 487 determines whether the variable is O. In other words, using the variables, the processing block 48
3.486 and branch 487 implement a soft timer, which delays the time required for the program to pass through processing block 486 five times. This is done after the tracking shifter amount is shifted by 0.5m in processing block 482, and then the capstan motor 6 in FIG.
This is because it takes time for the phase pull-in to be completed.

After a predetermined period of time has elapsed, the process proceeds to processing block 488, and the amplitude level of the reproduced envelope signal at point a in FIG. 7, approximately 8 IIs after the rising edge of the H8W signal after the tracking shifter has been received, is captured by the flow shown in FIG. The data stored in the memory 7 is transferred to the accumulator, and the difference between the data and the maximum envelope signal level (memory 8) detected in the maximum envelope signal level detection processing routine described above is calculated. Then, in branch 489, it is determined whether the value remaining in the accumulator is less than or equal to a certain value (-E).

If yes, that is, if the envelope signal level after changing the tracking shifter amount is smaller than the maximum amplitude level by ε or more, the process proceeds to processing block 490, after which the current tracking shifter amount (memory 3) is stored in the memory 10. In processing block 491, state variable E is set to 4;
If not, that is, if the envelope signal level after changing the tracking shifter amount is not smaller than the maximum amplitude level by ε or more, processing block 492 sets the state variable E to 2.

When the state variable E is 4, the process proceeds to a processing block 494 via a branch 493, and the average value of the two tracking shifter amounts obtained in the processing blocks 478 and 490 is calculated, and the average value is stored in a memory as the final tracking shifter amount in a processing block 495. It is stored in 3. Then, in processing block 496, the state variable E5 is set.

The above operation will be explained in more detail. FIG. 9 is a diagram showing the relationship between the recording track of the frequency modulated wave signal recorded on the magnetic tape 1 and the rotary head 8 or 9. Generally, since overwriting is performed using the azimuth recording method, the recording track is Width W? The rotating head width W is wider,
As shown in FIG. 10, the relationship between the tracking shifter amount and the reproduced envelope output level has a flat characteristic with no peak in the envelope output level. Therefore,
The tracking position in the processing block 478 is point C in FIG. 10, and the tracking position in the processing block 490 is point d in FIG.

As a result, the optimal tracking position determined in processing block 494 is the point shown in FIG.

By the way, if it is true in the above branch 436, that is, if the auto tracking operation is not in the execution state, the process advances to processing block 437, and the playback is performed approximately 8 times after the rising edge of the H8W signal detected in the above auto tracking operation. The data in the memory 8, in which the maximum amplitude level of the envelope signal is captured, is transferred to the accumulator (Ace), and the data in the accumulator Ace is shifted to the right, that is, halved. next.

Proceeding to processing block 438, in processing block 430 of the flowchart in FIG. If the obtained data is positive,
In other words, the current amplitude level of the reproduced envelope signal is half (6 dB) of the maximum amplitude during auto tracking operation.
If the value is below, the process jumps to processing block 433 and shifts to the auto-tracking state.

Further, the branch 466 is branched depending on the position of the second switch circuit 32 shown in FIG. In other words, the second switch circuit 32 is a three-position switch, and when its output is at H level, the processing block 46
7, a value corresponding to 0.5 m is added to the data in the memory 3 via the accumulator Ace in order to increase the tracking shifter amount by 0.5 m. If the output level of the second switch circuit 32 is at L level, the process moves to processing block 468, and the tracking thick amount is set to 0.
In order to subtract 5ms, a value corresponding to 0.5+as is subtracted from the data in the memory 3 via the accumulator Acc.

This allows manual tracking.

(Effects of the Invention) According to the present invention, magnetic tapes may expand or contract due to environmental changes such as temperature changes, or tapes with deteriorated compatibility recorded on other VTRs with mechanical errors may be used. It is possible to obtain a magnetic recording and reproducing device that realizes a stable auto-tracking function, and furthermore, since it does not require an adjustment volume like a conventional VTR, operability is improved, and its practical effects are extremely large.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a magnetic recording/reproducing device having an auto-tracking function in an embodiment of the present invention, FIG. 2 is a specific logic circuit diagram of the capture controller 800 shown in FIG. 1, and FIG. A timing chart explaining the operation of the circuit shown in FIG. 4 is a chapter register block 700.
Fig. 5, Fig. 6, and Fig. 8 are flowcharts showing the operation of the main parts of Fig. 1, Fig. 7 is a timing chart to explain the flowchart of Fig. 6, and Fig. 9 is a magnetic A diagram showing the relationship between the recording track of the frequency modulated wave signal recorded on the tape 1 and the rotary head 8 or 9,
Fig. 10 shows the playback envelope output level with respect to the tracking shifter amount, Fig. 11 is a block diagram showing the configuration of the servo mechanism during playback of a conventional VTR, and Fig. 12 is for explaining the operation of the main parts in Fig. 11. This is a timing chart. 1...Magnetic tape, 2...Cylinder motor,
6...Capstan motor, 11...Comparator, 100...Register; 200...R
AM, 300...ALU, 400...Instruction execution means, 500...Time base counter, 700'...
Capture register block, 800... Capture controller. 1000...ROM, 1400...DA converter. 842-
．． 852-Frequency η snoring (Q:l CJ Kuchida Tadashi O. Engineering drawing a1 point ma 82 point order ゛ solo m;)

Claims (4)

[Claims] (1) A head that indicates the rotational phase of the rotary head when reproducing a recorded signal of a recorded recording medium in which a frequency modulated wave signal is recorded by a rotary head and a control signal of a constant period is recorded by a control head. A magnetic recording and reproducing device that detects an error in a phase difference between a switching signal and the reproduced control signal with respect to a reference phase, and controls rotation of a motor for running the recorded recording medium based on the error signal. a tracking variable means for varying the reference phase, and a signal based on the frequency modulated wave signal reproduced from the recorded recording medium,
When the reference phase is varied by the sampling means that samples at a constant phase with respect to the head switching signal, and the tracking variable means is varied, the magnitude of the sampling data from the sampling means and the sampling data immediately before varying the reference phase. 1. A magnetic recording and reproducing device comprising: data comparison means for performing comparison. (2) The magnetism according to claim (1), characterized in that the maximum output value of the frequency modulated wave signal is determined by determining the variable direction of the reference phase according to the result of the data comparison means of the tracking variable means. Recording and playback device. (3) The tracking variable means determines, for each variable direction, the amount of variation of the reference phase that decreases by a certain predetermined value from the maximum output value of the frequency modulated wave signal obtained based on the result of the data comparison means, and calculates the average value thereof. 3. The magnetic recording and reproducing apparatus according to claim 1, wherein the final reference phase is used as the final reference phase. (4) The sampling means obtains an average value of a plurality of sampling data obtained by sampling a signal based on the frequency modulated wave signal at a plurality of locations at a constant phase with the head switching signal.
2. The magnetic recording and reproducing apparatus according to claim 1, wherein the final sampling data is used as the final sampling data.