JPS63185233U - - Google Patents

Info

Publication number
JPS63185233U
JPS63185233U JP7675587U JP7675587U JPS63185233U JP S63185233 U JPS63185233 U JP S63185233U JP 7675587 U JP7675587 U JP 7675587U JP 7675587 U JP7675587 U JP 7675587U JP S63185233 U JPS63185233 U JP S63185233U
Authority
JP
Japan
Prior art keywords
mark
sign
semiconductor chip
utility
model registration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7675587U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP7675587U priority Critical patent/JPS63185233U/ja
Publication of JPS63185233U publication Critical patent/JPS63185233U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Wire Bonding (AREA)

Description

【図面の簡単な説明】
図はすべて本考案に関するもので、第１図は本
考案による半導体チツプの自動ボンデイング用標
識の実施例の要部を示す半導体チツプの一部拡大
平面図および断面図、第２図はインナリードボン
デイングされる半導体チツプに本考案を適用した
例の半導体チツプの平面図、第３図はボンデイン
グ線で接続される半導体チツプに本考案を適用し
た例の半導体チツプの平面図である。図において
、 １：半導体チツプの基板、２：燐拡散半導体層
、３：絶縁膜ないしは酸化硅素膜、４：標識とし
てのアルミ膜、５：保護膜ないしは窒化硅素膜、
１０：半導体チツプないしは集積回路、１１：バ
ンプ電極、１２：半導体チツプ内の半導体回路部
、１３：接続パツド、２０〜２２：標識、３０：
フイルムキヤリヤ、３１：フイルムキヤリヤのリ
ード、３２：ボンデイング線、である。

Claims (1)

  1. 【実用新案登録請求の範囲】 (1) 半導体チツプに対する自動ボンデイングの
    際にボンデイングを施すべき場所の位置決め上の
    基準とするために半導体チツプごとに設けられ光
    センサにより検出されるべき標識であつて、該標
    識を半導体チツプの基板内の燐が拡散された半導
    体層の基板表面上に被着されたアルミ膜で形成し
    たことを特徴とする半導体チツプの自動ボンデイ
    ング用標識。 (2) 実用新案登録請求の範囲第１項に記載の標
    識において、標識が方形の半導体チツプの対角線
    の頂点にあたる半導体チツプの少なくとも２個の
    隅に配設されたことを特徴とする半導体チツプの
    自動ボンデイング用標識。 (3) 実用新案登録請求の範囲第１項に記載の標
    識において、標識がボンデイングが施されるべき
    接続パツド等の接続点とは別個に設けられたこと
    を特徴とする半導体チツプの自動ボンデイング用
    標識。 (4) 実用新案登録請求の範囲第３項に記載の標
    識において、標識が接続パツドとは異なる形状な
    いしは寸法に形成されたことを特徴とする半導体
    チツプの自動ボンデイング用標識。 (5) 実用新案登録請求の範囲第１項に記載の標
    識において、標識用の燐が拡散される半導体層お
    よびアルミ膜が半導体チツプ内の他の部分に対す
    ると同一工程で作られることを特徴とする半導体
    チツプの自動ボンデイング用標識。 (6) 実用新案登録請求の範囲第１項に記載の標
    識において、標識としてのアルミ膜が硅素を含む
    アルミからなることを特徴とする半導体チツプの
    自動ボンデイング用標識。 (7) 実用新案登録請求の範囲第１項に記載の標
    識において、標識の検出が半導体チツプに対する
    白熱電灯による照明下で光センサとしてのイメー
    ジセンサによりなされることを特徴とする半導体
    チツプの自動ボンデイング用標識。 (8) 実用新案登録請求の範囲第１項に記載の標
    識において、標識が透明な保護膜により覆われる
    ことを特徴とする半導体チツプの自動ボンデイン
    グ用標識。
JP7675587U 1987-05-21 1987-05-21 Pending JPS63185233U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7675587U JPS63185233U (ja) 1987-05-21 1987-05-21

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7675587U JPS63185233U (ja) 1987-05-21 1987-05-21

Publications (1)

Publication Number Publication Date
JPS63185233U true JPS63185233U (ja) 1988-11-29

Family

ID=30924136

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7675587U Pending JPS63185233U (ja) 1987-05-21 1987-05-21

Country Status (1)

Country Link
JP (1) JPS63185233U (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH034544A (ja) * 1989-05-31 1991-01-10 Nippondenso Co Ltd 位置認識パターン

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH034544A (ja) * 1989-05-31 1991-01-10 Nippondenso Co Ltd 位置認識パターン

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