JPS63181399A - 高熱伝導性厚膜多層配線基板 - Google Patents

高熱伝導性厚膜多層配線基板

Info

Publication number
JPS63181399A
JPS63181399A JP62011287A JP1128787A JPS63181399A JP S63181399 A JPS63181399 A JP S63181399A JP 62011287 A JP62011287 A JP 62011287A JP 1128787 A JP1128787 A JP 1128787A JP S63181399 A JPS63181399 A JP S63181399A
Authority
JP
Japan
Prior art keywords
weight
thick film
crystallized glass
film multilayer
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62011287A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0529160B2 (enExample
Inventor
和夫 近藤
森川　朝男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Niterra Co Ltd
Original Assignee
NGK Spark Plug Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NGK Spark Plug Co Ltd filed Critical NGK Spark Plug Co Ltd
Priority to JP62011287A priority Critical patent/JPS63181399A/ja
Publication of JPS63181399A publication Critical patent/JPS63181399A/ja
Priority to US07/456,087 priority patent/US5122930A/en
Publication of JPH0529160B2 publication Critical patent/JPH0529160B2/ja
Priority to US08/131,560 priority patent/US5352482A/en
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142—Metallic substrates having insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/15—Ceramic or glass substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3731—Ceramic materials or glass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
    • H05K3/4667—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders characterized by using an inorganic intermediate insulating layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Materials Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP62011287A 1987-01-22 1987-01-22 高熱伝導性厚膜多層配線基板 Granted JPS63181399A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP62011287A JPS63181399A (ja) 1987-01-22 1987-01-22 高熱伝導性厚膜多層配線基板
US07/456,087 US5122930A (en) 1987-01-22 1990-01-04 High heat-conductive, thick film multi-layered circuit board
US08/131,560 US5352482A (en) 1987-01-22 1993-10-04 Process for making a high heat-conductive, thick film multi-layered circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62011287A JPS63181399A (ja) 1987-01-22 1987-01-22 高熱伝導性厚膜多層配線基板

Publications (2)

Publication Number Publication Date
JPS63181399A true JPS63181399A (ja) 1988-07-26
JPH0529160B2 JPH0529160B2 (enExample) 1993-04-28

Family

ID=11773778

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62011287A Granted JPS63181399A (ja) 1987-01-22 1987-01-22 高熱伝導性厚膜多層配線基板

Country Status (2)

Country Link
US (1) US5122930A (enExample)
JP (1) JPS63181399A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02210894A (ja) * 1989-02-10 1990-08-22 Mitsubishi Metal Corp 内部に導体、抵抗体を配線したＡｌＮ多層基板の製造方法

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5453293A (en) * 1991-07-17 1995-09-26 Beane; Alan F. Methods of manufacturing coated particles having desired values of intrinsic properties and methods of applying the coated particles to objects
US5614320A (en) * 1991-07-17 1997-03-25 Beane; Alan F. Particles having engineered properties
US6696103B1 (en) * 1993-03-19 2004-02-24 Sumitomo Electric Industries, Ltd. Aluminium nitride ceramics and method for preparing the same
US6297538B1 (en) 1998-03-23 2001-10-02 The University Of Delaware Metal-insulator-semiconductor field effect transistor having an oxidized aluminum nitride gate insulator formed on a gallium nitride or silicon substrate
JP3756041B2 (ja) * 1999-05-27 2006-03-15 Ｈｏｙａ株式会社 多層プリント配線板の製造方法
JP2007266289A (ja) * 2006-03-28 2007-10-11 Tdk Corp 積層型セラミック電子部品およびその製造方法
US8076587B2 (en) * 2008-09-26 2011-12-13 Siemens Energy, Inc. Printed circuit board for harsh environments
RU2390877C1 (ru) * 2009-04-08 2010-05-27 Федеральное государственное унитарное предприятие "Научно-производственное предприятие "Исток" (ФГУП НПП "Исток") Гибридная интегральная схема свч-диапазона
RU2537695C1 (ru) * 2013-06-18 2015-01-10 Федеральное государственное унитарное предприятие "Научно-производственное предприятие "Исток" (ФГУП "НПП "Исток") Способ изготовления мощной гибридной интегральной схемы свч-диапазона
JP6838650B2 (ja) * 2017-03-29 2021-03-03 株式会社村田製作所 パワーモジュール

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3187226A (en) * 1961-08-07 1965-06-01 Curtiss Wright Corp Miniaturized electrical apparatus with combined heat dissipating and insulating structure
US3293501A (en) * 1964-11-24 1966-12-20 Sprague Electric Co Ceramic with metal film via binder of copper oxide containing glass
US3585272A (en) * 1969-10-01 1971-06-15 Fairchild Camera Instr Co Semiconductor package of alumina and aluminum
JPS5228547B2 (enExample) * 1972-07-10 1977-07-27
SU546240A1 (ru) * 1975-03-25 1978-09-25 Предприятие П/Я Г-4515 Микросхема
US4188652A (en) * 1978-01-17 1980-02-12 Smolko Gennady G Electronic device
US4301324A (en) * 1978-02-06 1981-11-17 International Business Machines Corporation Glass-ceramic structures and sintered multilayer substrates thereof with circuit patterns of gold, silver or copper
US4322778A (en) * 1980-01-25 1982-03-30 International Business Machines Corp. High performance semiconductor package assembly
JPS5817651A (ja) * 1981-07-24 1983-02-01 Hitachi Ltd 多層回路板とその製造方法
DE3247985C2 (de) * 1982-12-24 1992-04-16 W.C. Heraeus Gmbh, 6450 Hanau Keramischer Träger
GB2162167B (en) * 1984-06-01 1988-01-20 Narumi China Corp Ceramic substrate material
JPH0634452B2 (ja) * 1985-08-05 1994-05-02 株式会社日立製作所 セラミツクス回路基板
US4788627A (en) * 1986-06-06 1988-11-29 Tektronix, Inc. Heat sink device using composite metal alloy
JPH0777247B2 (ja) * 1986-09-17 1995-08-16 富士通株式会社 半導体装置の製造方法
US4731701A (en) * 1987-05-12 1988-03-15 Fairchild Semiconductor Corporation Integrated circuit package with thermal path layers incorporating staggered thermal vias

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02210894A (ja) * 1989-02-10 1990-08-22 Mitsubishi Metal Corp 内部に導体、抵抗体を配線したＡｌＮ多層基板の製造方法

Also Published As

Publication number Publication date
US5122930A (en) 1992-06-16
JPH0529160B2 (enExample) 1993-04-28

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