JPS63179548U - - Google Patents
Info
- Publication number
- JPS63179548U JPS63179548U JP6690587U JP6690587U JPS63179548U JP S63179548 U JPS63179548 U JP S63179548U JP 6690587 U JP6690587 U JP 6690587U JP 6690587 U JP6690587 U JP 6690587U JP S63179548 U JPS63179548 U JP S63179548U
- Authority
- JP
- Japan
- Prior art keywords
- address
- buffer
- odma
- control device
- register
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000015654 memory Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Bus Control (AREA)
Description
第１図は本考案の一実施例のシステム構成図、
第２図はＤＭＡ制御回路の構成図、第３図はＩ／
Ｏ装置からシステムメモリへデータ転送を行う時
のデータ転送サイクルである。
４…Ｉ／ＯＤＭＡ制御装置。
FIG. 1 is a system configuration diagram of an embodiment of the present invention.
Figure 2 is a configuration diagram of the DMA control circuit, Figure 3 is the I/
This is a data transfer cycle when data is transferred from the O device to the system memory. 4...I/ODMA control device.
Claims (1)
コーダとアドレスドライバと割込回路とＤＭＡ制
御回路とより成るＩ／ＯＤＭＡ制御装置において
、 二つのバツフアアドレスカウンタと、二つのア
ドレスマルチプレクサと、二つの交替バツフアメ
モリと、バツフア切替レジスタとを設けたことを
特徴とするＩ／ＯＤＭＡ制御装置。[Claim for Utility Model Registration] In an I/ODMA control device consisting of an input/output register, a data register, an address decoder, an address driver, an interrupt circuit, and a DMA control circuit, two buffer address counters and two address multiplexers are provided. An I/ODMA control device comprising: a buffer memory, two alternating buffer memories, and a buffer switching register.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6690587U JPS63179548U (en) | 1987-05-06 | 1987-05-06 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6690587U JPS63179548U (en) | 1987-05-06 | 1987-05-06 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63179548U true JPS63179548U (en) | 1988-11-21 |
Family
ID=30905331
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6690587U Pending JPS63179548U (en) | 1987-05-06 | 1987-05-06 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63179548U (en) |
-
1987
- 1987-05-06 JP JP6690587U patent/JPS63179548U/ja active Pending
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