JPS63155646U - - Google Patents
Info
- Publication number
- JPS63155646U JPS63155646U JP1987049156U JP4915687U JPS63155646U JP S63155646 U JPS63155646 U JP S63155646U JP 1987049156 U JP1987049156 U JP 1987049156U JP 4915687 U JP4915687 U JP 4915687U JP S63155646 U JPS63155646 U JP S63155646U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chips
- packaged
- correspondence
- thermal conductivity
- metal film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 5
- 239000000463 material Substances 0.000 claims description 2
- 239000002184 metal Substances 0.000 claims 1
- 239000011347 resin Substances 0.000 claims 1
- 229920005989 resin Polymers 0.000 claims 1
- 238000007789 sealing Methods 0.000 claims 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
第１図は本考案の一実施例を示す半導体素子ア
レイの平面図、第２図は第１図素子アレイのＡ―
Ａ線断面図。
１……半導体チツプ、２……アイランド、３…
…外装材、４……リード線、５……アルミニウム
箔。
FIG. 1 is a plan view of a semiconductor element array showing an embodiment of the present invention, and FIG. 2 is a plan view of the element array shown in FIG. 1.
A-line sectional view. 1...Semiconductor chip, 2...Island, 3...
... Exterior material, 4... Lead wire, 5... Aluminum foil.
Claims (1)
半導体装置において、外装材表面に、上記各半導
体チツプに対応して、熱伝導性良好な金属膜を被
着形成したことを特徴とする半導体素子アレイ。 1. A semiconductor device array in which a plurality of semiconductor chips are packaged by resin sealing, and a metal film having good thermal conductivity is formed on the surface of the package material in correspondence with each of the semiconductor chips.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987049156U JPH0412688Y2 (en) | 1987-03-31 | 1987-03-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987049156U JPH0412688Y2 (en) | 1987-03-31 | 1987-03-31 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63155646U true JPS63155646U (en) | 1988-10-12 |
| JPH0412688Y2 JPH0412688Y2 (en) | 1992-03-26 |
Family
ID=30871345
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987049156U Expired JPH0412688Y2 (en) | 1987-03-31 | 1987-03-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0412688Y2 (en) |
-
1987
- 1987-03-31 JP JP1987049156U patent/JPH0412688Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0412688Y2 (en) | 1992-03-26 |