JPS63155634U - - Google Patents

Info

Publication number
JPS63155634U
JPS63155634U JP1987049713U JP4971387U JPS63155634U JP S63155634 U JPS63155634 U JP S63155634U JP 1987049713 U JP1987049713 U JP 1987049713U JP 4971387 U JP4971387 U JP 4971387U JP S63155634 U JPS63155634 U JP S63155634U
Authority
JP
Japan
Prior art keywords
conductor layer
connection conductor
electrode
emitter
collector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987049713U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987049713U priority Critical patent/JPS63155634U/ja
Publication of JPS63155634U publication Critical patent/JPS63155634U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73257Bump and wire connectors

Landscapes

  • Wire Bonding (AREA)

Description

【図面の簡単な説明】
第1図は本考案の実施例に係わるトランジスタ
を含む回路装置の一部を切断して示す断面図、第
2図は本考案の別の実施例に係わるトランジスタ
を含む回路装置の一部を切断して示す断面図であ
る。 1……基板、2……エミツタ接続導体層、3…
…ベース接続導体層、4……コレクタ接続導体層
、5……厚膜抵抗、6……トランジスタチツプ、
10,11……バンプ、12……ワイヤ。

Claims (1)

  1. 【実用新案登録請求の範囲】 エミツタ接続導体層とベース接続導体層とコレ
    クタ接続導体層とを有する絶縁基板と、 一方の主面にエミツタ電極とベース電極とを有
    し、他方の主面にコレクタ電極を有し、前記エミ
    ツタ電極と前記ベース電極とがバンプによつて前
    記エミツタ接続導体層とベース接続導体層とにそ
    れぞれ接続され、前記コレクタ電極と前記コレク
    タ接続導体層との間がワイヤで接続されているト
    ランジスタチツプと を具備していることを特徴とする回路装置。
JP1987049713U 1987-03-31 1987-03-31 Pending JPS63155634U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987049713U JPS63155634U (ja) 1987-03-31 1987-03-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987049713U JPS63155634U (ja) 1987-03-31 1987-03-31

Publications (1)

Publication Number Publication Date
JPS63155634U true JPS63155634U (ja) 1988-10-12

Family

ID=30872421

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987049713U Pending JPS63155634U (ja) 1987-03-31 1987-03-31

Country Status (1)

Country Link
JP (1) JPS63155634U (ja)

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