JPS63155551U - - Google Patents

Info

Publication number
JPS63155551U
JPS63155551U JP4711887U JP4711887U JPS63155551U JP S63155551 U JPS63155551 U JP S63155551U JP 4711887 U JP4711887 U JP 4711887U JP 4711887 U JP4711887 U JP 4711887U JP S63155551 U JPS63155551 U JP S63155551U
Authority
JP
Japan
Prior art keywords
output
cpu
signal
input
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4711887U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0445067Y2 (US20100056889A1-20100304-C00004.png
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4711887U priority Critical patent/JPH0445067Y2/ja
Publication of JPS63155551U publication Critical patent/JPS63155551U/ja
Application granted granted Critical
Publication of JPH0445067Y2 publication Critical patent/JPH0445067Y2/ja
Expired legal-status Critical Current

Links

Landscapes

  • Bus Control (AREA)
JP4711887U 1987-03-30 1987-03-30 Expired JPH0445067Y2 (US20100056889A1-20100304-C00004.png)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4711887U JPH0445067Y2 (US20100056889A1-20100304-C00004.png) 1987-03-30 1987-03-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4711887U JPH0445067Y2 (US20100056889A1-20100304-C00004.png) 1987-03-30 1987-03-30

Publications (2)

Publication Number Publication Date
JPS63155551U true JPS63155551U (US20100056889A1-20100304-C00004.png) 1988-10-12
JPH0445067Y2 JPH0445067Y2 (US20100056889A1-20100304-C00004.png) 1992-10-23

Family

ID=30867414

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4711887U Expired JPH0445067Y2 (US20100056889A1-20100304-C00004.png) 1987-03-30 1987-03-30

Country Status (1)

Country Link
JP (1) JPH0445067Y2 (US20100056889A1-20100304-C00004.png)

Also Published As

Publication number Publication date
JPH0445067Y2 (US20100056889A1-20100304-C00004.png) 1992-10-23

Similar Documents

Publication Publication Date Title
JPS581451B2 (ja) デ−タ転送方式
JPS63155551U (US20100056889A1-20100304-C00004.png)
JPS58144959A (ja) 制御装置
JP3028998B2 (ja) Dma転送回路
JPH029401Y2 (US20100056889A1-20100304-C00004.png)
JPH01133645U (US20100056889A1-20100304-C00004.png)
JPS5844420Y2 (ja) デ−タ高速処理装置
JPS585133U (ja) デ−タ伝送システム
JPS5851333U (ja) プログラム処理装置
JPS586172B2 (ja) インタ−フエ−ス方式
JPS5851336U (ja) ダイレクト・メモリ・アクセス制御回路
JPS6225217B2 (US20100056889A1-20100304-C00004.png)
JPS6213688B2 (US20100056889A1-20100304-C00004.png)
JPS596202U (ja) シ−ケンス制御装置
JPH0551931B2 (US20100056889A1-20100304-C00004.png)
JPS62127962A (ja) マイクロコンピユ−タ
JPS6010349U (ja) メモリ共有装置
JPH02116346U (US20100056889A1-20100304-C00004.png)
JPH07334451A (ja) ダイレクトメモリアクセスコントローラ装置
JPS60184144U (ja) マイクロコンピユ−タ装置
JPS63143947U (US20100056889A1-20100304-C00004.png)
JPS6439540U (US20100056889A1-20100304-C00004.png)
JPS61286956A (ja) デ−タ処理装置
JPH04367950A (ja) Ramのアクセス制御回路
JPH023853A (ja) Cpuのインタフェース方法