JPS6315430A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS6315430A
JPS6315430A JP15921286A JP15921286A JPS6315430A JP S6315430 A JPS6315430 A JP S6315430A JP 15921286 A JP15921286 A JP 15921286A JP 15921286 A JP15921286 A JP 15921286A JP S6315430 A JPS6315430 A JP S6315430A
Authority
JP
Japan
Prior art keywords
insulating substrate
semiconductor
semiconductor device
substrate
fixed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15921286A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0558569B2 (enrdf_load_stackoverflow
Inventor
Susumu Kobayashi
進 小林
Atsushi Maruyama
篤 丸山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP15921286A priority Critical patent/JPS6315430A/ja
Publication of JPS6315430A publication Critical patent/JPS6315430A/ja
Publication of JPH0558569B2 publication Critical patent/JPH0558569B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01019—Potassium [K]

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP15921286A 1986-07-07 1986-07-07 半導体装置の製造方法 Granted JPS6315430A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15921286A JPS6315430A (ja) 1986-07-07 1986-07-07 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15921286A JPS6315430A (ja) 1986-07-07 1986-07-07 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS6315430A true JPS6315430A (ja) 1988-01-22
JPH0558569B2 JPH0558569B2 (enrdf_load_stackoverflow) 1993-08-26

Family

ID=15688773

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15921286A Granted JPS6315430A (ja) 1986-07-07 1986-07-07 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS6315430A (enrdf_load_stackoverflow)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0727818A1 (en) * 1993-07-20 1996-08-21 Fuji Electric Co., Ltd. Zirconia-added alumina substrate with direct bonding of copper
US5675181A (en) * 1995-01-19 1997-10-07 Fuji Electric Co., Ltd. Zirconia-added alumina substrate with direct bonding of copper
JP2008288414A (ja) * 2007-05-18 2008-11-27 Fuji Electric Device Technology Co Ltd 半導体モジュール及び半導体モジュールの製造方法
US7529093B2 (en) 2004-11-26 2009-05-05 Sanyo Electric Co., Ltd. Circuit device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0727818A1 (en) * 1993-07-20 1996-08-21 Fuji Electric Co., Ltd. Zirconia-added alumina substrate with direct bonding of copper
US5675181A (en) * 1995-01-19 1997-10-07 Fuji Electric Co., Ltd. Zirconia-added alumina substrate with direct bonding of copper
US7529093B2 (en) 2004-11-26 2009-05-05 Sanyo Electric Co., Ltd. Circuit device
JP2008288414A (ja) * 2007-05-18 2008-11-27 Fuji Electric Device Technology Co Ltd 半導体モジュール及び半導体モジュールの製造方法

Also Published As

Publication number Publication date
JPH0558569B2 (enrdf_load_stackoverflow) 1993-08-26

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