JPS63150943A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS63150943A
JPS63150943A JP29655086A JP29655086A JPS63150943A JP S63150943 A JPS63150943 A JP S63150943A JP 29655086 A JP29655086 A JP 29655086A JP 29655086 A JP29655086 A JP 29655086A JP S63150943 A JPS63150943 A JP S63150943A
Authority
JP
Japan
Prior art keywords
film
silicide
titanium
silicon
molybdenum
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP29655086A
Other languages
Japanese (ja)
Inventor
Yutaka Misawa
三沢 豊
Masaichiro Asayama
匡一郎 朝山
Hideo Honma
本間 秀男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP29655086A priority Critical patent/JPS63150943A/en
Publication of JPS63150943A publication Critical patent/JPS63150943A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To diffuse silicon atoms into all laminated metallic layers, and to realize the low resistance and chemical resistance as a laminated silicide film simultaneously by optimizing a heat treatment atmosphere and a temperature at a time when a laminated metallic film is converted into silicide. CONSTITUTION:A silicon dioxide film 2 is formed onto an silicon substrate 1, and the silicon dioxide film is removed partially through etching. A titanium film 51 is shaped onto the substrate and the residual oxide film 2. A molybdenum film 52 is formed. The titanium film 51 and the molybdenum film 52 are converted into silicide at the same time through annealing at 550 deg.C in an argon atmosphere. Sections not silicified are gotten rid of through etching. Annealing at 550 deg.C represents a self-alignment technique in which the reaction of titanium and the silicon dioxide film is prevented and only an silicon exposed section is silicified. A titanium silicide film having low resistance and a molybdenum silicide film having chemical resistance are obtained through annealing at 900 deg.C in the argon atmosphere.

Description

【発明の詳細な説明】 [産業上の利用分野〕 本発明は、半導体装置の製造方法に係り、特にシリサイ
ド膜を用いた半導体装置の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing a semiconductor device using a silicide film.

[従来の技術] 従来の半導体装置の製造方法は、特開昭60−9766
8号公報に記載のようなものがある。以下にそれを説明
する。第2図において、1は半導体基板、2は前記半導
体基板上に形成されたシリコン酸化膜、3は前記シリコ
ン酸化膜上に形成された多結晶シリコン膜、6は前記多
結晶シリコン膜上に形成された少なくとも2種類からな
る積層の高融点金属とシリコンの金属間化合物膜(以下
シリサイド膜という)である。積層シリサイド膜6は少
なくとも2種類からなる高融点金属とシリコンを熱処理
によって形成する方法が用いられてきた。
[Prior art] A conventional method for manufacturing a semiconductor device is disclosed in Japanese Patent Application Laid-Open No. 60-9766.
There is something like the one described in Publication No. 8. This will be explained below. In FIG. 2, 1 is a semiconductor substrate, 2 is a silicon oxide film formed on the semiconductor substrate, 3 is a polycrystalline silicon film formed on the silicon oxide film, and 6 is a polycrystalline silicon film formed on the polycrystalline silicon film. This is a laminated intermetallic compound film of high melting point metal and silicon (hereinafter referred to as silicide film) consisting of at least two types of silicide films. The laminated silicide film 6 has been formed by a method of forming at least two kinds of high melting point metals and silicon by heat treatment.

しかし特開昭60−97668号の実施例にあるように
、耐薬品性の高いモリブデンシリサイドを上層に。
However, as shown in the example of JP-A-60-97668, molybdenum silicide with high chemical resistance is used as an upper layer.

低抵抗のチタンシリサイドを下層に形成しモリブデンシ
リサイドのアルミに対するバリア性及び耐薬品性と、チ
タンシリサイドの低抵抗性を同時に満足しようとする時
、下層のチタンと反応し得る雰囲気中(例えば窒素中)
で熱処理するとモリブデンとチタンの界面でモリブデン
中を拡散してきた窒素が下層のチタンと反応し界面にシ
リコン原子の拡散障壁となるチタン窒化物が形成され下
地シリコン原子がモリブデン中に供給されず、積層シリ
サイド膜が形成されない。したがって耐フツ酸性が得ら
れず、上記シリサイド膜の目的を達成できない。
When forming low-resistance titanium silicide as a lower layer to simultaneously satisfy the barrier properties and chemical resistance against aluminum of molybdenum silicide and the low resistance of titanium silicide, it is necessary to )
When heat treated with , the nitrogen that has diffused through the molybdenum at the interface between molybdenum and titanium reacts with the underlying titanium, forming titanium nitride that acts as a diffusion barrier for silicon atoms at the interface, preventing the underlying silicon atoms from being supplied to the molybdenum and forming a stacked layer. No silicide film is formed. Therefore, hydrofluoric acid resistance cannot be obtained, and the purpose of the silicide film cannot be achieved.

さらに、熱処理温度によっては2種以上の積層金属同志
が反応し積層シリサイド膜全体の抵抗率が高くなる場合
や、シリサイド化反応が終了せずやはりシリサイド膜の
抵抗が高くなる場合があった。
Further, depending on the heat treatment temperature, two or more types of laminated metals may react with each other, increasing the resistivity of the entire laminated silicide film, or the silicidation reaction may not be completed, resulting in a high resistance of the silicide film.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記従来技術は積層金属膜を熱処理する際、全抗性に問
題があった。
The above conventional technology has a problem in total resistance when heat treating a laminated metal film.

本発明の目的は上記のような従来のシリサイド暎製造法
の欠点を除去し、積層シリサイド膜の特徴を遺憾なく発
揮し、半導体装置の電気的特性の改善と半導体装置製造
プロセスの安定化を可能とする半導体装置の製造方法を
提供することにある。
The purpose of the present invention is to eliminate the drawbacks of the conventional silicide manufacturing method as described above, to fully utilize the characteristics of a multilayer silicide film, and to improve the electrical characteristics of semiconductor devices and stabilize the semiconductor device manufacturing process. An object of the present invention is to provide a method for manufacturing a semiconductor device.

〔問題点を解決するための手段〕[Means for solving problems]

上記目的は、積層金属膜をシリサイド化する際の熱処理
雰囲気と温度を適正化することにより、達成される。
The above object is achieved by optimizing the heat treatment atmosphere and temperature when siliciding the laminated metal film.

【作用〕[Effect]

熱処理雰囲気としての、0族元素(希ガス)は上層と下
層の金属膜との界面で反応を起さず、反応生成物を生じ
ない。それによって下地シリコンは拡散を妨げられるこ
となく上層へ供給され一様な積層シリサイド膜が形成で
きる。
Group 0 elements (rare gas) used as the heat treatment atmosphere do not react at the interface between the upper layer and the lower metal film, and do not generate reaction products. Thereby, the underlying silicon is supplied to the upper layer without being hindered from diffusing, and a uniform layered silicide film can be formed.

750’C〜950℃の熱処理温度は各層の金属膜を、
その本来の特性を持つシリサイ、ド膜に変態を持ったシ
リサイドとなり積層化することにより単層シリサイドだ
けでは得られない秀れた特性を得ることができる。
The heat treatment temperature of 750'C to 950°C makes each layer of metal film
Silicide with its original properties becomes a silicide with transformation into a film, and by stacking it, it is possible to obtain excellent properties that cannot be obtained with single-layer silicide alone.

〔実施例〕〔Example〕

以下1本発明の一実施例を第3図により説明する。第3
図(a)〜(c)に積層シリサイド膜の製造工程を示す
。シリコン基板1の上にシリコン酸化膜2を形成し、エ
ツチングによりシリコン酸化膜を部分的に除去する。そ
の上に低抵抗のシリサイドを形成する高融点金属膜、例
えばチタン膜51を500人形成する(a)。次に耐食
性の高いシリサイドを形成する高融点金属膜、例えばモ
リブデン膜52を100人形成する(b)。その後希ガ
ス中(例えばアルゴン雰囲気中)550℃でアニールし
チタン膜51.モリブデン膜52を同時にシリサイド化
する。シリサイド化しなかった部分をエツチングし除去
する(c)、550℃′セルファライン化の技術である
が、このままでは抵抗が高いので、次に希ガス中(例え
ばアルゴン雰囲気中)900℃でアニールし、低抵抗の
チタンシリサイド膜と耐薬品性のモリブデンシリサイド
収を得る。
An embodiment of the present invention will be described below with reference to FIG. Third
Figures (a) to (c) show the manufacturing process of a laminated silicide film. A silicon oxide film 2 is formed on a silicon substrate 1, and the silicon oxide film is partially removed by etching. Thereon, 500 people form a high melting point metal film, for example a titanium film 51, forming a low resistance silicide (a). Next, 100 people form a high melting point metal film, such as a molybdenum film 52, which forms silicide with high corrosion resistance (b). Thereafter, the titanium film 51 is annealed at 550° C. in a rare gas (for example, in an argon atmosphere). The molybdenum film 52 is simultaneously silicided. (c) This is a 550°C self-lining technique in which the portions that have not been silicided are etched and removed, but the resistance is high as is, so next, annealing is performed at 900°C in a rare gas (for example, in an argon atmosphere). Obtain a titanium silicide film with low resistance and a molybdenum silicide film with chemical resistance.

第1図(、)に、本発明による製法により形成した積層
シリサイド膜の耐薬品(耐フッ酸性)を、従来の製@(
例えば窒素中アニールによる)により形成した積層シリ
サイド膜および積層しないチタンシリサイド単層膜と比
較した実験結果を示す。
Figure 1 (,) shows the chemical resistance (hydrofluoric acid resistance) of the multilayer silicide film formed by the manufacturing method of the present invention.
Experimental results are shown comparing a stacked silicide film formed by, for example, annealing in nitrogen and a titanium silicide single layer film that is not stacked.

縦軸は積層シリサイド膜のシート抵抗、横軸はフッ酸に
よるエツチング時間を表わす、窒素中でアニールした従
来法では短時間のうちにシリコンのシート抵抗値に達し
、積層シリサイド膜がエツチングされたことを示してい
るが1本発明による方法ではほとんどエツチングされな
いことがわかる。
The vertical axis represents the sheet resistance of the multilayer silicide film, and the horizontal axis represents the etching time with hydrofluoric acid.In the conventional method of annealing in nitrogen, the sheet resistance of silicon was reached in a short time, indicating that the multilayer silicide film was etched. However, it can be seen that the method according to the present invention causes almost no etching.

第1図(b)に、積層シリサイド膜のアニール温度とシ
ート抵抗の関係を示す。これより750〜950℃の間
で最も抵抗が低くなっていることがわかる。750℃以
下では完全にTi5izまたはtetragonclな
M o S x xになっていないので抵抗が高い、一
方、950℃以下ではT i S i 2とM o S
 i zの相互拡散が生じ混合層となっているため抵抗
が高くなっている。
FIG. 1(b) shows the relationship between the annealing temperature and sheet resistance of the laminated silicide film. It can be seen from this that the resistance is lowest between 750 and 950°C. Below 750℃, the resistance is high because it is not completely Ti5iz or tetragoncl MoS x
Interdiffusion of i and z occurs to form a mixed layer, resulting in high resistance.

WSjとTi5izの場合も同様な結果となる。Similar results are obtained for WSj and Ti5iz.

以上は単純なシリコン露出部における積層シリサイド膜
の形成方法であるが、ゲート上や拡散層上へも同様にし
て第2図のようにセルファラインで積層シリサイド膜を
形成することができる。
The above is a simple method for forming a laminated silicide film on an exposed silicon portion, but a laminated silicide film can also be formed on a gate or a diffusion layer in a similar manner using a self-alignment line as shown in FIG.

積層シリサイド膜はシリコンと高融点金属を同時にスパ
ッタする。ニスバッタ法でも可能であるが、スパッタ後
には膜の組成安定化や反応の終結のためやはリアニール
が必要である。この場合のアニールにも本発明は有効で
ある。
A laminated silicide film is created by sputtering silicon and a high-melting point metal at the same time. Although varnish sputtering is also possible, reannealing is required after sputtering to stabilize the film composition and terminate the reaction. The present invention is also effective for annealing in this case.

このようにして形成したチタンシリサイド膜とモリブデ
ンシリサイド膜の積層膜は低抵抗性を持つ下層のチタン
シリサイド膜を、耐食性に優れた上層のモリブデンシリ
サイド膜で保護する結果となり低抵抗性と耐食性を同時
に実現することができる。
The laminated film of titanium silicide film and molybdenum silicide film formed in this way protects the lower layer titanium silicide film, which has low resistance, with the upper layer molybdenum silicide film, which has excellent corrosion resistance, and has low resistance and corrosion resistance at the same time. It can be realized.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によれば積層した金属層中
すべてにシリコン原子が拡散し、かつ金属原子同志の混
合も起らないため積層した金属膜はすべて単層のシリサ
イド膜と同じ特性を持つシリサイド膜となり、積層シリ
サイド膜としての低抵抗性と耐薬品性を同時に実現する
ことができる。
As explained above, according to the present invention, silicon atoms diffuse into all the stacked metal layers and no mixing of metal atoms occurs, so all stacked metal films have the same characteristics as a single-layer silicide film. This makes it possible to simultaneously achieve low resistance and chemical resistance as a multilayer silicide film.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)は本発明により形成した積層シリサイド膜
の耐フッ酸性を従来法と比較した結果を示す図、第1図
(b)はアニール温度による積層シリサイド膜の抵抗変
化を示す図、第2図は積層シリサイド膜をセルファライ
ンによりゲート及び拡散層上に形成した半導体装置の断
面図、第3図(a)〜(−)は単純なシリコンの露出面
に積層シリサイド膜を形成する場合の工程図である。 1・・・半導体基板、2・・・シリコン酸化膜、3・・
・多結晶シリコン膜、4・・・素子分離用シリコン酸化
膜、茅 1 口 (λ) 工°v + ; 7  需用 (bノ アニーl/工廣 (′C) 茅2 目
FIG. 1(a) is a diagram showing the result of comparing the hydrofluoric acid resistance of the multilayer silicide film formed by the present invention with that of the conventional method, FIG. 1(b) is a diagram showing the resistance change of the multilayer silicide film depending on the annealing temperature, Figure 2 is a cross-sectional view of a semiconductor device in which a stacked silicide film is formed on the gate and diffusion layer by self-line, and Figures 3 (a) to (-) are cases in which a stacked silicide film is formed on the exposed surface of simple silicon. This is a process diagram. 1... Semiconductor substrate, 2... Silicon oxide film, 3...
・Polycrystalline silicon film, 4...Silicon oxide film for element isolation, 1 mouth (λ) engineering °v +; 7 demand (b no annealing l / engineering ('C) 2 eyes

Claims (1)

【特許請求の範囲】[Claims] 1、多結晶シリコン膜又は単結晶シリコン膜表面にチタ
ンシリサイド膜とモリブデンシリサイドまたはタングス
テンシリサイド膜を積層する工程を含む半導体装置の製
造方法に於いて、前記工程は、チタンとモリブデンを順
次堆積する工程およびアルゴン中で少なくとも750〜
950℃で熱処理する工程とを含むことを特徴とする半
導体装置の製造方法。
1. In a method for manufacturing a semiconductor device including a step of laminating a titanium silicide film and a molybdenum silicide or a tungsten silicide film on the surface of a polycrystalline silicon film or a single crystal silicon film, the step is a step of sequentially depositing titanium and molybdenum. and at least 750 ~ in argon
A method for manufacturing a semiconductor device, comprising the step of heat treatment at 950°C.
JP29655086A 1986-12-15 1986-12-15 Manufacture of semiconductor device Pending JPS63150943A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29655086A JPS63150943A (en) 1986-12-15 1986-12-15 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29655086A JPS63150943A (en) 1986-12-15 1986-12-15 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS63150943A true JPS63150943A (en) 1988-06-23

Family

ID=17834986

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29655086A Pending JPS63150943A (en) 1986-12-15 1986-12-15 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS63150943A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5356837A (en) * 1993-10-29 1994-10-18 International Business Machines Corporation Method of making epitaxial cobalt silicide using a thin metal underlayer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5356837A (en) * 1993-10-29 1994-10-18 International Business Machines Corporation Method of making epitaxial cobalt silicide using a thin metal underlayer

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