JPS63146492U - - Google Patents
Info
- Publication number
- JPS63146492U JPS63146492U JP1987037817U JP3781787U JPS63146492U JP S63146492 U JPS63146492 U JP S63146492U JP 1987037817 U JP1987037817 U JP 1987037817U JP 3781787 U JP3781787 U JP 3781787U JP S63146492 U JPS63146492 U JP S63146492U
- Authority
- JP
- Japan
- Prior art keywords
- count
- reversible counter
- count value
- input
- value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000002441 reversible effect Effects 0.000 claims description 6
- 230000010354 integration Effects 0.000 claims 3
- 238000010586 diagram Methods 0.000 description 2
- 239000013256 coordination polymer Substances 0.000 description 1
Landscapes
- Control Of Electric Motors In General (AREA)
- Analogue/Digital Conversion (AREA)
Description
第１図は本考案の高精度追従比較型速度電圧発
生回路の一実施例を示すブロツク図、第２図は本
実施例のアルゴリズムの説明図である。
１，７，８，１１……ＡＬＵ、２，３，４，５
，６，１２……Ｄフリツプフロツプ、９……Ｄ／
Ａコンバータ、１０……可逆カウンタ、２１……
可逆カウンタ１０の計数値、２２……第１の積分
手段の積分値、２３……第２の積分手段の積分値
、２４……各積分値２２，２３の変化値、＋，
−……エンコーダの出力パルス、Ｃ……キヤリ
ー信号、ＣＰ，ＴＳＭＰ……クロツク信号。
FIG. 1 is a block diagram showing an embodiment of the high-precision follow-up comparison type speed voltage generating circuit of the present invention, and FIG. 2 is an explanatory diagram of the algorithm of this embodiment. 1, 7, 8, 11...ALU, 2, 3, 4, 5
, 6, 12...D flip-flop, 9...D/
A converter, 10... Reversible counter, 21...
Count value of reversible counter 10, 22... Integral value of first integrating means, 23... Integral value of second integrating means, 24... Change value of each integral value 22, 23, +,
-... Encoder output pulse, C... Carry signal, CP, TSMP... Clock signal.
Claims (1)
カウンタで計数し、かつ、その計数値に比例する
カウントアツプおよびカウントダウン時のキヤリ
ー信号レートを第１の積分手段により生成して、
そのキヤリー信号パルスをそれぞれ前記可逆カウ
ンタの二つの入力端子のうち計数値の絶対値を減
ずる側の入力端子に入力させることにより、可逆
カウンタから出力される計数値を追従平衡させ、
平衡した計数値をＤ／Ａコンバータによりアナロ
グ電圧に変換する追従比較型速度電圧発生回路に
おいて、 可逆カウンタから出力された計数値のＭＳＢを
入力し、かつ、第１の積分手段からキヤリー信号
パルスを入力する毎に、ＭＳＢが０のときは１を
、また、ＭＳＢが１のときは−１を順次に第１の
積分手段と同期して積算する第２の積分手段と、 第１および第２の積分手段の積分した計数値を
それぞれに入力して、第１および第２の積分手段
の動作クロツク周期の任意の整数倍の周期毎に該
入力計数値をラツチするとともに、次の周期に入
力された計数値とラツチされている前回の計数値
との差を演算し、Ｄ／Ａコンバータを介して出力
する速度電圧発生手段を有することを特徴とする
高精度追従比較型速度電圧発生回路。[Claims for Utility Model Registration] Pulses output from a pulse encoder are counted by a reversible counter, and a carry signal rate during count up and count down proportional to the counted value is generated by a first integrating means,
By inputting the carry signal pulse to the input terminal of the reversible counter that reduces the absolute value of the count value, the count value output from the reversible counter is tracked and balanced;
In a follow-up comparison type speed voltage generation circuit that converts a balanced count value into an analog voltage using a D/A converter, the MSB of the count value output from the reversible counter is input, and a carry signal pulse is input from the first integrating means. a second integrating means that sequentially integrates 1 when the MSB is 0 and -1 when the MSB is 1 in synchronization with the first integrating means; The integrated count values of the first and second integration means are inputted to each of the first and second integration means, and the input count values are latched every cycle that is an arbitrary integral multiple of the operation clock cycle of the first and second integration means, and inputted in the next cycle. 1. A high-precision follow-up comparison type speed voltage generation circuit comprising a speed voltage generation means for calculating the difference between the counted value and the previous latched count value and outputting the result via a D/A converter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987037817U JPH0611450Y2 (en) | 1987-03-17 | 1987-03-17 | High-precision tracking comparison type speed voltage generator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987037817U JPH0611450Y2 (en) | 1987-03-17 | 1987-03-17 | High-precision tracking comparison type speed voltage generator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63146492U true JPS63146492U (en) | 1988-09-27 |
| JPH0611450Y2 JPH0611450Y2 (en) | 1994-03-23 |
Family
ID=30849484
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987037817U Expired - Lifetime JPH0611450Y2 (en) | 1987-03-17 | 1987-03-17 | High-precision tracking comparison type speed voltage generator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0611450Y2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0480138U (en) * | 1990-11-27 | 1992-07-13 | ||
| JP2008113477A (en) * | 2006-10-30 | 2008-05-15 | Fujitsu Access Ltd | Electronic thermal device |
-
1987
- 1987-03-17 JP JP1987037817U patent/JPH0611450Y2/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0480138U (en) * | 1990-11-27 | 1992-07-13 | ||
| JP2008113477A (en) * | 2006-10-30 | 2008-05-15 | Fujitsu Access Ltd | Electronic thermal device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0611450Y2 (en) | 1994-03-23 |
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