JPS6314378B2 - - Google Patents

Info

Publication number
JPS6314378B2
JPS6314378B2 JP57112614A JP11261482A JPS6314378B2 JP S6314378 B2 JPS6314378 B2 JP S6314378B2 JP 57112614 A JP57112614 A JP 57112614A JP 11261482 A JP11261482 A JP 11261482A JP S6314378 B2 JPS6314378 B2 JP S6314378B2
Authority
JP
Japan
Prior art keywords
variable
cell
boolean expression
value
stored
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57112614A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5848153A (ja
Inventor
Baasuteisu Bikutaasu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS5848153A publication Critical patent/JPS5848153A/ja
Publication of JPS6314378B2 publication Critical patent/JPS6314378B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30029—Logical and Boolean instructions, e.g. XOR, NOT

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Devices For Executing Special Programs (AREA)
  • Debugging And Monitoring (AREA)
  • Complex Calculations (AREA)
JP57112614A 1981-09-08 1982-07-01 ブ−ル式の評価装置 Granted JPS5848153A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/300,133 US4417305A (en) 1981-09-08 1981-09-08 Method for evaluating boolean expressions
US300133 1981-09-08

Publications (2)

Publication Number Publication Date
JPS5848153A JPS5848153A (ja) 1983-03-22
JPS6314378B2 true JPS6314378B2 (cg-RX-API-DMAC7.html) 1988-03-30

Family

ID=23157850

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57112614A Granted JPS5848153A (ja) 1981-09-08 1982-07-01 ブ−ル式の評価装置

Country Status (3)

Country Link
US (1) US4417305A (cg-RX-API-DMAC7.html)
EP (1) EP0073901A3 (cg-RX-API-DMAC7.html)
JP (1) JPS5848153A (cg-RX-API-DMAC7.html)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4831521A (en) * 1983-11-10 1989-05-16 General Signal Corporation Vital processor implemented with non-vital hardware
US4722071A (en) * 1985-04-19 1988-01-26 Pertron Controls, Corporation Compiler for evaluating Boolean expressions
GB8929158D0 (en) * 1989-12-23 1990-02-28 Int Computers Ltd Database system
US7296163B2 (en) * 2000-02-08 2007-11-13 The Trustees Of Dartmouth College System and methods for encrypted execution of computer programs
US7735080B2 (en) * 2001-08-30 2010-06-08 International Business Machines Corporation Integrated system and method for the management of a complete end-to-end software delivery process
US6959314B1 (en) 2002-05-13 2005-10-25 Eurica Califorrniaa Method of translating Boolean algebra into basic algebra
US7406592B1 (en) * 2004-09-23 2008-07-29 American Megatrends, Inc. Method, system, and apparatus for efficient evaluation of boolean expressions
US7720807B1 (en) * 2007-01-17 2010-05-18 Square Zero, Inc. Representing finite node-labeled trees using a one bit encoding
US8655824B1 (en) 2011-03-07 2014-02-18 The Boeing Company Global policy framework analyzer
US10706047B2 (en) * 2012-10-22 2020-07-07 Sap Se Boolean content search
US10333696B2 (en) 2015-01-12 2019-06-25 X-Prime, Inc. Systems and methods for implementing an efficient, scalable homomorphic transformation of encrypted data with minimal data expansion and improved processing efficiency

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4001789A (en) * 1975-05-23 1977-01-04 Itt Industries, Inc. Microprocessor boolean processor
US4120043A (en) * 1976-04-30 1978-10-10 Burroughs Corporation Method and apparatus for multi-function, stored logic Boolean function generation
US4165534A (en) * 1977-04-25 1979-08-21 Allen-Bradley Company Digital control system with Boolean processor

Also Published As

Publication number Publication date
JPS5848153A (ja) 1983-03-22
EP0073901A3 (en) 1985-05-02
EP0073901A2 (en) 1983-03-16
US4417305A (en) 1983-11-22

Similar Documents

Publication Publication Date Title
Bernstein Multiplication by integer constants
Tanenbaum et al. Using peephole optimization on intermediate code
Immerman Expressibility and parallel complexity
McCarthy et al. LISP 1.5 programmer's manual
Hensley Continued fractions
EP0273130B1 (en) Reassociation process for code optimization
JPS6314378B2 (cg-RX-API-DMAC7.html)
Forrest et al. Vector processing in simplex and interior methods for linear programming
US20240201968A1 (en) Program compilation method and apparatus
Busam et al. Optimization of expressions in Fortran
Bischof et al. ADIFOR: Automatic differentiation in a source translator environment
US5237685A (en) Linear recurrence dispersal structure and method for parallel processors
Funasaka et al. Fully parallelized LZW decompression for CUDA-enabled GPUs
Gear High speed compilation of efficient object code
Anagnostopoulos et al. Computer architecture and instruction set design
Bloom Conceptual design of a direct high-level language processor
EP0180077B1 (en) A data processing machine for compiling computer programs
US7136891B2 (en) Arithmetic and relational operations
JP2002041496A (ja) コンピュータ実施される方法、計算装置およびコンピュータ・プログラム製品
Berkling Computer architecture for correct programming
JP3727039B2 (ja) コンパイラにおける乗算実施方法
Wiedmann Efficiency in the APL environment—a full arsenal for attacking CPU hogs
Galler et al. Compiling matrix operations
JPS6120134A (ja) 平方根計算装置
GB1593136A (en) Data processing