JPS63129464A - Memory access controller - Google Patents

Abstract

PURPOSE:To accelerate consecutive access, by accessing a second data adversely from a final element unless duplication is detected by a second detecting means even when the duplication is detected by a first detecting means. CONSTITUTION:A first duplication detecting means (comparator 11) detects that a memory unit to which the second data accesses is overlapped on the memory unit being in an active state in the access of a first data at the time of starting the access of the second data, from the memory unit address information of the forefront element of the second data, arranging direction information and the number of elements, the cycle time information of the memory unit, and the number of the memory units. Also, a second duplication detecting means (comparator 12), when the duplication being detected, inverts the access direction of the second data, and when the access is started from the final element adversely, detects that the duplication on the memory unit in the active state in the first data is generated. And an access control circuit 13 is operated so as to access the second data by accessing from the final element adversely unless the duplication is detected in the second detecting means 12 even when it is detected in the first detecting means 11.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a storage access control device in an information processing device, and more particularly to a storage access control device that controls continuous access to data consisting of one or more elements.

[Conventional technology]

Conventionally, as a storage access control device that controls continuous access to data consisting of multiple elements such as vector data, data that is accessed in advance based on the address information of the storage unit of the first element, such as the puncture address and the number of elements, has been used. Find and hold the address information of the storage unit of the final element of , and then based on the difference with the address information of the storage unit of the final element, the storage unit of the final element of the preceding data is accessed after starting to access the subsequent data. By calculating the number of clock cycles until In order to avoid access within the cycle time, there is a method that requires a waiting time from the end of accessing preceding data until starting accessing subsequent data (for example, Japanese Patent Laid-Open No. 60-126748).

[Problem that the invention seeks to solve]

The conventional storage access control device described above assumes that data access starts from the first element, so in the worst case, the storage unit accessed by the last element of the preceding access and the storage unit of the first element of the subsequent data access If they match, the start of accessing subsequent data will be delayed by the cycle time of the storage unit, and continuous access may not be able to be speeded up.

Therefore, an object of the present invention is to provide a storage access device capable of speeding up continuous access.

[Failure to solve the problem]

The storage access control device of the present invention is intended to solve the above-mentioned problems.The storage access control device of the present invention is made up of a plurality of storage units that can be accessed independently of each other, and each of them has a A storage access control device that controls access to first data consisting of a plurality of elements consecutively arranged on the device and access to second data subsequent to the access, the storage access control device controlling the storage of the first element of the second data. From the unit address information, array direction information, number of elements, cycle time information of the storage unit, and number of storage units, the storage unit that is in use by the first data access at the start of the second data access is determined. a first duplication detection means for detecting duplication of storage units accessed by the second data;

If the duplication is detected, the access direction of the data in box 2 is reversed, and access is started in the opposite direction from the last element. a duplication detection means, and if a duplication is detected by the first duplication detection means but no duplication is detected by the second detection means, the second data is accessed in reverse from the last element. and means.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a diagram showing an embodiment of the present invention, in which register 1
~8. Address calculation circuits 9 and 10. Comparison circuits 11 and 1z
i, and an access control circuit 13.

Registers 1 to 3 are registers in which the storage unit address, number of elements, and array direction information of the first element of the first data are written, respectively, and are connected to data lines 101 to 103, respectively.
is supplied to the address calculation circuit 9 via. The values currently set in these are "50", '128' and 0".
(positive direction). Registers 6 to 8 are the second
These are registers in which the data storage unit address, number of elements, and array direction information are set, and each data line 106
.about.108 to address calculation circuit l.

supply to. Change the values currently set to 18 in order.
0"100n and 1" (negative direction).

Register 4 holds the cycle time of a memory unit.

It is supplied to address calculation circuits 9 and 10 via a data line 104. Now let this value be "16".

Register 5 holds the number of storage units and supplies it to address calculation circuits 9 and 10 via data line 105. Let's now set this value to 256''.

The address calculation circuit 9 is a circuit that calculates, when accessing the second data starts immediately after sending an access request for the first data, a group of storage units that are in use for accessing the first data at the time of the start. The first storage unit address in the storage unit group in use is sent out through the data line 201, and the last storage unit address is sent out through the data line 202, and both are supplied to the comparison circuits 11 and 12.

The address calculation circuit 10 calculates whether the access to the second data is started from the first element or the last element, and when the access to the first data is started until all of the memory unit groups in use are available. 2. This is a circuit for determining a storage unit group to access data, and when starting from the first element, the first storage unit address in the storage unit group is sent out via the data line 203, and the final storage unit address is sent out through the data line 204. Comparison circuit 1
Supply to 1. In addition, in the storage unit group when starting from the last element, the first storage unit address all data lines 206
and sends the final storage unit address to data line 2.
06t-Sent via.

Both are supplied to the comparison circuit 12.

FIG. 2 is a diagram showing the storage unit group found in the address calculation circuit 9 of this embodiment, and the diagonally shaded parts correspond to the three storage units. In this embodiment, the first data is arranged in the positive direction, so the leading element Add "127" which is the number of 1 element - 1 to the storage unit address "50#", and the number of storage units "2" is added.
The value ``177'' obtained by calculating the remainder of 56'' is the storage unit address of the final element, the final storage unit address in the group of storage units in use, and is the value sent out via the data line 202. Further, the data is sent from the first storage simple storage unit address "177" to the "storage unit".

FIG. 3 is a diagram showing the storage unit group found in the address calculation circuit 10 of this embodiment, and the shaded part in (1) is the second
The storage unit group is shown when data access starts from the first element, and the shaded part in (2) shows the storage unit group when second data access starts from the last element.

In this embodiment, since the second data is arranged in a negative direction, the data line 20 Good luck sending it out.

The value "166" obtained by subtracting the one storage unit cycle time -2# from "180" to determine the remainder of the number of storage units "256" is sent from the data line 203 as the first storage unit address. In addition, when starting from the last element, subtract ``99'' which is the number of 1 element - 1# from ``180'' as the first storage unit address in the storage unit group to be sought, and calculate the number of storage units ``''25.
The value ``81'' obtained by calculating the remainder of ``6'' is sent through the data line 205, and ``95 is the value obtained by adding ``memory unit cycle time - 2'' to 81# to obtain the remainder of the number of storage units ``256.'' ”
is sent from the data line 206 as the final storage unit address.

Assuming that access to the second data is started immediately after sending the access request for the first data determined by the address calculation circuit 9, the comparison circuit 11 compares the memory unit group that is in use due to the access to the first data at the time of the start. , when accessing the second data calculated by the address calculation circuit IO starts from the first element, the memory unit groups accessed overlap until all of the memory unit groups in use in the first data access become usable. with a circuit that detects that.

If there are no duplicates, a logic value "0" is sent out, and if there are two duplicates, a logic value "1" is sent out from the signal line 301 and supplied to the access control circuit 13, which will be described in detail later. This example Teha "163~177",! : "166-180"
Comparing the memory unit groups of
The logical value "1" is sent out.

The comparison circuit 12 performs a comparison when accessing the second data starts from the final element.
Unlike, the comparison result is sent out from the signal line 302 and supplied to the access control circuit 13. In this example, “163
The storage unit groups ``~177'' and ``81~95'' are compared and since they are not duplicated, a logic value ``0'' is sent to the signal line 302.

The access control circuit 13 is a circuit that determines whether to start accessing the second data from the first element or the last element based on the results supplied via the signal lines 301 and 302. When the logical value is "0#", it starts from the first element, and when it is "1", it starts from the last element.

FIG. 4 shows the decision logic of the access control circuit 13 of this embodiment. Since the signals supplied via the signal lines 301 and 302 have a logic value of "1" and +101+, a signal with a logic value of "1" is sent from the control line 401, and access to the second data is performed by sending an access request for the first data. It will start immediately after the end without any waiting time.

In this embodiment, comparison of one overlapping storage unit is performed at the time when accessing the second data starts, and all storage units that are in use due to accessing the first data are compared after starting accessing the second data. Comparison circuits 11 and 12 are simplified by assuming that they are in use during the cycle time of .

If the comparison is made taking into account that the storage unit that is in use when accessing the first data becomes usable one storage unit time per machine cycle time, more efficient storage unit access can be achieved.

〔Effect of the invention〕

As explained above, one aspect of the present invention is that when accessing the second data is started immediately after sending the access request for the first data, the memory unit group that is in use by the access of the first data at the time of the start is Even if the memory units accessed by the second data overlap, if the second data is accessed from the last element in the opposite direction to the array direction, the first data will be in the used state at the start of the access. When it is detected that there is no overlap with the known storage unit group, access to the second data is started in the direction opposite to the array direction from the last element immediately after sending the first data access request, and the storage device access is performed. This has the effect of increasing speed.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an embodiment of the present invention, FIGS. 2 and 3 are diagrams showing storage units used or scheduled to be used in the embodiment of the present invention, and FIG. 4 is an embodiment of the present invention. 2 is a diagram showing the operational logic of the access control circuit 14 of FIG. Explanation of symbols: 1, 2, 3, 4, 5, 6, 7.8... Renostar, 9.10... Address calculation circuit, 11° 12.
... Comparison circuit, 13... Access control circuit. Recorded tIjI! Communication address Figure 3 Figure 4

Claims (1)

[Scope of Claims] 1. For a storage device that is composed of a plurality of storage units that can be accessed independently of each other and that are addressed in the order of the storage units, each of them is made up of a plurality of elements arranged consecutively on the storage device. A storage access control device that controls access to first data and access to second data subsequent to the access, comprising: storage unit address information, array direction information, and number of elements of a leading element of the second data; Based on the cycle time information of the storage unit and the number of storage units, at the start of accessing the second data, the storage unit accessed by the second data overlaps with the storage unit in use by the first data access. a first duplication detection means for detecting that the duplication is detected; and when the duplication is detected, the access direction of the second data is reversed, and when the access is started in the opposite direction from the last element, the first data is in a used state; a second duplication detection means for detecting duplication in a certain memory unit; and a second duplication detection means detecting duplication in a certain storage unit;
1. A storage access control device, comprising: means for operating data such that data is accessed in reverse from the final element.