JPS63120477A - Nanufacture of photodetector - Google Patents

Abstract

PURPOSE:To make the manufacture of a device possible wherein the disconnection of a wiring does not occur in spite of a mesa structure in which electrical separation is easy at the time of integration with other elements, by a method wherein a low- resistance layer and a light absorption layer are grown on a semi-insulating InP substrate, and a window layer is grown after the light absorption layer is eliminated by etching, leaving a part of its region. CONSTITUTION:At least two layers i.e. a low resistance layer 12 and a light absorption layer 13 are grown by opitaxial growth on a semi-insulating InP substrate 11. After the light absorption layer 13 is eliminated by etching, leaving a part of its region, a window layer 14 is grown by epitaxy. The window layer 14 is eliminated by etching, leaving a part of its region containing a region where the light absorption layer 13 is left. The low-resistance layer 12 is eliminated by etching leaving a part of its region containing a region where the window layer 14 is left. For example, on an InP substrate 11, the following are formed in order by epitaxial growth; an N-InGaAsP low- resistance layer 12 and an N-InGaAs light obsorption layer 13. the light absorption layer 13 is eliminated by etching leaving a part of its region. An N-InP window layer 14 is grown by epitaxy and the window layer 14 and the low-resistance layer 15 are subjected to mesa etching in order.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of manufacturing a light receiving element that can be easily applied to an optical integrated circuit in which a light receiving element and an electric element are integrated.

Conventional technology 2 InG epitaxially grown on a part InP substrate
Various structures and manufacturing methods of light-receiving elements in which the a As layer is used as a light absorption region have been proposed in the past. Among these, there is a structure shown in Fig. 3 in which an InP layer is epitaxially grown on the InGaAs layer to form a so-called windowed structure (for example, H
, Ighihara et al.: l'High-tempera
ture aging tests onplanar
structure InGaAs/InP PIN
photodiodes with Ti/Pt and
Ti/Au contact7t, ”I Electron, Lett, )
, vol.

20, p. 654 (1984) 1 As a method for manufacturing the light receiving element shown in FIG. The n-I n P window layer 4 is epitaxially grown in sequence. Next, Zn is partially diffused to form P+ region 5. Furthermore, after depositing a passivation film 6 of S i N/S i O, a p-side electrode 7 and an n-side electrode 8 are deposited.

Problem to be Solved by the Invention 3 t-7 The light-receiving element shown in FIG. 3 has a brazed structure, high sensitivity, and low dark current, and there is no problem as long as it is used as a single light-receiving element. However, when an optical integrated circuit is constructed by integrating the optical element with other electrical elements, the problem of electrical isolation arises. The most straightforward separation method is to use a semi-insulating InP substrate and make the photodetector into a mesa structure, but in this case, if the height of the mesa becomes high, the wiring from the p-side electrode 7 will be connected to the mesa part. The wire is disconnected. On the other hand, in order to achieve sufficient light absorption, the thickness of the light absorption layer must be 2 μm or more, and the height of the mesa cannot be lower than this.

Means for Solving the Problems In order to solve the above problems, the present invention uses semi-insulating InP.
a step of epitaxially growing at least two layers, a low resistance layer and a light absorption layer, on a substrate; a step of etching away the light absorption layer leaving a partial region; and a step of epitaxially growing a window layer. a step of etching away the window layer leaving only a partial area including the area where the light absorption layer is left, and etching away the low resistance layer leaving a partial area including the area where the window layer is left. The light-receiving element is manufactured by a method that includes the steps of:

Function: The photodetector d of the present invention has a mesa structure in which three layers, a low resistance layer, a light absorption layer, and a window layer are laminated on a semi-insulating InP substrate. This differs from the case where the light receiving element has a mesa structure in the following points. First, since the light absorption layer is etched without the window layer being formed, the slope of the mesa can be made into a gentle slope using photoresist. That is,
By making the mesa side surface of the thickest light absorption layer a gentle slope, disconnection of the wiring becomes less likely to occur. On the other hand, when mesa etching is performed on a structure on which a window layer has been formed first, as shown in Figure 3, the window layer acts as a mask and the light absorption layer is etched, so the mesa side of the light absorption layer becomes a gentle slope. Second, according to the manufacturing method of the present invention, it is possible to change the size of the mesa region 5, -7 for each layer, so it is possible to divide the step of the mesa into a plurality of steps. be. If there are multiple steps, even if the overall height of the mesa is the same, the height of each step will be lower, making it less likely that the wire will break. In view of the above two points, according to the manufacturing method of the present invention, a light-receiving element that does not cause disconnection of wiring can be manufactured even though it has a mesa structure.

Embodiment FIG. 1 is a sectional view showing an embodiment of the method of manufacturing a light receiving element of the present invention. This embodiment will be explained according to Fig. 1.
As shown in FIG. 1(a), the semi-insulating InP substrate 11 is
n-InGaAsP low resistance layer 12 on soil, n -I n
A GaAs light absorption layer 13 is epitaxially grown in sequence. Next, as shown in FIG. 1(b), the light absorbing layer 13 is removed by etching, leaving only a partial region. Mesa etching is performed using photoresist as a mask, but this allows the mesa to have a gentle slope.This is because the adhesion between the InGaAs and photoresist interface is poor, and
This is because since nGaAs is etched in the vertical direction, it is also etched in the horizontal direction. After this, an n-I n P window layer 14 is epitaxially grown on the entire surface as shown in FIG. 1 fc), and a window layer 14 and a low resistance layer 15 are grown as shown in FIG. Second mesa etching. At this time, if the size of the mesa increases in the order of light absorption layer 13, window layer 14, and low resistance layer 15, the mesa will have three steps, with the largest step occurring in the light absorption layer. Since the step of this light absorption layer has a gentle slope, wiring from the upper part of the mesa to the substrate surface can be performed without any problem. Thereafter, a light receiving element as shown in FIG. 1ff) is completed using the same method as the conventional manufacturing method. That is,
A p-type region 16 is formed by diffusing Zn or the like in the upper part of the mesa, and a p-side electrode 17 of Cr/Pt/Au or the like, Au-Sn
After the n-side electrode 18 is deposited, a passivation film 19 such as S s N is deposited, and finally a wiring 2o such as T i /A u is formed.

In the above explanation, the material of the low resistance layer 12 is InGaAs.
Although P is used, InP or InGaAs may be used as long as it is n-type with low resistance in terms of the function of the light-receiving element. However, in terms of manufacturing, there is a great advantage in using InGaAsP as the low resistance layer. This is because Fig. 1(b)
Mesa etching of the light absorbing layer 13 shown in FIG. 2, mesa etching of the window layer 14 shown in FIG.
This is because selective etching is possible in any mesa etching of the low resistance layer 12 shown in el. First, for etching the light absorption layer and the low resistance layer, for example, H
2SO4:H2O2:H20=1:1:5 (volume ratio) is used. The etching speed of this etching solution is InP,
InGaAsP.

InGaAs light absorbing layer or InGaAs light absorption layer or InG
a, A s P low resistance layer can be selectively etched.

In addition, the InP window layer is, for example, HCl:H3P04
Selective etching can be performed by using a ratio of 1:4 (volume ratio). This is because this etching solution hardly etches the AIIP low resistance layer.

FIG. 2 is a sectional view showing a second embodiment of the method for manufacturing a light receiving element of the present invention. It is basically the same as shown in Figure 1, except for the light receiving element and the junction field effect transistor (
1-FET) on the same substrate.
A FET layer 21 made of 8P is newly added to nGa. Therefore, from the viewpoint of selective etching, the low resistance layer 12 is made of n-InP. The manufacturing method will be explained below according to FIG.
A P low resistance layer 12 and an n-InGaAs light absorption layer 13 are epitaxially grown in sequence (FIG. 2(a)). Next, the light absorption layer 13 is mesa-etched (FIG. 2(b)), and the window layer 14 is epitaxially grown (FIG. 2(C)).
). Furthermore, after mesa etching the window layer 14 and the low resistance layer 12 at the same time (FIG. 2(d)), the FET layer 21
Mesa etching is performed (Fig. 2(e)).

At this time, the FET layer 21 is also left in the portion where the l-FET is to be formed. The subsequent processing of the light-receiving element is the same as in the first embodiment, but in the J-FET, the gate 22 is formed by diffusion, and the p-side electrode, n-side electrode, and wiring are formed at the same time as the light-receiving element (second Figure (f)).

9Peno' This example shows an example in which the method for manufacturing a light receiving element of the present invention is applied for integration with an electric element.
The structure of the electric element to be integrated is not limited to this embodiment.

Effects of the Invention As described above, according to the present invention, although the mesa structure is easy to electrically isolate when integrated with other elements,
It becomes possible to manufacture a light receiving element that does not cause disconnection of wiring. However, the photodetector that will be manufactured will have a windowed structure with high quantum efficiency and low dark current.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view showing a method for manufacturing a light-receiving element according to an embodiment of the present invention, FIG. 2 is a cross-sectional view showing a method for manufacturing a light-receiving element according to a second embodiment of the present invention, and FIG. FIG. 3 is a cross-sectional view of a light receiving element. 11...InP substrate, 12...Low resistance layer, 13...Light absorption layer, 14...Window layer. Name of agent: Patent attorney Toshio Nakao and one other person
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−. InP substrate buffer layer first absorption layer window layer P+ region passivation film P (t'1 electrode n-side electrode

Claims (1)

[Claims] A step of epitaxially growing at least two layers, a low resistance layer and a light absorption layer, on a semi-insulating InP substrate, a step of etching away the light absorption layer leaving only a part of the layer, and epitaxial growth of a window layer. a step of etching away the window layer leaving a partial region including the region where the light absorption layer is left; and a step of removing the low resistance by etching the window layer leaving a partial region including the region where the window layer is left. A method for manufacturing a light receiving element, comprising a step of etching and removing a layer.