JPH0316275A - Manufacture of semiconductor photodetector - Google Patents

Abstract

PURPOSE:To reduce a dark current, to reduce a junction volume and to realize fast response by forming an insulating film on a third layer whose impurity diffusion velocity is slower than that of a second layer, by etching a window partially in the insulating film and by diffusing impurity using the insulating film as a mask. CONSTITUTION:An insulating film 6 is formed on a third layer 5 of a semiconductor wafer, whose impurity diffusion velocity is slower than that of a window layer 4. A window is etched away partially in the insulating film 6 and the third layer 5, impurity is diffused using the insulating film 6 as a mask, and the insulating film 6 and the third layer 5 are removed. Since diffusion velocity of impurity inside the third layer 5 is slow, diffusion of impurity does not extended transversely so much, and moreover, the third layer 5 is removed in the following process; it becomes thereby possible to shorten periphery of P-N junctions 10, 11, to reduce a junction area and to realize a semiconductor photosensitive element of rapid response at a low dark current. A good semiconductor photosensitive element which enable rapid response at a low dark current can be acquired in this way.

Description

DETAILED DESCRIPTION OF THE INVENTION Industrial Application The present invention relates to a method of manufacturing a semiconductor light-receiving element that converts an optical signal into an electrical signal.

2. Description of the Related Art In recent years, semiconductor light-receiving elements (hereinafter simply referred to as light-receiving elements) have been used to detect signals in optical communications using optical sensors and fibers, or to monitor the optical output of semiconductor lasers.

A conventional light receiving element will be explained below. As the material for the photodetector, Si is mainly used in the short wavelength band of 0.8 to 0.9 μm, but in the long wavelength band of 1.0 to 1.6 μm, compound semiconductors such as InGaAsP and InGaAs are used in addition to Ge. is used.

Types of light receiving elements include solar cells used at zero bias,
There are photodiodes that are used by applying a reverse bias, a vellanche photodiode (hereinafter referred to as APD) that amplifies photocurrent using avalanche amplification, and phototransistors.

Among these, photodiodes (hereinafter referred to as PIN-PD) and APDs having a P-type mononegative semiconductor (i layer or n'' layer)-n type structure and capable of high-speed response are used for optical communications. These structures can be roughly divided into two types: the mesa type, in which elements are separated by mesa etching, and the Branner type, in which elements are separated by partial diffusion. Generally, the Branner type is adopted because it has less dark current and is easier to manufacture.

FIG. 3 shows a conventional method for manufacturing a Branner type 1nGaAs PIN-PD. n”-InP buffer layer 32 and rnGaAs light-receiving layer 33 on n”-1nP substrate 31
Furthermore, the InP window layer 34 is sequentially lengthened for the purpose of preventing surface recombination and improving sensitivity on the short wavelength side. (
FIG. 3(a)) Next, an insulating film 36 such as Si02 is formed on the surface of the wafer, and after partially removing the insulation 1136 of the light receiving part and opening a window 37, using the insulating film 36 as a mask, (Zn) is diffused to form a P layer 38.

(FIG. 3(b)) The insulating film 36 is further removed to form a surface passivation layer Il! 3 9 and P side electrode 40, n
By using the individual electrode 41, a Branner type I n. GaAs
Create a PIN-PD. (FIG. 3(C)) Problems to be Solved by the Invention However, in the conventional manufacturing method described above, the diffusion rate of Zn in the InP layer 34 is about 1.7 times faster than that in the InGaAsPIJ 33, and moreover, Since the adhesion to the film 36 is incomplete, Zn diffusion widely spreads laterally along the interface between the InP layer 34 and the insulating film 36.

The dark current of a PIN-PD is mainly a surface leakage current at the part where the PN junction is exposed on the surface of the crystal, and the PIN-PD manufactured using the conventional manufacturing method described above has Zn widely spread in the lateral direction. As a result, the surface is unstable, and the area around the PN junction exposed on the surface becomes longer, resulting in a larger dark current. Furthermore, the area of the PN junction becomes larger, and the junction capacitance becomes larger. As a result, the CR time constant becomes large and the response speed becomes slow.

The present invention solves the above-mentioned conventional problems, and prevents Zn diffusion from widening in the lateral direction, and prevents P exposed on the surface.
It is an object of the present invention to provide a method for manufacturing a planar type light-receiving element that shortens the length around the N-junction, reduces dark current, reduces junction capacitance, and increases response speed.

Means for Solving the Problems In order to achieve this object, the method for manufacturing a light receiving element of the present invention grows a window layer having a larger band gap than the light receiving layer on the light receiving layer, and further lattice matches the window layer. In the semiconductor wafer on which a third layer is grown, the diffusion rate of impurities used for diffusion is slower than that of the window layer, the step of forming an insulating film on the third layer, and the step of forming an insulating film and the third layer. The method has a configuration including at least a step of partially opening a layer, a step of diffusing impurities using the insulating film as a mask, and a step of removing the insulating film and the third layer.

Effect: Due to this configuration, the impurity diffusion rate in the third layer is slow, so that the impurity diffusion does not spread widely in the lateral direction. Moreover, since the third layer is removed in a subsequent process, the periphery of the PN junction exposed on the crystal surface is shortened and the junction area is reduced, making it possible to achieve a semiconductor light-receiving device with low dark current and high-speed response. .

EXAMPLES Hereinafter, examples of the present invention will be described with reference to the drawings. FIG. 1 shows a method of manufacturing a semiconductor light-receiving element according to a first embodiment of the present invention. I was deposited on an n-type 1nP substrate 1 using a metal organic chemical vapor deposition method (MOCVD method).
n. P buffer layer 2, InGaAs light-receiving layer 3, In
A P window layer 4 and then an InGaAs layer 5 were grown in sequence. These long layers are all n-type and have a carrier concentration of I.
nP is 7X10"am-', InGaAs is 5X1
The carrier concentration is as low as 0"cm-3. (Fig. 1(a)) Next, a Si02 film 6 is formed on the lnGaAs layer 5, and the Si02 film 6 in the light receiving area is partially removed. After opening the window 7, selective chemical etching is performed using a mixture of sulfuric acid, hydrogen peroxide, and water using the Si02 film 6 as a mask.
The InGaAs layer 5 was removed at the portion shown in FIG. Furthermore, SiOg
Using L6 as a mask, Zn was diffused at a temperature of 500° C. for 30 minutes until it reached the upper part of the InGaAs light-receiving layer 3, thereby forming a P layer 8.

(FIG. 1(b)) Finally, the Si02 film 6 and the InGaAs layer 5 are removed by chemical etching to form a surface passivation film 9 of Si3N4 and Si02, a p-side electrode 10, and an n-side electrode 11. I nGaAs Brunner type PIN-P
Created D. (Figure 1 (C)) The PIN-PD created as described above has InG with a slow diffusion rate of Zn on the surface.
Since the aAs layer 5 has grown, Zn does not spread laterally along the interface with the Si02 film 6. Further, since the InGaAs layer 5 is removed, the lateral diffusion of Zn becomes negligible. However, the lattice mismatch of the InGaAs layer 5 with respect to the InP window layer 4 is ±0.
．． If it is larger than 15%, strain will occur at the interface, and Zn will be largely diffused in the lateral direction along the interface. s layer 5
The lattice misalignment of must be less than ±0.15%. As mentioned above, the dark current of PIN-PD is mainly caused by PN
This is a leakage current due to surface recombination and recombination that occurs in the part where the junction is exposed to the crystal surface, and this becomes smaller as the band gap becomes larger. Therefore, I n. G aAS
The dark current will be smaller if the layer 5 is removed and the InP window layer 4 with a large band gap is exposed as the surface. Actually I
A PIN-PD made with the nGaAs layer 5 left in place exhibited a very large dark current of 200 nA at a reverse voltage of 10V.

PIN-P with a light-receiving diameter of 80 μm created in this way
When the reverse voltage of D is 10V, the dark current is significantly reduced to 0.5nA, and the junction capacitance is also small to 1.0pF.
High-speed response of Hz is now possible. However, since the PIN-PD created in the first embodiment has a shallow diffusion depth, the curvature of the PN junction in the peripheral area of the diffusion layer 8 is small, and edge breakdown occurs in this area, causing breakdown in the opposite direction. The voltage is a low value of 20V.

In general, InGaAs PIN-PD has a reverse voltage of IO
It is often used at about V, and the PiN-PD shown in the first embodiment of the present invention has no problems in actual use. However, if the applied voltage in the reverse direction is further increased to widen the depletion layer, or if the photocurrent is amplified by utilizing avalanche breakdown as in APD, edge breakdown can be prevented and the depletion layer expanded. It is necessary to increase the breakdown voltage in the direction.

A second embodiment of the present invention will be described below with reference to the drawings. FIG. 2 is a diagram showing a method for manufacturing an InGaAs Brunner type PIN-PD according to a second embodiment. First, the same semiconductor wafer as shown in the first embodiment was lengthened.

(Fig. 2(a)) Next, SiOJi6 is formed on the InGaAs layer 5, and the SiO2 film 6 in the peripheral area of the light receiving part is
After partially removing the InGaAs layer 5 around the light receiving part, selective chemical etching is performed using a mixture of sulfuric acid, hydrogen peroxide and water using the Si02 film as a mask, and the InGaAs layer 5 around the light receiving part is partially removed. i 02H 6 was selectively removed to form a diffusion window 7. Moshite Si (hlll!
Using No. 16 as a mask, Zn was diffused at a temperature of 500° C. for 50 minutes to form a P layer 8. The peripheral part of the light receiving part is I n.
Since G a As JtEI5 is removed, the diffusion is deep, and the central part of the light receiving part is shallowly diffused. (Figure 2(b)) Finally, SiChll! I6 and l n G a A s
After removing the layer by chemical etching, a surface passivation film 9 of Si3N4 and SiO2, p flll
The l electrode 10 and the rl side electrode 11 are formed to form InGa.
An AS planar type PIN-PD was created. (Figure 2 (C
)) Since the PIN-PD created as described above has a deep diffusion part 12 formed around the light receiving part, the accuracy of the PN junction in this part is increased and edge breakdown is prevented. It becomes a guard ring. Conventionally, guard ringing was performed by two diffusion steps, but with the method of the present invention, guard ringing can be performed by one diffusion step.

PIN-P with a light-receiving diameter of 80 μm created in this way
Both the dark current and the junction capacitance of D were similar to those of the PIN-PD prepared in the first example, and the breakdown voltage in the reverse direction was significantly increased to 40V.

Note that in the first and second embodiments, the light-receiving layer 3 is made of InGa.
Although a single layer of As is used, a superlattice light-receiving layer in which a large number of thin films of InGaAs and InP are alternately laminated may also be used. Furthermore, the InGaAsil in the embodiment may be replaced by an InGaAs P layer. Furthermore, GaAi other than InGaAs(P)/InP system! It goes without saying that other compound semiconductors such as As/GaAs may also be used.

Effects of the Invention As described above, the present invention grows a window layer having a larger band gap than the light-receiving layer on the light-receiving layer, and is further lattice matched with the window layer, so that the diffusion rate of impurities used for diffusion is higher than that of the window layer. In a semiconductor wafer on which a slow third layer is grown, the steps of forming an insulating film on the third layer, partially opening a window between the insulating film and the third layer, and the insulating film are provided. An excellent semiconductor light-receiving device capable of high-speed response with low dark current can be realized by a manufacturing method including at least a step of diffusing impurities using a mask as a mask, and a step of removing the insulating film and the third layer. It is.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 is a process cross-sectional view showing a method for manufacturing an InGaAs Brunner-type PIN-PD in a first embodiment of the present invention, and FIG. Process cross-sectional diagram showing the manufacturing method of type PIN-PD, 3rd
The figure is a process sectional view showing a conventional method for manufacturing an InGaAs Brunner type PIN-PD. 1...N-type 1nP substrate, 2...InP
Buffer layer, 3...InGaAs light-receiving layer, 4.
...InP window layer, 5...I n
．． Ga As layer, 6... Insulating layer, 7...
...Window, 8...P"-Zn diffusion layer, 9...
...Surface passivation film, 10...p
Side electrode, 11...n side electrode, 12...
Guard ring.

Claims (1)

[Claims] A second layer having a bandgap wider than the average value of the light-receiving layer is grown on a light-receiving layer consisting of a single layer or a multilayer that absorbs light in a predetermined wavelength range, and further on the second layer. , using a semiconductor wafer on which at least a third layer is grown, the third layer having a lattice mismatch with the second layer within ±0.15% and having a diffusion rate of impurities used for diffusion slower than the second layer; a step of forming an insulating film on the layer of the insulating film, a step of partially opening a window in the insulating film, a step of removing part or all of the third layer in the window portion, and a step of removing the third layer on the insulating film. A method for manufacturing a semiconductor light-receiving element, which includes at least the steps of diffusing impurities as a mask and removing the insulating film and a third layer.