JPH02199877A - Optical receiver and photoelectric integrated circuit - Google Patents

Optical receiver and photoelectric integrated circuit

Info

Publication number
JPH02199877A
JPH02199877A JP1019122A JP1912289A JPH02199877A JP H02199877 A JPH02199877 A JP H02199877A JP 1019122 A JP1019122 A JP 1019122A JP 1912289 A JP1912289 A JP 1912289A JP H02199877 A JPH02199877 A JP H02199877A
Authority
JP
Japan
Prior art keywords
layer
optical receiver
inp
integrated circuit
quantum well
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1019122A
Other languages
Japanese (ja)
Inventor
Junichi Shimizu
淳一 清水
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1019122A priority Critical patent/JPH02199877A/en
Publication of JPH02199877A publication Critical patent/JPH02199877A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To enhance the performance of an optical receiver, to enhance the performance of a photoelectric integrated circuit integrated therewith, to highly integrate it and to enhance reliability by forming a light absorption layer having a multiple quantum well structure in the optical receiver, and composing the multiple quantum well(MQW) structure of a low carrier concentration layer. CONSTITUTION:In order to integrate an optical receiver in a photoelectron integrated circuit, a GaAs buffer layer 21 is laminated on a semi-insulating InP substrate 1. Then, a GaAs channel layer 22 is laminated thereon. The optical receiver section is removed up to an InP board by mesa etching. Then, a nondoped InP layer 2, a nondoped InGaAs/InP MQW light absorption layer 3, and a nondoped InP layer 4 are sequentially grown on the InP board l. Further, a nondoped InAIAs layer 15 is grown. Thereafter, after the layer 15 of the center of the photodetecting face is mesa etched, a Ti/Pt/Au Schottky electrode is formed on the remaining InAlAs layer to form the optical receiver. Further, Ti/Pt/Au is deposited on the gate electrode of a field effect transistor, AuGe/Ni/Au is deposited on source, drain electrodes, wirings are eventually formed to form a photoelectric integrated circuit.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、光受信器及び光電子集積回路に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to optical receivers and optoelectronic integrated circuits.

〔従来の技術〕[Conventional technology]

光通信技術の進歩に伴い、その適用分野は、基幹伝送系
から加入者系、LAN、データ・リング等のシステムへ
急速に広がりつつある。このような、光システムの高度
化に対応するためには光デバイスの高性能化、高機能化
、高集積化が不可欠である。
With the progress of optical communication technology, its application fields are rapidly expanding from core transmission systems to systems such as subscriber systems, LANs, and data rings. In order to respond to such advances in optical systems, it is essential that optical devices have higher performance, higher functionality, and higher integration.

光受信器は、これらの光システムの該となるキー・デバ
イスの一つである。又、光電子集積回路は光受信器や光
送信器とそれらを駆動あるいは増幅する電子回路を同一
チップ上に集積したものであり、低価格・小型・高信頼
・無調整化といった集積による基本的メリットのみなら
ず、高速化・高感度化といった光デバイスの性能改善や
新機能デバイスの実現を狙いとする。
Optical receivers are one of the key devices in these optical systems. In addition, optoelectronic integrated circuits integrate optical receivers, optical transmitters, and electronic circuits that drive or amplify them on the same chip, and have the basic advantages of integration such as low cost, small size, high reliability, and no adjustment. In addition, the aim is to improve the performance of optical devices, such as faster speeds and higher sensitivity, and to realize devices with new functions.

従来、光受信器の構成材料として、0.δμm帯ではG
aAs系材料またはSiを、ljμm帯や1.55μm
帯ではInP系材料が使用さている0例えば、1.3μ
m帯では、InP/IoGaAs/InPとZn拡散に
よりpin構造を形成し光受信器が形成される。光受信
器の性能をはかる物理量としては、量子効率ηがあげら
れるが、ηが大きければ大きい程受信感度が高い。一般
に、pn接合を用いた光受信器では、ηは表面反射率を
R5光吸収層の吸収係数をa、空乏層幅をw、n側空乏
層幅をXとすれば、77=  (1−R)e−aX(1
−e−”)  −(1)で与えられる。従って、ηを大
きくするためにRを小さくする、即ち受光面を無反射コ
ーティングするなどの手法が用いられている。また、空
乏層幅Wを大きくする方法も有効である。しかしながら
、空乏層幅Wを大きくするには吸収層厚dを大きくしな
ければ成らず、dを大きくし過ぎるとキャリアの走行時
間で応答速度が制限され、高速動作が不可能となる。ま
た、吸収層厚dを大きくした光受信器を光電子集積回路
に用いた場合には、基板表面の段差が大きくなり、電子
素子の微細化が出来ない等の問題点が生ずる。
Conventionally, as a constituent material of an optical receiver, 0. In the δμm band, G
aAs-based material or Si in lj μm band or 1.55 μm
InP-based material is used in the band. For example, 1.3μ
In the m band, a pin structure is formed by InP/IoGaAs/InP and Zn diffusion to form an optical receiver. A physical quantity that measures the performance of an optical receiver is quantum efficiency η, and the larger η is, the higher the reception sensitivity is. Generally, in an optical receiver using a pn junction, η is the surface reflectance, R5 is the absorption coefficient of the light absorption layer is a, the depletion layer width is w, and the n-side depletion layer width is X, then 77= (1- R)e-aX(1
−e−”) −(1). Therefore, in order to increase η, methods such as decreasing R, that is, coating the light-receiving surface with anti-reflection coating, are used. Also, the depletion layer width W is However, in order to increase the depletion layer width W, the absorption layer thickness d must be increased, and if d is made too large, the response speed will be limited by the carrier transit time, making it difficult to operate at high speed. In addition, when an optical receiver with a large absorption layer thickness d is used in an optoelectronic integrated circuit, there are problems such as a large step difference on the substrate surface and the inability to miniaturize electronic elements. arise.

〔発明が解決しようとする課題〕 本発明の目的は、光受信器の高感度化と高速化の相反す
る点を補い、光受信器をより高性能化し、さらには光受
信器を集積した光電子集積回路の高性能化、高集積化、
高信頼化を行うことにある。
[Problems to be Solved by the Invention] It is an object of the present invention to compensate for the contradictory aspects of increasing the sensitivity and speed of an optical receiver, to improve the performance of the optical receiver, and to further improve the performance of the optical receiver, and furthermore, to Higher performance and higher integration of integrated circuits,
The aim is to achieve high reliability.

〔課題を解決するための手段〕[Means to solve the problem]

前述の問題点を解決し、上記目的を達成するなめに、本
発明が提供する光受信器は、多重量子井戸構造を有する
光吸収層を備え、前記多重量子井戸(MQW)構造が低
キャリア濃度層で構成されており、前記多重量子井戸構
造の各層に平行な電界を印加する手段を有し、前記多重
量子井戸が電界印加手段による電界によって空乏化され
る構成になっている。また光電子集積回路は、半絶縁性
InP基板上に、GaAs又は^lGaAsからなる歪
バッファ層をはさんで形成されたAlG1Asを含むG
aAs系半導体電子デバイス、または前記半絶縁性In
P基板に格子整合するInP系半導体電子デバイスと、
前述の光受信器とが集積されていることを特徴とする構
成になっている。
In order to solve the above problems and achieve the above objects, the present invention provides an optical receiver including a light absorption layer having a multiple quantum well structure, wherein the multiple quantum well (MQW) structure has a low carrier concentration. The multi-quantum well structure includes means for applying a parallel electric field to each layer of the multi-quantum well structure, and the multi-quantum well is depleted by the electric field generated by the electric field applying means. In addition, optoelectronic integrated circuits are manufactured using a G-containing layer containing AlG1As formed on a semi-insulating InP substrate with a strained buffer layer made of GaAs or ^lGaAs.
aAs-based semiconductor electronic device or the semi-insulating In
an InP-based semiconductor electronic device lattice-matched to a P substrate;
The structure is characterized in that the above-mentioned optical receiver is integrated.

〔作用〕[Effect]

MQW構造は、室温でエキシトン共鳴による吸収ピーク
が存在することが知られている。この吸収ピークにおけ
る吸収係数aはバルク結晶よりも大きい。このMQW構
造に積層方向に垂直な電界を印加すると、エキシトン吸
収ピークはエキシトンのイオン化により、ピーク波長は
変化せず、吸収ピークが消失する(フィジカル・レビx
 −B (Physical Review B)第3
2巻、1043〜1060頁(1985))、吸収ピー
クが消滅するための電界強度はlX10’V/C11程
度必要であり、層厚1μmでは印加電圧10Vである。
It is known that the MQW structure has an absorption peak due to exciton resonance at room temperature. The absorption coefficient a at this absorption peak is larger than that of the bulk crystal. When an electric field perpendicular to the stacking direction is applied to this MQW structure, the exciton absorption peak disappears without changing the peak wavelength due to exciton ionization (physical Levi x
-B (Physical Review B) 3rd
2, pp. 1043-1060 (1985)), the electric field strength for the absorption peak to disappear is approximately 1×10'V/C11, and the applied voltage is 10 V for a layer thickness of 1 μm.

従ってMQW構造による光吸収層が空乏化する電界強度
程度では、吸収係数の大きなエキシトン吸収ピークが存
在する。<1)式によれば、ηを大きくするためには、
吸収係数aを大きくすればよいから、aがバルクよりも
大きなエキシトン吸収ピークを所望の波長に設定してお
けば、同じ層厚で大きなηが得られる。このために光受
信器の高性能化が図れ、また、この光受信器を集積した
光電子集積回路では、基板の段差が小さくできるために
、電子素子の微細化が可能となり、より高性能、高速、
高集積のデバイスが実現可能である。
Therefore, an exciton absorption peak with a large absorption coefficient exists at an electric field strength at which the light absorption layer of the MQW structure is depleted. According to formula <1), in order to increase η,
Since it is sufficient to increase the absorption coefficient a, a large η can be obtained with the same layer thickness by setting an exciton absorption peak where a is larger than the bulk at a desired wavelength. This makes it possible to improve the performance of optical receivers, and in optoelectronic integrated circuits that integrate optical receivers, it is possible to reduce the height difference on the substrate, making it possible to miniaturize electronic elements, resulting in higher performance and higher speeds. ,
Highly integrated devices are possible.

〔実施例〕〔Example〕

次に図面を参照して本発明の実施例を詳細に説明する。 Next, embodiments of the present invention will be described in detail with reference to the drawings.

第1図は本発明の光受信器を説明するための図である。FIG. 1 is a diagram for explaining the optical receiver of the present invention.

第1図(a>は多重量子井戸に印加される電界がpn接
合を介している場合である。また、第1図(b)は、多
重量子井戸に印加される電界がショットキー電極を介し
ている場合である。以下、第1図(a)の場合の光受信
器の製作方法を説明する。半絶縁性InP基板1上に有
機金属気相成長(MOVPE)法を用いてノンドープl
nP層2、ノンドープIoGaAs/In?(30人1
50人X200)MQW光吸収層3、ノンドープInP
層4を順次成長する。ここで、MQWの組成をInGa
As/InP (30人150人)にしたのは、エキシ
トン吸収ピーク波長を1.3μmにするためである。次
に、5i02をマスクとした2nの選択拡散を行い、p
型反転層をMQW光吸収層の受光面に2箇所形成する。
Figure 1 (a) shows the case where the electric field applied to the multiple quantum well is via a pn junction. Figure 1 (b) shows the case where the electric field applied to the multiple quantum well is via the Schottky electrode. Hereinafter, a method for manufacturing an optical receiver in the case shown in FIG. 1(a) will be described.
nP layer 2, non-doped IoGaAs/In? (30 people 1
50 people x 200) MQW light absorption layer 3, non-doped InP
Layer 4 is grown sequentially. Here, the composition of MQW is InGa
The reason for using As/InP (30 people and 150 people) is to set the exciton absorption peak wavelength to 1.3 μm. Next, perform selective diffusion of 2n using 5i02 as a mask, and p
Two type inversion layers are formed on the light receiving surface of the MQW light absorption layer.

最後に、対向するAuZn電極6をZn拡散領域5の上
部に、^uGe/旧ハU電極7をInP4上に形成し、
オーミック電極とすることにより、第1図(a)の光受
信器が完成する。第1図(b)の場合は、ノンドープI
nP 4を成長後、さらにノンドープInAlAs層1
5を成長する0次に受光面中心部のInAlAsnAl
As層上5チ後残ったInAlAl51層上にTi/P
t/Auショ’yトキー電極を形成し、第1図<b>の
光受信器が完成する。
Finally, opposing AuZn electrodes 6 are formed on top of the Zn diffusion region 5, and ^Ge/old HaU electrodes 7 are formed on the InP4.
By using ohmic electrodes, the optical receiver shown in FIG. 1(a) is completed. In the case of Figure 1(b), non-doped I
After growing nP 4, a non-doped InAlAs layer 1 is further grown.
InAlAsnAl at the center of the zero-order light-receiving surface growing 5
After 5 layers on the As layer, Ti/P is applied on the remaining 51 layers of InAlAl.
A t/Au short key electrode is formed, and the optical receiver shown in FIG. 1<b> is completed.

第2図は、MQWに積層方向に垂直に電界(横電界)を
印加した場合のエキシトン吸収ピークの変化を説明する
ための図である。電界強度が大きくなるとエキシトンピ
ーク波長の位置は変わらずに、ピークの強度(吸収係数
a)が小さくなる。
FIG. 2 is a diagram for explaining changes in the exciton absorption peak when an electric field (transverse electric field) is applied to the MQW perpendicular to the stacking direction. As the electric field intensity increases, the peak intensity (absorption coefficient a) decreases without changing the position of the exciton peak wavelength.

しかしながら、吸収係数の大きさは、バルクのIaGa
Asより1.5倍程度大きい、(1)式によれば、光受
信器の量子効率はaの指数関数で表せるから、aが大き
くなればηは指数間数のべき乗で大きくなる。このため
、光受信感度も従来に比べて高くなる。
However, the magnitude of the absorption coefficient is smaller than that of bulk IaGa
According to equation (1), which is about 1.5 times larger than As, the quantum efficiency of the optical receiver can be expressed as an exponential function of a, so as a becomes larger, η becomes larger as a power of the inter-exponential number. Therefore, the optical reception sensitivity is also higher than in the past.

第3図は第1図(b)に示した光受信器を光電子集積回
路に集積した例である。半絶縁性InP基板1上にGa
Asバッファ層〈層厚1.5μm)21をMBE法によ
り積層する0次にGaAsチャネル層(層厚0.3μm
)22を積層する。窒化シリコン膜をマスクとしてメサ
エッチにより先受信器部分をInP基板まで除去する。
FIG. 3 is an example in which the optical receiver shown in FIG. 1(b) is integrated into an optoelectronic integrated circuit. Ga on semi-insulating InP substrate 1
A zero-order GaAs channel layer (layer thickness 0.3 μm) is formed by laminating an As buffer layer (layer thickness 1.5 μm) 21 by the MBE method.
) 22 are stacked. Using the silicon nitride film as a mask, the first receiver portion is removed down to the InP substrate by mesa etching.

ノンドープInP層2、ノンドープInGaAs/In
PM Q W光吸収層13、ノンドープInP層4、ノ
ンドープInAlAs層15をMOVPE法により選択
成長する。光受信器部を第1図(b)の様に加工後、光
受信器のショットキー電極、電界効果トランジスタのゲ
ート電極にTi/Pt/Al、電界効果トランジスタの
ソース、ドレイン電極に^uGe/Ni/Auを蒸着し
、最後に配線を施して第3図に示す光電子集積回路が完
成する。この時電子回路を形成する際には、基板上の段
差がほとんど無いために、ゲート長が0.7μmと良好
な電子デバイスが形成された。第3図の実施例は、光受
信器と電界、効果トランジスタが半絶縁性InP基板上
にモノリシックに集積された光受信用の光電子集積回路
として動作する。
Non-doped InP layer 2, non-doped InGaAs/In
A PM QW light absorption layer 13, a non-doped InP layer 4, and a non-doped InAlAs layer 15 are selectively grown by the MOVPE method. After processing the optical receiver part as shown in Fig. 1(b), Ti/Pt/Al was applied to the Schottky electrode of the optical receiver and the gate electrode of the field effect transistor, and ^Ge/was applied to the source and drain electrodes of the field effect transistor. Ni/Au is deposited and finally wiring is applied to complete the optoelectronic integrated circuit shown in FIG. When forming an electronic circuit at this time, since there were almost no steps on the substrate, a good electronic device with a gate length of 0.7 μm was formed. The embodiment shown in FIG. 3 operates as an opto-electronic integrated circuit for optical reception in which an optical receiver, electric field and effect transistors are monolithically integrated on a semi-insulating InP substrate.

なお、上述の実施例において、光受信器のショットキー
電極、電界効果トランジスタのゲート電極は、Ti/P
t/Alに限らずショットキー接合がとれればいかなる
ものでもよく、また電界効果トランジスタの能動層の厚
さ、キャリア濃度、組成は光電子集積回路用の電子デバ
イスとして最適化されていればいかなるものでもよい、
また、光受信器は複数あってもよく、光導波路によって
光双安定素子や光アンプなどの光機能素子と集積してあ
ってもよい、電子デバイスは、GaAs電界効果トラン
ジスタのみならず、ダイオード、抵抗を含んでもよく、
その集積規模も、さらに大きなものであってもよい。
In the above embodiment, the Schottky electrode of the optical receiver and the gate electrode of the field effect transistor are made of Ti/P.
It is not limited to t/Al, but any material that can form a Schottky junction may be used, and the thickness, carrier concentration, and composition of the active layer of the field effect transistor may be any material as long as it is optimized for an electronic device for optoelectronic integrated circuits. good,
Further, there may be a plurality of optical receivers, and they may be integrated with optical functional elements such as optical bistable elements and optical amplifiers through optical waveguides.Electronic devices include not only GaAs field effect transistors but also diodes, may include resistance,
The scale of the accumulation may also be larger.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、光受信器の受信感
度の改善が行え、前記光受信器を光電子集積回路に集積
することにより電子デバイスの微細化が可能となり、高
性能かつ高信頼な光電子集積回路が得られる。
As explained above, according to the present invention, it is possible to improve the reception sensitivity of an optical receiver, and by integrating the optical receiver into an optoelectronic integrated circuit, it is possible to miniaturize electronic devices, thereby achieving high performance and high reliability. An optoelectronic integrated circuit is obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)、(b)は、本発明の光受信器の実施例を
示す図であり、(a)はpn接合を用いた例、(b)は
ショットキー電極を用いた例である。第2図は、本発明
の詳細な説明するための図である。又、第3図は、本発
明の光受信器を光電子集積回路に集積した実施例を説明
するための図である。 3・・・MQW光吸収層、5・・・Zn拡散領域(p型
反転領域)、6,7.16・・・電極。 代理人 弁理士  内 原  晋 (仄) あ ■ 囚 二民長χ(メ1) りど邑 どノ)響〕’IyP 2禾こ困
FIGS. 1(a) and 1(b) are diagrams showing embodiments of the optical receiver of the present invention, in which (a) is an example using a pn junction, and (b) is an example using a Schottky electrode. be. FIG. 2 is a diagram for explaining the present invention in detail. Further, FIG. 3 is a diagram for explaining an embodiment in which the optical receiver of the present invention is integrated into an optoelectronic integrated circuit. 3...MQW light absorption layer, 5...Zn diffusion region (p-type inversion region), 6,7.16...electrode. Agent: Patent Attorney Susumu Uchihara (2)

Claims (2)

【特許請求の範囲】[Claims] (1)多重量子井戸構造を有する光吸収層を備え、前記
多重量子井戸(MQW)構造が低キャリア濃度層で構成
されており、前記多重量子井戸構造の各層に平行な電界
を印加する手段を有し、前記多重量子井戸が前記電界印
加手段による電界によって空乏化されることを特徴とす
る光受信器。
(1) A light absorption layer having a multiple quantum well structure, wherein the multiple quantum well (MQW) structure is composed of a low carrier concentration layer, and means for applying a parallel electric field to each layer of the multiple quantum well structure. an optical receiver, wherein the multiple quantum well is depleted by an electric field generated by the electric field applying means.
(2)半絶縁性InP基板上に、GaAs又はAlGa
Asからなる歪バッファ層をはさんで形成されたAlG
aAsを含むGaAs系半導体電子デバイス、または前
記半絶縁性InP基板に格子整合するInP系半導体電
子デバイスと請求項1に記載の光受信器とが集積されて
いることを特徴とする光電子集積回路。
(2) GaAs or AlGa on a semi-insulating InP substrate
AlG formed between strained buffer layers made of As
2. An optoelectronic integrated circuit comprising a GaAs-based semiconductor electronic device containing aAs or an InP-based semiconductor electronic device lattice-matched to the semi-insulating InP substrate and the optical receiver according to claim 1.
JP1019122A 1989-01-27 1989-01-27 Optical receiver and photoelectric integrated circuit Pending JPH02199877A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1019122A JPH02199877A (en) 1989-01-27 1989-01-27 Optical receiver and photoelectric integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1019122A JPH02199877A (en) 1989-01-27 1989-01-27 Optical receiver and photoelectric integrated circuit

Publications (1)

Publication Number Publication Date
JPH02199877A true JPH02199877A (en) 1990-08-08

Family

ID=11990664

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JPH02199877A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5281542A (en) * 1992-03-31 1994-01-25 At&T Bell Laboratories Planar quantum well photodetector
WO1994015367A1 (en) * 1992-12-21 1994-07-07 The Furukawa Electric Co., Ltd. Distorted superlattice semiconductor photodetecting element with side-contact structure
US5488231A (en) * 1994-11-23 1996-01-30 Electronics And Telecommunications Research Institute Metal/semiconductor junction Schottky diode optical device using a distortion grown layer
JPH08107232A (en) * 1994-10-03 1996-04-23 Nec Corp Silicon photodetector
US5789760A (en) * 1992-05-08 1998-08-04 The Furukawa Electric Co., Ltd. Multiquantum barrier Schottky junction device
WO2008072688A1 (en) * 2006-12-14 2008-06-19 Nec Corporation Photodiode

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5281542A (en) * 1992-03-31 1994-01-25 At&T Bell Laboratories Planar quantum well photodetector
US5789760A (en) * 1992-05-08 1998-08-04 The Furukawa Electric Co., Ltd. Multiquantum barrier Schottky junction device
WO1994015367A1 (en) * 1992-12-21 1994-07-07 The Furukawa Electric Co., Ltd. Distorted superlattice semiconductor photodetecting element with side-contact structure
US5608230A (en) * 1992-12-21 1997-03-04 The Furukawa Electric Co., Ltd. Strained superlattice semiconductor photodetector having a side contact structure
JPH08107232A (en) * 1994-10-03 1996-04-23 Nec Corp Silicon photodetector
US5488231A (en) * 1994-11-23 1996-01-30 Electronics And Telecommunications Research Institute Metal/semiconductor junction Schottky diode optical device using a distortion grown layer
WO2008072688A1 (en) * 2006-12-14 2008-06-19 Nec Corporation Photodiode
JPWO2008072688A1 (en) * 2006-12-14 2010-04-02 日本電気株式会社 Photodiode
US8183656B2 (en) 2006-12-14 2012-05-22 Nec Corporation Photodiode

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