JPS63119260A - Picture reader and manufacture of the same - Google Patents

Picture reader and manufacture of the same

Info

Publication number
JPS63119260A
JPS63119260A JP61264557A JP26455786A JPS63119260A JP S63119260 A JPS63119260 A JP S63119260A JP 61264557 A JP61264557 A JP 61264557A JP 26455786 A JP26455786 A JP 26455786A JP S63119260 A JPS63119260 A JP S63119260A
Authority
JP
Japan
Prior art keywords
group
light
thin film
semiconductor layer
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61264557A
Other languages
Japanese (ja)
Inventor
Takahiro Nishikura
西倉 孝弘
Kosuke Ikeda
光佑 池田
Noboru Yoshigami
由上 登
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP61264557A priority Critical patent/JPS63119260A/en
Publication of JPS63119260A publication Critical patent/JPS63119260A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14665Imagers using a photoconductor layer

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

PURPOSE:To reduce electrode areas significantly and improve the yield from a unit substrate by more than 5 times by a method wherein semiconductor layers of photosensors and semiconductor layers of thin film transistors which constitute analog switches and shift resisters which drive the photosensors successively are made of material of a specific composition and formed on a same substrate. CONSTITUTION:Semiconductor layers 6 of thin film transistors which are made of material which is composed of at least two components among CdS, CdSe and CdTe and has the same composition as the material of semiconductor layers 3 of photosensors and can be formed and processed simultaneously are formed on an insulating substrate 1 and on gate insulating layers 18 which are made of SiO2, Al2O3, Ta2O5 or the like and are formed on gate electrodes 17 which are made of Cr, Al, Ta or the like. Source electrode 15 and drain electrodes 16 which are made of Al, Cr, In, Au or the like are formed on the semiconductor layers 6. If necessary, contact holes 7 which facilitate connection with other devices are provided. The area occupied by a photosensor part 2, an analog switch part 4 and a shift register part 5 can be very small and the number of electrodes which send signals to the outside can be significantly reduced to about 6 totally including voltage application terminals 8.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、ファクシミリ等の各種OA機器の入力装置と
して用いられる原稿と1対1の大きさを有する画像読取
装置およびその製造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an image reading device having a one-to-one size with respect to a document, which is used as an input device for various office automation equipment such as a facsimile machine, and a method for manufacturing the same.

従来の技術 従来、この種の画像読取装置では、例えば、画像電子学
会予稿(83−04−3)Plに示されている様に第1
3図の斜視図に示す構成となっている。つまり、ガラス
基板1上に、Cd5−CdSe固溶体からなる光センサ
の半導体層3を、8素子Amn5ページ 以上の素子密度で主走査方向に一列に形成し、半密閉容
器中で、cdC12雰囲気中6oO〜6oO°Cで熱処
理する。その後、信号を取シ出すために、一定単位数ご
とに光センサの半導体層3をまとめた共通電極29と各
光センサの半導体層3に対応した個別電極30を形成し
、各共通電極29中の同一順番の個別電極3oをフレキ
シブルケーブル32の結線部31でマ) IJソックス
状接続する事によシ外部に信号を取シ出すものである。
2. Description of the Related Art Conventionally, in this type of image reading device, the first
The configuration is shown in the perspective view of FIG. That is, a semiconductor layer 3 of an optical sensor made of a Cd5-CdSe solid solution is formed in a line in the main scanning direction on a glass substrate 1 with an element density of 8 elements Amn5 pages or more, and is placed in a semi-closed container in a cdC12 atmosphere at 6oO Heat treat at ~6oO<0>C. After that, in order to extract a signal, a common electrode 29 in which the semiconductor layers 3 of the optical sensors are grouped together in a certain number of units and individual electrodes 30 corresponding to the semiconductor layers 3 of each optical sensor are formed. By connecting the individual electrodes 3o in the same order with the connection portion 31 of the flexible cable 32 in an IJ sock-like connection, a signal is output to the outside.

具体的には、第14図の等何回路に示す様に、各共通側
のスイッチ33を順次ONしていく間に、個別側のスイ
ッチ34を順次走置する。この走査を各共通電極19に
対して繰シ返す事によシ、各光センサの半導体層3で光
電変換された信号を負荷抵抗36に生じる電圧として読
み取るものである。
Specifically, as shown in the circuit shown in FIG. 14, while the common side switches 33 are sequentially turned on, the individual side switches 34 are sequentially moved. By repeating this scanning for each common electrode 19, a signal photoelectrically converted in the semiconductor layer 3 of each optical sensor is read as a voltage generated in the load resistor 36.

発明が解決しようとする問題点 しかし、上記構成の画像読取装置では、同一基板上には
、光センサの半導体層3とフレキシブルケーブル32に
よるマトリックス配線部のみが形成されておシ、共通側
および個別側の信号読み化6ページ しスイッチ33.34等の駆動回路は、外部においてI
C等で構成されている。例えば、8素子/mの割合で形
成した1728素子の光センサの半導体層3を持つA4
判画像読取装置では、共通電極64本、個別電極32本
の計86本と非常に多くの取り出し電極が必要である。
Problems to be Solved by the Invention However, in the image reading device having the above configuration, only the semiconductor layer 3 of the optical sensor and the matrix wiring section consisting of the flexible cable 32 are formed on the same substrate. The drive circuit for the side signal reading switch 33, 34, etc. is externally connected to the I
It is composed of C, etc. For example, an A4 with a semiconductor layer 3 of a photosensor of 1728 elements formed at a rate of 8 elements/m.
A format image reading device requires a very large number of extraction electrodes, 64 common electrodes and 32 individual electrodes, 86 in total.

またフレキシブルケーブルを用いるために、配線ピッチ
を微細化できず、例えば副走査方向の幅が約25M程度
必要であシ、光センサの半導体層3の副走査方向の幅が
100μm程度であることを考えれば、基板の大部分が
配線部で占められ、基板の利用効率ひいては量産性に問
題がある。
Furthermore, since a flexible cable is used, the wiring pitch cannot be made finer, and for example, the width in the sub-scanning direction is required to be about 25M, and the width of the semiconductor layer 3 of the optical sensor in the sub-scanning direction is about 100 μm. If you think about it, most of the board is occupied by the wiring section, which poses a problem in the utilization efficiency of the board and in turn, in mass production.

さらに、電気信号が光センサ構造によって微少の場合、
フレキシブルケーブルによる長い配線によって生じる浮
遊容量のために、高速駆動が制限され、読取速度を高速
化できない。
Furthermore, if the electrical signal is minute due to the optical sensor structure,
Stray capacitance caused by long wiring with flexible cables limits high-speed driving and makes it impossible to increase the reading speed.

一方、上記問題点を解決するために、一般にCd’sを
用いた薄膜トランジスタ(以下TPTと略記)を同一基
板上に形成する方法が考えられているが、光センサの半
導体層3との材料の異なシ7ベーノ や各半導体層の処理条件の相違によって生じるプロセス
の増大による問題や処理時に生じる相互作用の影響が大
きく、プロセス条件のコントロールが困難である。また
、Cd5eTFT自体も蒸気圧差による組成ズレや欠陥
制御の困難さから、任意の特性にコントロールができな
い。さらに、多くのトラップ等の準位により温度特性が
悪く、また、大面積にわたって熱処理だけで均一な特性
を得る事が困難である。
On the other hand, in order to solve the above problems, a method has been considered in which a thin film transistor (hereinafter abbreviated as TPT) using Cd's is generally formed on the same substrate. Problems due to increase in the number of processes caused by different semiconductors and differences in processing conditions for each semiconductor layer and interactions occurring during processing have a large influence, making it difficult to control process conditions. Further, the Cd5e TFT itself cannot be controlled to have arbitrary characteristics due to compositional deviation due to vapor pressure difference and difficulty in controlling defects. Furthermore, the temperature characteristics are poor due to the many levels of traps, etc., and it is difficult to obtain uniform characteristics over a large area by heat treatment alone.

問題点を解決するための手段 本発明は、上記問題点を解決するために、光センサの半
導体層と光センサを順次駆動するアナログスイッチおよ
びシフトレジスタを構成するTPTの半導体層とを同一
組成でさらには同一不純物を含むI[−Vl族化合物半
導体、特にCdS、CdSe。
Means for Solving the Problems In order to solve the above problems, the present invention provides that the semiconductor layer of the optical sensor and the semiconductor layer of the TPT constituting the analog switch and shift register that sequentially drive the optical sensor have the same composition. Furthermore, I[-Vl group compound semiconductors containing the same impurity, particularly CdS and CdSe.

CdTeあるいはそれらの内少なくとも2種から成る固
溶体、さらには、固溶体中にCu 、 C7lの不純物
を含む半導体層とする事により容易に問題点を解決でき
るものである。
The problem can be easily solved by using a solid solution of CdTe or at least two of them, or by using a semiconductor layer containing impurities such as Cu or C7l in the solid solution.

作  用 本発明は、光センサの半導体層とTPTの半導体層とを
同一材料・同一組成でかつ同時処理によって形成する事
により、プロセス数の大幅な削減ができ、また同じ処理
条件のために相互に与える影響を全く無くするものであ
る。さらに、同一基板上にTPTで駆動回路を組み込む
ために、外部への取り出し電極数を数本程度と減らす事
ができ、電極面積もフォトリソプロセスで形成できるた
めに、従来の稀以下にする事ができる。読取速度におい
ても、不必要に長い配線による浮遊容量が、光センサの
近傍に駆動回路を設ける事によシ、小さくなり高速の駆
動ができる。
Function The present invention can greatly reduce the number of processes by forming the semiconductor layer of the optical sensor and the semiconductor layer of the TPT using the same material and composition, and by simultaneous processing, and also can be made mutually compatible due to the same processing conditions. This completely eliminates the impact on Furthermore, since the drive circuit is incorporated using TPT on the same substrate, the number of electrodes taken out to the outside can be reduced to just a few, and the electrode area can also be formed using a photolithography process, making it possible to reduce the area to less than the conventional method. can. In terms of reading speed, stray capacitance due to unnecessarily long wiring can be reduced by providing a drive circuit near the optical sensor, allowing high-speed drive.

また、TPTの半導体層を固溶体膜とする事により、欠
陥制御が可能であり、特にバンドギャップの拡大によシ
温度特性の安定性、またCu、CAiの不純物の導入に
よpTFTの大きなON電流と充分な0N−OFF比が
得られ、均一性の向上も一層高められるものである。
In addition, by making the semiconductor layer of TPT a solid solution film, it is possible to control defects, and in particular, it is possible to increase the stability of temperature characteristics by expanding the band gap, and by introducing impurities such as Cu and CAi, it is possible to increase the ON current of pTFT. A sufficient ON-OFF ratio can be obtained, and the uniformity can be further improved.

実施例 以下に、本発明の第1の実施例を第1図〜第69ページ 図を用いて説明する。Example The first embodiment of the present invention will be described below from Fig. 1 to page 69. This will be explained using figures.

第1図は、本発明の第1の実施例における画像読取装置
の平面図の一部である。この画像読取装置は、ガラス等
の絶縁性基板1上に形成された光センサ部2と各光セン
サ3の信号を読み出すアナログスイッチ部4と、各アナ
ログスイッチを駆動するシフトレジスタ部5および外部
への取シ出し電極部とからなっている。6a〜6qは、
光センサの1素子を駆動するTPTであシ、斜線部は半
導体層6を示し、その両側は、ソースおよびドレイン電
極である。具体的にTPTの構造を示せば、第2図の平
面図および第3図の断面図の通シである。すなわち、絶
縁性基板1上に、CdS、CdSe。
FIG. 1 is a partial plan view of an image reading device according to a first embodiment of the present invention. This image reading device includes an optical sensor section 2 formed on an insulating substrate 1 such as glass, an analog switch section 4 for reading signals from each optical sensor 3, a shift register section 5 for driving each analog switch, and an external It consists of a lead-out electrode part and a lead-out electrode part. 6a to 6q are
It is a TPT that drives one element of the photosensor.The shaded area indicates the semiconductor layer 6, and the source and drain electrodes are on both sides thereof. Specifically, the structure of the TPT is shown in the plan view of FIG. 2 and the cross-sectional view of FIG. 3. That is, CdS and CdSe are formed on the insulating substrate 1.

CdTeあるいは、その内少なくとも2種を構成成分と
し、光センサの半導体層3と同一組成の材料でかつ同時
形成、同時処理できるTPTの半導体層6を、例えばC
r、AI!、Ta等のゲート電極17上ニ形成サレタ、
例えば、SiO2,A12o3.T&206等のゲート
絶縁層18上に形成する。その上に、A#、Cr、In
、Au等で、ソース電極15およびド1oペーヅ レイン電極16を形成し、必要に応じて、他素子との接
続を可能とするコンタクトホール7を設けている。この
ことは、例えば、Cd5−CdSe固溶体から成る光セ
ンサの半導体層3と同一組成の材料で、また、CdCl
2雰囲気中5oO〜6oO°Cの活性化熱処理工程にお
いて処理された膜でも、充分なTPT特性を有する事実
の発見に基づくものである。この具体的読取方法は第6
図の断面図に示す様に、LED等の光源19の光を原稿
2゜に照射し、その反射光を集束性ファイバアレイ21
でイメージセンサ部22の光センサ3上に結像し、TP
Tの駆動回路で読み取るものである。
The semiconductor layer 6 of TPT, which is made of CdTe or at least two of them and has the same composition as the semiconductor layer 3 of the optical sensor and can be formed and processed simultaneously, is made of, for example, CdTe.
r, AI! , a thin film formed on the gate electrode 17 such as Ta,
For example, SiO2, A12o3. Formed on the gate insulating layer 18 such as T&206. On top of that, A#, Cr, In
A source electrode 15 and a drain electrode 16 are formed of , Au, etc., and a contact hole 7 is provided as necessary to enable connection with other elements. This means, for example, that a material having the same composition as the semiconductor layer 3 of the optical sensor consisting of a Cd5-CdSe solid solution, and a CdCl
This is based on the discovery that even a film treated in an activation heat treatment step at 5oO to 6oO<0>C in a 2 atmosphere has sufficient TPT characteristics. This specific reading method is explained in the 6th section.
As shown in the cross-sectional view of the figure, light from a light source 19 such as an LED is irradiated onto the document 2°, and the reflected light is transmitted to the focusing fiber array 21.
The image is formed on the optical sensor 3 of the image sensor section 22, and the TP
It is read by the drive circuit of T.

第1図に示す様に、光センサ部2とアナログスイッチ部
4およびシフトレジスタ部5の占める面積は、例えばT
PTの寸法を50μmX10μm程度としても、非常に
小さくなる。さらに、外部への信号数シ出し電極も、印
加電圧端子8とアース端子9と信号出力端子10および
シフトレジスタ駆動用パルス入力端子11〜13と計6
本程度と大幅に削減できる。
As shown in FIG. 1, the area occupied by the optical sensor section 2, analog switch section 4, and shift register section 5 is, for example, T.
Even if the dimensions of the PT are approximately 50 μm×10 μm, it will be extremely small. Furthermore, there are a total of 6 electrodes for outputting signals to the outside, including an applied voltage terminal 8, a ground terminal 9, a signal output terminal 10, and shift register drive pulse input terminals 11 to 13.
This can be significantly reduced to about a book.

11 ペーノ 第4図、第5図は、それぞれ画像読取装置の等価回路図
と、各読み出し端子におけるタイミングチャート図であ
る。シフトレジスタ部5は、■INに入力されたパルス
を、2相クロツクφ1とφ2によって、アナログスイッ
チ6aのTPTをONにすると共に、次段のシフトレジ
スタの入力信号として転送される。アナログスイッチ6
aがONすることにより、光センサ3で光電変換された
信号によって外部負荷抵抗14の両端に生じる電圧Vα
バを画像信号として読み取るものである。
11 FIGS. 4 and 5 are an equivalent circuit diagram of the image reading device and a timing chart at each read terminal, respectively. The shift register section 5 turns on the TPT of the analog switch 6a using the two-phase clocks φ1 and φ2, and transfers the pulse input to IN as an input signal to the next stage shift register. analog switch 6
When a is turned on, a voltage Vα is generated across the external load resistor 14 by a signal photoelectrically converted by the optical sensor 3.
This is to read the bar as an image signal.

このように、光センサの半導体層とTPTから゛なるア
ナログスイッチおよびシフトレジスタの半導体層を同一
組成の材料でかつ同時形成・同時処理からなる構成とす
る事によって、外部取り出し端子数の大幅な削減および
、従来必要としていた電極部の占める面積の著しい縮小
が可能となる。
In this way, by configuring the semiconductor layer of the optical sensor and the semiconductor layer of the analog switch and shift register made of TPT to be made of the same material and formed and processed simultaneously, the number of external lead-out terminals can be significantly reduced. Furthermore, it is possible to significantly reduce the area occupied by the electrode portion, which was conventionally required.

さらに、材料が異なる場合の大幅なプロセス数の増大に
比べて、はとんど光センサ部のみと同じプロセス数で実
現でき、生産性・信頼性の飛躍的向上と同時に低コスト
化がはかれるものである。
Furthermore, compared to the large increase in the number of processes required when different materials are used, this can be achieved with the same number of processes as just the optical sensor section, dramatically improving productivity and reliability while reducing costs. It is.

以下に、本発明の第1の実施例における製造方法を第7
図を用いて詳細に説明する。
Below, the manufacturing method in the first embodiment of the present invention will be explained in the seventh embodiment.
This will be explained in detail using figures.

第7図(、)に示す様に、予め熱歪を取り除くために6
50°Cで熱処理し、洗浄されたコーニング7059テ
ラス等の絶縁性基板1上に、Or 、 Ta。
As shown in Figure 7(,), in order to remove thermal strain in advance,
Or and Ta were deposited on an insulating substrate 1 such as Corning 7059 Terrace, which had been heat treated at 50°C and cleaned.

Al等を真空蒸着法、電子ビーム法等で蒸着し、リフト
オフ法やフォトエツチング法等で、所定の形状、位置に
ゲート電極17を形成する。次に、第7図(ハ)の様に
、少なくともゲート電極17は、被覆するように、Si
o2.AlI2O3,Ta205゜S i3N 4等を
スパッタリング法、電子ビーム法。
Al or the like is deposited by a vacuum evaporation method, an electron beam method, or the like, and a gate electrode 17 is formed in a predetermined shape and position by a lift-off method, a photoetching method, or the like. Next, as shown in FIG. 7(c), at least the gate electrode 17 is covered with Si.
o2. Sputtering of AlI2O3, Ta205°S i3N4, etc., electron beam method.

プラズマCVD法、ECR法や陽極酸化法で、数100
〜数1000人、好ましくは、500−5000八程度
形成する。その後第7図(C)の様に、ゲート電極17
との接続を・するためのコンタクトホール7やエツチン
グ法やリフトオフ法を用いてテーパ状に形成する。これ
は電極の段切れ等を防ぐためである。さらに第7図(d
)に示す様に、光センサの半導体層3とTPTの半導体
層6である。例えば、不純物としてCuを0.1mo1
 %程度含んだCd5−13ベーノ Cd’s固溶体膜を、数100〜数1oOo人、具体的
には、光センサの光感度が得られ、かつ、TPTの特性
が同時に得られる5ooo八程度へ膜厚に、真空蒸着法
、電子ビーム法やスパッタリング法で被着する。次に第
7図(e)に示す様に、フォトリソ法を用いて、光セン
サの半導体層3、アナログスイッチ部4のTPTの半導
体層6aおよびシフトレジスタ部5のTPTの半導体層
6b等を、1枚のフォトマスクを用いて、所定の位置、
形状にパターン出しを行った後、不純物のClを含む、
例えばCd(J2雰囲気の半密閉容器中500〜60σ
Cで活性化熱処理を行う。これによシ、(J不純物のド
ーピングや再結晶化による膜質の安定性が得られると共
に、光センサの光感度が付与されるものである。ここで
は、不純物としてCu 、C1lを含んだCd5−Cd
Se固溶体について述べたが、Cd5−CdSeに限定
されるものではな(、Cd5−CdTe。
With plasma CVD method, ECR method and anodic oxidation method, several hundred
~1000 people, preferably 500-5000 people. After that, as shown in FIG. 7(C), the gate electrode 17
A contact hole 7 is formed in a tapered shape using an etching method or a lift-off method for connection with the contact hole 7. This is to prevent the electrode from breaking. Furthermore, Figure 7 (d
), the semiconductor layer 3 of the optical sensor and the semiconductor layer 6 of TPT. For example, 0.1mol of Cu as an impurity
A Cd5-13 beno-Cd's solid solution film containing approximately 100% of Cd5-13 benoCd's is made into a film of several 100 to several 1000%, specifically, a film of approximately 5000% that can obtain the photosensitivity of an optical sensor and the characteristics of TPT at the same time. It is deposited thickly by vacuum evaporation, electron beam or sputtering. Next, as shown in FIG. 7(e), the semiconductor layer 3 of the optical sensor, the TPT semiconductor layer 6a of the analog switch section 4, the TPT semiconductor layer 6b of the shift register section 5, etc. are formed by photolithography. Using one photomask, place the
After patterning the shape, it contains impurity Cl,
For example, Cd (500 to 60σ in a semi-closed container with J2 atmosphere)
Activation heat treatment is performed at C. This provides stability in film quality through doping with J impurities and recrystallization, and also imparts photosensitivity to the photosensor. Here, Cd5- containing Cu and C1l as impurities is Cd
Although Se solid solution has been described, it is not limited to Cd5-CdSe (Cd5-CdTe, etc.).

Cd5−Cd5e−CdTe等の固溶体テ不純物C1f
t、 イ膜やドーピングした膜でも良い事は言うまでも
ないが、特に不純物をドーピングした膜が、光セン14
ヘーノ サおよびTFTの両方の特性を容易に満足できるので述
べたものである。
Solid solution impurity C1f such as Cd5-Cd5e-CdTe
It goes without saying that a film or a doped film may be used, but a film doped with impurities is especially suitable for photosensor 14.
This is mentioned because it can easily satisfy the characteristics of both Henosa and TFT.

次に第7図(f)に示す様に、接続電極は、光センサ、
アナログスイッチ、シフトレジスタ間を相互に接続する
ために7オトリソ法やソフトオフ法等で所定の位置に形
成したNiCr−Au、Cr 、A、l?、In等で結
線する。また第7図には示してないが、最後に、ポリイ
ミド等で保護層を形成する。
Next, as shown in FIG. 7(f), the connection electrode is connected to the optical sensor,
7NiCr-Au, Cr, A, L? were formed at predetermined positions using the Otolithography method or soft-off method to interconnect analog switches and shift registers. , In, etc. Although not shown in FIG. 7, a protective layer is finally formed of polyimide or the like.

上記製造方法によれば、光センナの半導体層とTPTの
半導体層が同一組成の材料でかつ、同時形成・同時処理
を行う事によシ、異なる組成や材料を用いる場合に比較
して、プロセス数は大幅に減少し、生産性の向上がはか
れるとともに、特性の均一化が容易に得られる。また不
純物としてCu。
According to the above manufacturing method, since the semiconductor layer of the optical sensor and the semiconductor layer of the TPT are made of materials with the same composition and are formed and processed simultaneously, the process is faster than when using different compositions and materials. The number can be significantly reduced, productivity can be improved, and characteristics can be easily made uniform. Additionally, Cu is added as an impurity.

Clをドーピングした膜は、Cβ ドーピング時の活性
化熱処理により、膜の再結晶化を生じるため、TPTの
界面状態に起因する特性が著しく改善される。さらに、
固溶体膜とすることによシ分光感度の調整が容易である
とともに、従来のCd5eTFTよりも、広バンドギャ
ップが得られ、温度15ベ−ノ に対する安全性が向上する。
Since the Cl-doped film undergoes recrystallization through the activation heat treatment during Cβ doping, the properties caused by the interface state of TPT are significantly improved. moreover,
By forming a solid solution film, it is easy to adjust the spectral sensitivity, and a wider bandgap can be obtained than in the conventional Cd5e TFT, and the safety against temperatures of 15V is improved.

次に、第8図を用いて、本発明の第2の実施例およびそ
の製造方法を説明する。
Next, a second embodiment of the present invention and its manufacturing method will be described using FIG.

第8図において、第3図と異なるものは、ゲート絶縁層
18を多層膜構造とし、かつ少なくとも光センサの半導
体層3とTPTの半導体層6と接する絶縁層19を、熱
膨張係数が上記材料と同程度、例えば、Cd5−CdS
e固溶体の場合、コーニング7o59ガラス等をスパッ
タリング法で形成すれば容易に形成できる。ここで熱膨
張係数が同程度というのは、後の熱処理で特性に有害な
りラックを半導体層に生じない程度であることを意味す
る。
8, the difference from FIG. 3 is that the gate insulating layer 18 has a multilayer structure, and the insulating layer 19 in contact with at least the semiconductor layer 3 of the optical sensor and the semiconductor layer 6 of the TPT is made of a material having a thermal expansion coefficient as described above. For example, Cd5-CdS
In the case of e solid solution, it can be easily formed by sputtering Corning 7o59 glass or the like. Here, the fact that the coefficients of thermal expansion are about the same means that the thermal expansion coefficients are at a level that will not cause racks in the semiconductor layer that would be detrimental to the properties during subsequent heat treatment.

この様に多層膜構造にすれば、ゲート絶縁層形成時や活
性化熱処理時にゲート電極材料の半導体層中への熱拡散
を止める事ができると共に、ピンホール等による絶縁不
良を未然に防止できる。さらに、熱膨張係数の差によシ
生じるクラックによる光センサの半導体層やTPTの半
導体層材料のゲ−,)絶縁層中への拡散が防止できるの
で、界面欠陥等を減少させることによシ特性の安定化や
均一化がより一層達成される。
With this multilayer structure, it is possible to stop thermal diffusion of the gate electrode material into the semiconductor layer during the formation of the gate insulating layer and the activation heat treatment, and it is also possible to prevent insulation defects due to pinholes and the like. Furthermore, it is possible to prevent cracks caused by differences in thermal expansion coefficients from diffusing into the semiconductor layer of the optical sensor and the insulating layer of the semiconductor layer material of TPT, thereby reducing interface defects and the like. Further stabilization and uniformity of characteristics can be achieved.

次に、第9図から第11図を用いて、本発明の第3の実
施例およびその製造方法を説明する。
Next, a third embodiment of the present invention and its manufacturing method will be described using FIGS. 9 to 11.

第9図の平面図に示す様に、第1の実施例の第1図と異
なるものは、光を裏面から入射させる照明窓24および
光センサ3に直接光を入射させない様に遮光層25を設
けたものであり、第1の実施例とは、構造および読取原
理の異なるものである。具体的構造は、第10図の部分
拡大図および第11図の断面図に示す様になっている。
As shown in the plan view of FIG. 9, the difference from the first embodiment shown in FIG. The structure and reading principle are different from the first embodiment. The specific structure is as shown in the partially enlarged view of FIG. 10 and the sectional view of FIG. 11.

読取原理は、透光性絶縁基板1裏面から光源の光27を
照明窓24を通して入射し、8素子/m+nのピッチの
場合、80μm程度の透明保護層26、例えば、マイク
ロシートガラス等で一定間隔に保たれた原稿20面での
反射光28を光センサ3で光電変換し、同一基板上に設
けられTPTで構成された駆動回路で読み出すものであ
る。また、製造方法では、第7図のゲート電極17形成
時に、同時に照明窓24を有する遮光層25をフォトリ
ソ法やす17ページ フトオフ法で形成した後、第7図と同様に形成し最後に
、原稿20と光センサ3とを一定間隔に保ツ透明保護層
26を例えば、Sio2やA42o3゜si  N  
SiC,Sn○21等をスパッタ法や電子ビ3 4’ 一ム法で形成するか、または、マイクロシートガラス等
の薄板ガラスの貼シ付けで形成すれば良い。
The reading principle is that light 27 from a light source enters from the back surface of the transparent insulating substrate 1 through the illumination window 24, and in the case of a pitch of 8 elements/m+n, a transparent protective layer 26 of about 80 μm, such as micro sheet glass, is formed at regular intervals. The reflected light 28 on the surface of the original document 20, which is maintained at a constant level, is photoelectrically converted by the optical sensor 3, and read out by a drive circuit provided on the same substrate and constituted by a TPT. In addition, in the manufacturing method, when forming the gate electrode 17 shown in FIG. 7, at the same time a light shielding layer 25 having an illumination window 24 is formed by a photolithography method or a 17-page lift-off method, and then it is formed in the same manner as shown in FIG. 7, and finally, The transparent protective layer 26 that maintains the original 20 and the optical sensor 3 at a constant interval is made of, for example, Sio2 or A42o3°siN.
It may be formed by sputtering or electronic beam method using SiC, Sn◯21, or the like, or by pasting thin glass such as micro sheet glass.

上記の様な構成とする事によシ、集束性ファイバアレイ
が省略できるので、非常に小型の、厚さが1画程度とで
き、かつ低コスト化が達成できるものである。また、従
来のフレキシブルケーブルを用いた場合に透明保護層上
を走行する原稿によシ、フレキシブルケーブルの剥離が
、TPTによる駆動回路の同一基板上への形成によシ、
皆無となシ、接続部での信頼性が容易に得られるもので
ある。
By adopting the above-mentioned configuration, the focusing fiber array can be omitted, making it possible to achieve a very small size with a thickness of about one stroke, and to achieve a reduction in cost. In addition, when a conventional flexible cable is used, the flexible cable may be peeled off due to an original running on a transparent protective layer, and the drive circuit may be formed on the same substrate using TPT.
Reliability at the connection part can be easily obtained without any problems.

第12図は、本発明の第4の実施例であるが、これは、
第2の実施例を第3の実施例に応用したものであり、得
られる効果は、両方を加味したものが得られ、特性の均
一化、低コスト化、超小型化がさらに達成されるもので
ある。
FIG. 12 shows a fourth embodiment of the present invention, which is
This is an application of the second embodiment to the third embodiment, and the resulting effect is one that takes both of them into account, and further achieves uniformity of characteristics, cost reduction, and ultra-miniaturization. It is.

18ペーノ 発明の効果 本発明によれば、光センサとTPTで構成されるアナロ
グスイッチおよびシフトレジスタからなる駆動回路を同
一基板上に形成する事により、従来、フレキシブルケー
ブルの接続のために占められていた電極面積を稀以下と
大幅に縮小できるため、同一基板からの収率を5倍以上
とする事ができる。
18 Effects of the Invention According to the present invention, by forming a drive circuit consisting of an optical sensor and an analog switch consisting of a TPT and a shift register on the same substrate, it is possible to eliminate the problem that was conventionally used for connecting flexible cables. Since the electrode area can be significantly reduced to less than 100%, the yield from the same substrate can be increased by more than 5 times.

さらに、光センサの半導体層とTPTの半導体ひいては
低コスト化が、歩留シの低下もほとんどなく容易に達成
できる。一方フレキシブルケーブルを用いた場合のボン
ディングによる接続部の信頼性低下を生じないので、工
業上のメリットは、はかシしれないものである。また、
Cu 、 C1jの不純物ドーピングによる効果は、安
定性や均一性をさらに増大させるものである。
Furthermore, the semiconductor layer of the optical sensor and the TPT semiconductor, and thus the cost reduction, can be easily achieved with almost no decrease in yield. On the other hand, since there is no deterioration in the reliability of the connection part due to bonding when a flexible cable is used, the industrial advantage is immeasurable. Also,
The effect of impurity doping with Cu and C1j further increases stability and uniformity.

そして、また絶縁層の多層膜化による、ピンホールレス
、クラック数の減少等は、信頼性のみな19 ベー/ らず、生産性の向上を一層高める事が容易に確実にでき
る。
Furthermore, by making the insulating layer multi-layered, pinholes are eliminated, the number of cracks is reduced, etc., not only reliability but also productivity can be further improved.

さらには、集束性ファイバアレイを省く構造とすること
によシ、その超小型化、低コスト化に対する効果は非常
に大きいものである。
Furthermore, by creating a structure that does not include a focusing fiber array, the effect of miniaturization and cost reduction is very large.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の第一の実施例における画像読取装置の
平面図、第2図は同薄膜トランジスタの平面図、第3図
は同断面図、第4図は画像読取゛装置の等回路図、第5
図は第4図に示した回路における入出力の関係を示すタ
イミングチャート図、第6図は本発明の第1の実施例に
おける画像読取装置の読取構成図、第7図本発明の第1
の実施例における画像読取装置の製造方法を示す断面図
、第8図は本発明の第2の実施例における画像読取装置
の断面図、第9図は本発明の第3の実施例における画像
読取装置における平面図、第10図は第9図における光
センサ部の拡大平面図、第11図は本発明の第3の実施
例における画像読取装置における読取構成を示す断面図
、第12図は本発明の第4の実施例における画像読取装
置の断面図、第13図は従来の画像読取装置の斜視図、
第14図は第13図の等価回路を示す図である。 1・・・・・・絶縁性基板、2・・・・・・光センサ部
、3・・・・・・光センサおよび半導体層、4・・・・
・・アナログスイッチ部、6・・・・・・シフトレジス
タ部、5 B〜6q・・・・・・薄膜トランジスタ、1
7・・・・・・ゲート電極、18・・・・・・ゲート絶
縁層、2o・・・・・・原稿、23・・・・・・膨張係
数の等しい絶縁層、24・・・・・・照明窓、25・・
・・・・遮光層、26・・・・・・透明保護層、28・
・・・・・反射光。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第2
図 第4図 第5図 A  B□□ Vυりしjmr ^       ″         。 区c5シリ
FIG. 1 is a plan view of an image reading device according to a first embodiment of the present invention, FIG. 2 is a plan view of the same thin film transistor, FIG. 3 is a sectional view thereof, and FIG. 4 is an equivalent circuit diagram of the image reading device. , 5th
4 is a timing chart showing the relationship between input and output in the circuit shown in FIG. 4, FIG. 6 is a reading configuration diagram of an image reading device according to the first embodiment of the present invention, and FIG.
FIG. 8 is a cross-sectional view of the image reading device according to the second embodiment of the present invention, and FIG. 9 is a cross-sectional view showing the method of manufacturing the image reading device according to the third embodiment of the present invention. FIG. 10 is an enlarged plan view of the optical sensor section in FIG. 9, FIG. 11 is a cross-sectional view showing the reading configuration of an image reading device according to the third embodiment of the present invention, and FIG. 12 is a plan view of the device. A sectional view of an image reading device according to a fourth embodiment of the invention, FIG. 13 is a perspective view of a conventional image reading device,
FIG. 14 is a diagram showing an equivalent circuit of FIG. 13. DESCRIPTION OF SYMBOLS 1... Insulating substrate, 2... Optical sensor section, 3... Optical sensor and semiconductor layer, 4...
...Analog switch section, 6...Shift register section, 5 B~6q...Thin film transistor, 1
7... Gate electrode, 18... Gate insulating layer, 2o... Original, 23... Insulating layer with equal expansion coefficient, 24...・Lighting window, 25...
... Light shielding layer, 26 ... Transparent protective layer, 28.
·····reflected light. Name of agent: Patent attorney Toshio Nakao and 1 other person 2nd
Figure 4 Figure 5 A B □□ Vυrishijmr ^ ″.

Claims (9)

【特許請求の範囲】[Claims] (1)絶縁性基板上に直線状に形成した光センサ群と、
前記絶縁基板上に形成した前記光センサ群を走査するア
ナログスイッチおよびシフトレジスタを構成する薄膜ト
ランジスタ群と、前記光センサ群と前記薄膜トランジス
タ群との接続電極群とから成り、前記光センサ群の半導
体層と前記薄膜トランジスタ群の半導体層とが同一組成
で、同一の不純物を含むII−VI族化合物半導体材料で成
る事を特徴とする画像読取装置。
(1) A group of optical sensors formed linearly on an insulating substrate,
The semiconductor layer of the photosensor group includes a thin film transistor group constituting an analog switch and a shift register formed on the insulating substrate to scan the photosensor group, and a connection electrode group between the photosensor group and the thin film transistor group. and the semiconductor layer of the thin film transistor group are made of a II-VI compound semiconductor material having the same composition and containing the same impurities.
(2)絶縁性基板上に形成した光センサ群と、前記絶縁
性基板上に形成したゲート電極と、少なくとも前記ゲー
ト電極上には存在するゲート絶縁層と、前記ゲート絶縁
層上に形成した半導体層から成る薄膜トランジスタ群と
、前記光センサ群と前記薄膜トランジスタとの接続電極
と、集束性ファイバアレイと、光源を備え、前記光源で
原稿を照射し、その反射光を前記集束性ファイバアレイ
で前記光センサ群に結像する構成により読み取る事を特
徴とする画像読取装置。
(2) A group of optical sensors formed on an insulating substrate, a gate electrode formed on the insulating substrate, a gate insulating layer existing at least on the gate electrode, and a semiconductor formed on the gate insulating layer a thin film transistor group consisting of a layer, a connection electrode between the photosensor group and the thin film transistor, a focusing fiber array, and a light source, the document is irradiated with the light source, and the reflected light is reflected by the focusing fiber array. An image reading device characterized by reading by a configuration that forms an image on a group of sensors.
(3)透光性絶縁基板上に、照明窓を有する遮光層およ
びゲート電極と、少なくとも前記遮光層と前記ゲート電
極上には存在する透光性絶縁層と、前記照明窓近傍の前
記遮光層上に形成した光センサ群と、前記ゲート電極上
に形成した薄膜トランジスタ群と、前記光センサ群と前
記薄膜トランジスタ群との接続電極と、透明保護層と光
源とを備え、前記透光性絶縁基板裏面から前記光源の光
を前記照明窓を通して前記透光性絶縁層上の原稿に照射
し、その反射光を前記光センサ群で読み取る構成で成る
事を特徴とする画像読取装置。
(3) A light-shielding layer and a gate electrode having an illumination window on a light-transmitting insulating substrate, a light-transmitting insulating layer present at least on the light-shielding layer and the gate electrode, and the light-shielding layer near the illumination window. a group of photosensors formed on the top, a group of thin film transistors formed on the gate electrode, a connection electrode between the group of photosensors and the group of thin film transistors, a transparent protective layer, and a light source; An image reading apparatus characterized in that the image reading apparatus is characterized in that the light from the light source is irradiated onto the document on the transparent insulating layer through the illumination window, and the reflected light is read by the optical sensor group.
(4)光センサ群の半導体層と、薄膜トランジスタ群の
半導体層が、CdS、CdSe、CdTeまたは、それ
らのうち少なくとも2種の構成成分からなる固溶体であ
る事を特徴とする特許請求の範囲第3項記載の画像読取
装置。
(4) The semiconductor layer of the photosensor group and the semiconductor layer of the thin film transistor group are CdS, CdSe, CdTe, or a solid solution consisting of at least two constituents thereof. The image reading device described in Section 1.
(5)光センサ群の半導体層と薄膜トランジスタ群の半
導体層が不純物としてCuを含有し、Clを含む雰囲気
中で熱処理された膜である事を特徴とする特許請求の範
囲第3項記載の画像読取装置。
(5) The image according to claim 3, wherein the semiconductor layer of the photosensor group and the semiconductor layer of the thin film transistor group contain Cu as an impurity and are films heat-treated in an atmosphere containing Cl. reading device.
(6)ゲート絶縁層および透光性絶縁層が、多層膜から
成り、光センサ群および薄膜トランジスタ群の半導体層
と接する層が、熱膨張係数において同程度の値を有する
事を特徴とする特許請求の範囲第3項記載の画像読取装
置。
(6) A patent claim characterized in that the gate insulating layer and the light-transmitting insulating layer are made of multilayer films, and the layers in contact with the semiconductor layers of the optical sensor group and the thin film transistor group have approximately the same coefficient of thermal expansion. The image reading device according to item 3.
(7)絶縁性基板上に、ゲート電極を形成する工程と、
少なくとも前記ゲート電極上には存在するゲート絶縁層
を形成する工程と、コンタクトホールを形成する工程と
、同一組成でかつ同一不純物を含むII−VI族化合物半導
体層から成る光センサ群の半導体層とアナログスイッチ
およびシフトレジスタを構成する薄膜トランジスタ群の
半導体層とを同時に形成する工程と、同時に熱処理する
工程と、接続電源を形成する工程と、保護層を形成する
工程とから成る事を特徴とする画像読取装置の製造方法
(7) forming a gate electrode on the insulating substrate;
A step of forming a gate insulating layer existing at least on the gate electrode, a step of forming a contact hole, and a semiconductor layer of a photosensor group consisting of a group II-VI compound semiconductor layer having the same composition and containing the same impurities. An image characterized by comprising the steps of simultaneously forming a semiconductor layer of a group of thin film transistors constituting an analog switch and a shift register, simultaneously performing heat treatment, forming a connecting power source, and forming a protective layer. A method of manufacturing a reading device.
(8)透光性絶縁基板上に、照明窓を有する遮光層とゲ
ート電極を形成する工程と、少なくとも前記遮光層と前
記ゲート電極上には存在する透光性絶縁層を形成する工
程とから成る事を特徴とする特許請求の範囲第7項に記
載の画像読取装置の製造方法。
(8) forming a light-shielding layer having an illumination window and a gate electrode on a light-transmitting insulating substrate; and forming a light-transmitting insulating layer existing at least on the light-shielding layer and the gate electrode. 8. A method of manufacturing an image reading device according to claim 7.
(9)熱処理工程が、Clを含む雰囲気中で行われる事
を特徴とする特許請求の範囲第7項記載の画像読取装置
の製造方法。
(9) The method for manufacturing an image reading device according to claim 7, wherein the heat treatment step is performed in an atmosphere containing Cl.
JP61264557A 1986-11-06 1986-11-06 Picture reader and manufacture of the same Pending JPS63119260A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61264557A JPS63119260A (en) 1986-11-06 1986-11-06 Picture reader and manufacture of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61264557A JPS63119260A (en) 1986-11-06 1986-11-06 Picture reader and manufacture of the same

Publications (1)

Publication Number Publication Date
JPS63119260A true JPS63119260A (en) 1988-05-23

Family

ID=17404931

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61264557A Pending JPS63119260A (en) 1986-11-06 1986-11-06 Picture reader and manufacture of the same

Country Status (1)

Country Link
JP (1) JPS63119260A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0917987A (en) * 1995-06-29 1997-01-17 Nec Corp Contact type image sensor and manufacturing method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0917987A (en) * 1995-06-29 1997-01-17 Nec Corp Contact type image sensor and manufacturing method

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