KR0175384B1 - Method of producing thin film transistor for liquid crystal device - Google Patents

Method of producing thin film transistor for liquid crystal device Download PDF

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KR0175384B1
KR0175384B1 KR1019950066712A KR19950066712A KR0175384B1 KR 0175384 B1 KR0175384 B1 KR 0175384B1 KR 1019950066712 A KR1019950066712 A KR 1019950066712A KR 19950066712 A KR19950066712 A KR 19950066712A KR 0175384 B1 KR0175384 B1 KR 0175384B1
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film
amorphous silicon
silicon film
etching
source
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KR970054476A (en
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배병성
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윤종용
삼성전자주식회사
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136213Storage capacitors associated with the pixel electrode
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Mathematical Physics (AREA)
  • Optics & Photonics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)

Abstract

본 발명은 질화막으로 형성된 보호막과 비정질 실리콘막으로 형성된 반도체막 사이에 산화막을 형성함으로써 반도체막이 질화막과 직접 접하지 않고 산화막과 접하게 되어 누설 전류의 발생을 억제하는 효과가 있는 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법에 관한 것이다. 기판 위에 도전 물질인 알루미늄막을 적층하고 사진 식각하여 게이트 전극 및 저장 용량 하부 전극을 형성한 후 산화하여 게이트 산화막을 형성하는 단계, 절연막과 비정질 실리콘막 그리고 n+비정질 실리콘막을 차례로 적층한 후, n+비정질 실리콘막과 비정질 실리콘막을 동시에 사진 식각하여 패턴을 형성하는 단계, 상기 n+비정질 실리콘막 위에 도전막을 적층한 후, 사진 식각하여 소스/드레인 전극을 형성하고, 이어서, 소스/드레인 전극을 마스크로 n+비정질 실리콘막을 식각하는 단계, 산화막, 보호막을 차례로 적층하는 단계, 상기 소스/드레인 전극의 일부가 드러나도록 상기 보호막 및 상기 산화막을 동시에 식각하여 컨택홀을 형성한 다음, 상기 소스/드레인 전극과 접속되게 투명 도전막을 적층하고 패터닝하여 화소 전극을 형성하는 단계를 포함한다.According to the present invention, an oxide film is formed between a protective film formed of a nitride film and a semiconductor film formed of an amorphous silicon film so that the semiconductor film is not in direct contact with the nitride film but is in contact with the oxide film, thereby reducing the occurrence of leakage current. It relates to a method for producing. Laminating and photolithography an aluminum film, a conductive material, on the substrate to form a gate electrode and a storage capacitor lower electrode, and then oxidizing to form a gate oxide film. An insulating film, an amorphous silicon film, and an n + amorphous silicon film are sequentially stacked, and then n + Photo-etching an amorphous silicon film and an amorphous silicon film at the same time to form a pattern, laminating a conductive film on the n + amorphous silicon film, and then etching the photo to form a source / drain electrode, and then using the source / drain electrode as a mask. etching the n + amorphous silicon film, laminating the oxide film and the passivation layer in sequence, and simultaneously forming the contact hole by etching the passivation layer and the oxide layer to expose a portion of the source / drain electrode, and then forming a contact hole. Stacking and patterning transparent conductive films to be connected to form pixel electrodes It includes.

Description

액정 표시 장치용 박막 트랜지스터 기판의 제조 방법Manufacturing method of thin film transistor substrate for liquid crystal display device

제1도는 종래의 액정 표시 장치용 박막 트랜지스터 기판의 단면도이고,1 is a cross-sectional view of a conventional thin film transistor substrate for a liquid crystal display device,

제2도는 본 발명의 실시예에 따른 액정 표시 장치용 박막 트랜지스터 기판의 단면도이고,2 is a cross-sectional view of a thin film transistor substrate for a liquid crystal display according to an exemplary embodiment of the present invention.

제3도는 (a)-(h)는 본 발명의 실시예에 따른 액정 표시 장치용 박막 트랜지스터 기판의 제조 공정 순서를 나타낸 단면도이다.3 is a cross-sectional view illustrating a manufacturing process procedure of a thin film transistor substrate for a liquid crystal display according to an exemplary embodiment of the present invention.

본 발명은 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법에 관한 것으로서, 더욱 상세히 말하자면 누설 전류를 감소시켜 수율 및 화질 향상을 가져오는 저장 용량의 절연층이 4층막으로 형성된 액정 표시 장치용 박막 트랜지스터 기판 및 그 제조 방법에 관한 것이다.The present invention relates to a method for manufacturing a thin film transistor substrate for a liquid crystal display device, and more particularly, to a thin film transistor substrate for a liquid crystal display device, in which an insulating layer having a storage capacity, which reduces leakage current and improves yield and image quality, is formed of a four-layer film. The manufacturing method is related.

일반적으로 액정 표시 장치는, 박막 트랜지스터 및 화소 전극이 형성되어 있는 다수의 화소 단위가 행렬의 형태로 형성되어 있으며, 게이트선 및 데이터선이 각각 화소 행과 화소 열을 따라 형성되어 있는 박막 트랜지스터 기판과, 공통 전극이 형성되어 있는 컬러 필터 기판, 그리고 그 사이에 봉입되어 있는 액정 물질을 포함하고 있다.In general, a liquid crystal display includes a thin film transistor substrate in which a plurality of pixel units in which a thin film transistor and a pixel electrode are formed are formed in a matrix form, and a gate line and a data line are formed along a pixel row and a pixel column, respectively. And a color filter substrate on which a common electrode is formed, and a liquid crystal material enclosed therebetween.

이때, 상기 박막 트랜지스터 기판의 게이트 전극은 상기 게이트선을 통해 게이트 구동 드라이브로부터 게이트 구동 신호를 전달받아 반도체층에 채널을 형성시키고, 이에 따라 데이터 구동 드라이브로부터의 데이터 신호가 상기 데이터선을 통해 소스 전극에 전달되고, 반도체층과 드레인 전극을 거쳐 화소 전극에 전달된다.In this case, the gate electrode of the thin film transistor substrate receives a gate driving signal from the gate driving drive through the gate line to form a channel in the semiconductor layer, and thus a data signal from the data driving drive is a source electrode through the data line. Is transferred to the pixel electrode via the semiconductor layer and the drain electrode.

이와 같은 액정 표시 장치는 원가 절감 측면에서 생산성의 향상을 위하여 보다 높은 수율과 화질이 요구된다. 이러한 요구에 만족하기 위하여 절연막 특성을 향상시켜야 하며 박막 트랜지스터의 오프 전류를 줄여야 한다.Such a liquid crystal display device requires higher yield and image quality in order to improve productivity in terms of cost reduction. In order to satisfy these requirements, the insulating film characteristics should be improved and the off current of the thin film transistor should be reduced.

이하, 첨부된 도면을 참고로하여 종래의 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법에 대하여 설명한다.Hereinafter, a manufacturing method of a thin film transistor substrate for a liquid crystal display device will be described with reference to the accompanying drawings.

제1도는 종래의 액정 표시 장치용 박막 트랜지스터 기판의 단면도이다.1 is a cross-sectional view of a conventional thin film transistor substrate for a liquid crystal display device.

먼저, 기판(1) 위에 도전 물질인 알루미늄막을 적층하고 사진 식각하여 게이트 전극(2)과 저장 용량 전극(3)을 형성한 후 산화하여 게이트 산화막(4)을 형성한다.First, an aluminum film, which is a conductive material, is stacked on the substrate 1 and photo-etched to form the gate electrode 2 and the storage capacitor electrode 3, and then oxidized to form the gate oxide film 4.

다음, 절연막(6)과 비정질 실리콘막(8) 그리고 n+비정질 실리콘막(10)을 차례로 적층한 후, n+비정질 실리콘막(10)과 비정질 실리콘막(8)을 동시에 사진 식각하여 패턴을 형성한다.Next, after the insulating film 6, the amorphous silicon film 8, and the n + amorphous silicon film 10 are sequentially stacked, the n + amorphous silicon film 10 and the amorphous silicon film 8 are simultaneously photo-etched to form a pattern. Form.

다음, 상기 n+비정질 실리콘막(10) 위에 도전막을 적층한 후, 사진식각하여 소스/드레인 전극(12)을 형성한다. 이어서, 소스/드레인 전극(12)을 마스크로 n+비정질 실리콘막(10)을 식각한다.Next, after the conductive film is laminated on the n + amorphous silicon film 10, the source / drain electrode 12 is formed by photolithography. Next, n + amorphous silicon film 10 is etched using the source / drain electrodes 12 as a mask.

다음, 전면에 보호막(14)을 적층한 후 상기 소스/드레인 전극(12) 위에 컨택홀을 형성한다.Next, after the protective film 14 is stacked on the entire surface, a contact hole is formed on the source / drain electrode 12.

다음, 상기 보호막(14) 위에 투명 도전막을 적층한 후 사진 식각하여 화소 전극(16)을 형성한다.Next, the transparent conductive film is stacked on the passivation layer 14 and then photo-etched to form the pixel electrode 16.

이와 같이, 종래의 액정 표시 장치용 박막 트랜지스터는 절연 물질을 매개로 게이트 전극과 화소 전극 사이의 저장 용량을 형성하는데, 이때 절연 물질은 게이트 산화막, 게이트 절연막, 보호막의 3층막으로 이루어져 있다.As described above, a conventional thin film transistor for a liquid crystal display device forms a storage capacitor between a gate electrode and a pixel electrode through an insulating material, wherein the insulating material is formed of a three-layer film of a gate oxide film, a gate insulating film, and a protective film.

따라서 이러한 구조는 박막 트랜지스터의 채널부에서 반도체막과 보호막의 경계면에서 전자가 축적되어 오프 전류가 증가하는 문제점이 발생한다.Therefore, this structure causes a problem that electrons are accumulated at the interface between the semiconductor film and the passivation film in the channel portion of the thin film transistor, thereby increasing the off current.

그러므로 본 발명의 목적은 오프 전류를 감소시키고, 저장 용량의 신뢰도를 높이는 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법을 제공하기 위한 것이다.It is therefore an object of the present invention to provide a method for manufacturing a thin film transistor substrate for a liquid crystal display device which reduces off current and increases reliability of storage capacity.

이러한 목적을 달성하기 위한 본 발명의 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법은, 기판 위에 도전 물질인 알루미늄막을 적층하고 사진 시각하여 게이트 전극 및 저장 용량 하부 전극을 형성한 후 산화하여 게이트 산화막을 형성하는 단계, 절연막과 비정질 실리콘막 그리고 n+비정질 실리콘막을 차례로 적층한 후, n+비정질 실리콘막과 비정질 실리콘막을 동시에 사진 식각하여 패턴을 형성하는 단계, 상기 n+비정질 실리콘막 위에 도전막을 적층한 후, 사진 식각하여 소스/드레인 전극을 형성하고, 이어서, 소스/드레인 전극을 마스크로 n+비정질 실리콘막을 식각하는 단계, 산화막, 보호막을 차례로 적층하는 단계, 상기 소스/드레인 전극의 일부가 드러나도록 상기 보호막 및 상기 산화막을 동시에 식각하여 컨택홀을 형성한 다음, 상기 소스/드레인 전극과 접속되게 투명 도전막을 적층하고 패터닝하여 화소 전극을 형성하는 단계를 포함하고 있다.In order to achieve the above object, a method of manufacturing a thin film transistor substrate for a liquid crystal display device according to an embodiment of the present invention includes laminating an aluminum film, which is a conductive material, on a substrate, forming a gate electrode and a storage capacitor lower electrode, and then oxidizing to form a gate oxide film. And sequentially stacking an insulating film, an amorphous silicon film, and an n + amorphous silicon film, and then simultaneously forming a pattern by photo-etching the n + amorphous silicon film and the amorphous silicon film, and laminating a conductive film on the n + amorphous silicon film. Photo-etching to form a source / drain electrode, and subsequently etching the n + amorphous silicon film using the source / drain electrode as a mask, stacking an oxide film and a protective film in sequence, and exposing a portion of the source / drain electrode to be exposed. The protective film and the oxide film are simultaneously etched to form a contact hole, and then To be connected to the source / drain electrode and patterning the transparent conductive layered film includes a step of forming a pixel electrode.

첨부한 도면을 참고로하여, 본 발명이 속하는 기술 분야에서 통상의 지식을 가진 자가 용이하게 실시할 수 있도록 본 발명의 실시예를 상세하게 설명한다.With reference to the accompanying drawings, it will be described in detail an embodiment of the present invention to be easily implemented by those skilled in the art.

제2도는 본 발명의 실시예에 따른 액정 표시 장치용 박막 트랜지스터 기판의 단면도이고, 제3도의 (a)~(h)는 본 발명의 실시예에 따른 액정 표시 장치용 박막 트랜지스터 기판의 제조 공정 순서를 나타낸 단면도이다.2 is a cross-sectional view of a thin film transistor substrate for a liquid crystal display device according to an embodiment of the present invention, and (a) to (h) of FIG. 3 are manufacturing procedures of the thin film transistor substrate for a liquid crystal display device according to an embodiment of the present invention. It is sectional drawing which shows.

먼저, 제3도의 (a) 내지 (b)에 도시한 바와 같이, 기판(1) 위에 도전 물질인 알루미늄막을 적층하고 사진 식각하여 게이트 전극(2)과 저장 용량(storage capacitor) 전극(3)을 형성한 후 산화하여 게이트 산화막(4)을 형성한다.First, as shown in (a) to (b) of FIG. 3, an aluminum film, which is a conductive material, is laminated on the substrate 1 and photo-etched to form the gate electrode 2 and the storage capacitor electrode 3. After the formation, the gate oxide film 4 is formed by oxidation.

다음, 제3도의 (d) 내지 (e)에 도시한 바와 같이, 절연막(6)과 비정질 실리콘막(8) 그리고 n+비정질 실리콘막(10)을 차례로 적층한 후, n+비정질 실리콘막(10)과 비정질 실리콘막(8)을 동시에 사진 식각하여 패턴을 형성한다.Next, as shown in (d) to (e) of FIG. 3, the insulating film 6, the amorphous silicon film 8, and the n + amorphous silicon film 10 are sequentially stacked, and then n + amorphous silicon film ( 10) and the amorphous silicon film 8 are simultaneously photo-etched to form a pattern.

다음, 상기 n+비정질 실리콘막(10) 위에 도전막을 적층한 후, 사진 식각하여 소스/드레인 전극(12)을 형성한다. 이어서, 소스/드레인 전극(12)을 마스크로 n+비정질 실리콘막(10)을 식각한다.Next, a conductive film is stacked on the n + amorphous silicon film 10 and then photo-etched to form the source / drain electrodes 12. Next, n + amorphous silicon film 10 is etched using the source / drain electrodes 12 as a mask.

다음, 제3도의 (f)에 도시한 바와 같이, 산화막(20)을 적층한다. 이때, 산화막(20)은 TEOS(tetra E O S)산화막을 증착하여 형성하거나, 실리콘 산화막(SiOx)을 증착하여 형성한다.Next, as shown in Fig. 3F, an oxide film 20 is laminated. At this time, the oxide film 20 is formed by depositing a TEOS (tetra E O S) oxide film or by depositing a silicon oxide film (SiOx).

다음, 제3도의 (g)에 도시한 바와 같이, 전면에 보호막(14)을 적층한다.Next, as shown in Fig. 3G, the protective film 14 is laminated on the entire surface.

다음, 제3도의 (h)에 도시한 바와 같이, 상기 소스/드레인 전극(12)의 일부가 드러나도록 상기 보호막(14) 및 상기 산화막(20)을 동시에 식각하여 컨택홀을 형성한 다음, 상기 소스/드레인 전극(12)과 접속되게 투명 도전막을 적층하고 패터닝하여 화소 전극(16)을 형성한다.Next, as shown in (h) of FIG. 3, the protective layer 14 and the oxide layer 20 are simultaneously etched to form a contact hole so that a part of the source / drain electrode 12 is exposed. The pixel electrode 16 is formed by stacking and patterning a transparent conductive film to be connected to the source / drain electrodes 12.

이와 같이, 본 발명의 실시예에 따른 액정 표시 장치용 박막 트랜지스터는 제2도에 도시한 바와 같이, 절연 물질을 매개로 저장 용량 전극(3)과 화소 전극(16) 사이의 저장 용량을 형성할 때, 절연 물질로 게이트 산화막(4), 게이트 절연막(6), 산화막(20), 보호막(14)으로 이루어진 4층막을 형성하고 있다.As described above, the thin film transistor for liquid crystal display according to the exemplary embodiment of the present invention may form a storage capacitor between the storage capacitor electrode 3 and the pixel electrode 16 through an insulating material as shown in FIG. 2. At this time, a four-layer film composed of the gate oxide film 4, the gate insulating film 6, the oxide film 20, and the protective film 14 is formed of an insulating material.

따라서, 이러한 구조는 비정질 실리콘막과 산화막이 접하게 되므로 경계면에서 공핍층을 형성하게 되어 누설 전류를 감소시켜 오프 전류를 줄인다. 또한 절연 물질이 4층으로 형성되어 있어 절연막 특성이 좋아진다.Therefore, in such a structure, since the amorphous silicon film and the oxide film are in contact with each other, a depletion layer is formed at the interface, thereby reducing the leakage current and reducing the off current. In addition, since the insulating material is formed of four layers, the insulating film properties are improved.

그러므로 본 발명은 질화막으로 형성된 보호막과 반도체막 사이에 산화막을 형성함으로써 반도체막이 질화막과 직접 접하지 않고 산화막과 접하게 되어 누설 전류의 발생을 억제하는 효과가 있다.Therefore, according to the present invention, an oxide film is formed between the protective film formed of the nitride film and the semiconductor film so that the semiconductor film is in contact with the oxide film rather than in direct contact with the nitride film, thereby suppressing the occurrence of leakage current.

Claims (4)

기판 위에 도전 물질인 알루미늄막을 적층하고 사진 식각하여 게이트 전극 및 저장 용량 하부 전극을 형성한 후 산화하여 게이트 산화막을 형성하는 단계, 절연막과 비정질 실리콘막 그리고 n+비정질 실리콘막을 차례로 적층한 후, n+비정질 실리콘막과 비정질 실리콘막을 동시에 사진 식각하여 패턴을 형성하는 단계, 상기 n+비정질 실리콘막 위에 도전막을 적층한 후, 사진 식각하여 소스/드레인 전극을 형성하고, 이어서, 소스/드레인 전극을 마스크로 n+비정질 실리콘막을 식각하는 단계, 산화막, 보호막을 차례로 적층하는 단계, 상기 소스/드레인 전극의 일부가 드러나도록 상기 보호막 및 상기 산화막을 동시에 식각하여 컨택홀을 형성한 다음, 상기 소스/드레인 전극과 접속되게 투명 도전막을 적층하고 패터닝하여 화소 전극을 형성하는 단계를 포함하는 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법.Laminating and photolithography an aluminum film, a conductive material, on the substrate to form a gate electrode and a storage capacitor lower electrode, and then oxidizing to form a gate oxide film. An insulating film, an amorphous silicon film, and an n + amorphous silicon film are sequentially stacked, and then n + Photo-etching an amorphous silicon film and an amorphous silicon film at the same time to form a pattern, laminating a conductive film on the n + amorphous silicon film, and then etching the photo to form a source / drain electrode, and then using the source / drain electrode as a mask. etching the n + amorphous silicon film, laminating the oxide film and the passivation layer in sequence, and simultaneously forming the contact hole by etching the passivation layer and the oxide layer to expose a portion of the source / drain electrode, and then forming a contact hole. Stacking and patterning transparent conductive films to be connected to form pixel electrodes Method of manufacturing a TFT array panel for a liquid crystal display device comprising. 제1항에서, 상기 산화막은 TEOS 산화막으로 형성하는 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법.The method of claim 1, wherein the oxide film is formed of a TEOS oxide film. 제1항에서, 상기 산화막은 SiOx막으로 형성하는 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법.The method of claim 1, wherein the oxide film is formed of an SiO x film. 제1항에서, 상기 보호막은 질화막으로 형성하는 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법.The method of claim 1, wherein the protective film is formed of a nitride film.
KR1019950066712A 1995-12-29 1995-12-29 Method of producing thin film transistor for liquid crystal device KR0175384B1 (en)

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