KR840001604B1 - Method for fabrication a solid - state imaging device - Google Patents

Abstract

A method for fabrication a solid-state imaging device using photoconductive film, comprising the step of depositing a photoconductive material onto a scanner IC by the use of a shield plate, the scanner IC inculding vertical swtching MOS transistors and horizontal switching Mos transistors arrayed in the form of a matrix and vertical and horizontal scanning shift registers for scanning the vertical and horizontal switching MOS transistors respectively, the shield plate having an open part corresponding to a vertical switching MOS ransistors array area.

Description

Manufacturing method of solid state imaging device

1A is a schematic cross-sectional view showing the structure of a two-layer solid state imaging device.

1B is a plan view showing the arrangement pattern of the recovery electrode.

1C is a schematic circuit diagram showing an example of the configuration of a two-layer solid state image pickup device.

2A is a view of a wafer in which scanning IC chips are arranged;

FIG. 2B shows a scanning IC chip cut out from a wafer. FIG.

2C, 2E, 2F, 2H, and 2i are schematic cross-sectional views showing examples of the method for manufacturing the solid state image pickup device of the present invention in the order of manufacturing steps.

FIG. 2D is a plan view showing an arrangement plane pattern in FIG. 2C. FIG.

2g is a plan view showing a shield plate (mask plate) used in the embodiment of the present invention.

3 is a schematic sectional view of an embodiment of the present invention showing a state in which a shielding plate (mask plate) is fixed by placing an scanning IC chip on a package.

3 is a plan view of a shield plate (mask plate) used in another embodiment of the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a solid scratch device in which a scanning circuit and a photoconductive film are integrated on a semiconductor substrate.

As a viable method of forming a solid state image pickup device, there are two types of methods, a CCD type (Charge Coupled Devices) and a MOS type (a device using a source junction of an insulated gate field effect transistor switch as a photodiode). All of these devices have the advantage that they can be fabricated using highly integrated MOS process technology. However, since the photosensitive part is on the lower surface of the electrode (in case of CCD) or coplanar with the switch and signal output line (in case of MOS type), the area where the incidence of light is prevented by the electrode or switch is There is a drawback in that there are many and therefore the light loss area is large.

In addition, since the photosensitive portion and the scanning portion are on the same plane as described above, the area occupied by the combustion is increased. In other words, the resolution cannot be increased because the density of the element cannot be increased.

As a structure to solve such a problem (sensitivity, resolution), the inventors have provided a two-layer solid-state imaging device in which a photoconductive film is provided on a scanning IC (Japanese Patent Application Laid-Open No. 51-10715 or Technical Digestof Electron Devices Meeting 12, 1979). 3-4-5, P134 to 136, and T. Tsukada) show the outline of the element structure in FIG. 1A, taking the case where the two-layer solid state image pickup device is configured as the MOS type device.

In addition, the arrangement pattern of the pixel electrodes 9-1, 9-2, 9-3, 9'-1, 9'-2, 9'-3 is shown in FIG. 1 is an insulated gate field effect transistor (hereinafter referred to as MOST) constituting a switch element that is opened and closed by an output of a scan shift register circuit (not shown), and a drain 3 and a source 4. ), The gate 5 and the like. 6 is a photoconductive film made of a photosensitive material, 7 is a transparent electrode for voltage application for driving a photoconductive film, 8 is an insulating film, 9-1, 9-2, 9-3 is a recovery electrode, and 11 is a signal extraction electrode. As can be understood from this figure, an insulating circuit (IC) in which the semiconductor substrate 1, the scan shifter circuit, and the switch element 2 are integrated, that is, the scan IC, the photosensitive portion including the photoconductive film 6 and the transparent electrode 7, etc. This is a two-layer structure. Accordingly, the solid state image pickup device of FIG. 1 has a high area utilization rate and a small size per element, resulting in high resolution. Further, since the photosensitive portion is located above the granular light 10, there is no light loss area and the light sensitivity is high. In addition, by selecting the photoelectric film, a desired spectral sensitivity can be obtained, and thus, much superior performance can be expected as compared with the conventional solid-state imaging device.

1C shows an example of the structure of the two-layer solid state image pickup device.

In FIG. 1C, 101 is a horizontal scan shift register circuit, 102 is a vertical scan shift register circuit, 103 is a horizontal switch element (MOST) for selecting the horizontal position of the element, and 104 is a vertical switch element for selecting the vertical position of the element. (MOST), 105 is a photosensitive portion, 106 is a drive voltage terminal, 107 is a vertical signal output line, and 108 is a horizontal signal output line. The MOST 104 has a recovery electrode 9 corresponding to the switch element 2 in FIG. 1A. The photosensitive part 105 consists of the photoconductive film 6 of FIG. 1A, the transparent electrode 7, etc. FIG.

Selecting n-channel MOST with a film of the photoconductive Se-As-Te conductive film, the driving voltage applied to terminal 106 is about 50V, and tageteu (targt) voltage (V _T) is about 1V. By the way, the etching liquid which processes the material used for this two-layered photoconductive film is not yet developed, and even if it discovers in the future, since such material has too weak chemical resistance (in other words, chemical reactivity is strong), etching liquid Since there is a manufacturing problem that cannot be deposited during the process, a photoconductive film is necessarily provided on the entire surface of the scanning IC.

As a result, a photoconductive film and a transparent electrode are also provided on the circuit of the scan shift register, and there is a risk that the scan shift register may malfunction due to a high driving voltage applied to the transparent electrode.

Examples of the photoconductor used in the imaging electron tube include Se-As-Te amorphous Si, PbO, CdTe, and CdS. However, the process of depositing such a material on a glass plate is sufficient to form a shape during the manufacturing of the imaging electron tube. (Remove material in unnecessary areas) The process was not necessary. Therefore, the above-mentioned problem with respect to the chemical resistance of the photoconductive film is a unique difficulty in producing a solid element (two layer element).

It is an object of the present invention to provide a method of manufacturing a two-layer solid-state imaging device which solves the above-mentioned manufacturing problems.

That is, it is an object of the present invention to provide a method for manufacturing a solid scratch element that can prevent a transparent electrode from being placed on a scan shifter register region on a scan IC.

It is also an object of the present invention to provide a method for manufacturing a solid-state imaging device in which a photoconductor film is provided on a recovery area on a scanning IC, that is, a recovery electrode array area, and a photoconductor film is not provided on a scan shift register area provided around the scan IC. To provide.

The present invention in the processing of the conductive film to achieve the above object; In general, it is to be manufactured without using the photo-etching technology used in the fabrication process of IC and large scale integration (LSI). Specifically, a shielding plate provided with an opening corresponding to a region where a conductive film is to be formed is provided above the scanning IC so that the photoconductive film can be manufactured.

That is, as an example of the method of manufacturing the solid state image pickup device of the present invention, a photoconductive film is scanned by vapor deposition, sputtering, or the like using a shielding plate having an opening corresponding to a recovery electrode array region on a scanning IC (or scanning LSI). It deposits on IC (or scanning LSI).

Hereinafter, the present invention will be described in detail with reference to Examples. FIGS. 2A to 2I are views showing the manufacturing process of the two-layer scratch element according to the present invention. Although MOST is used here as a scanning IC element, a scanning IC using a CCD may be used.

The manufacturing process of the present invention is almost the same for any scanning IC.

As a fabrication method, a manufacturing method in which a plurality of scanning IC chips are still arranged on a Si semiconductor wafer, and a manufacturing method and two types in a state in which the scanning IC photograph is separately cut out from the wafer (in case of a chip type) can be used. Since it is described here. However, the nature of the manufacturing method does not change in any case. (I) manufacturing method in chip state;

The fabrication process is shown in FIGS. 2A to 2I.

In FIG. 2A, 12 is a semiconductor (for example, Si) wafer in which a plurality of scanning IC chips 13 in which formation of recovery electrodes arranged in two dimensions are completed are arranged.

In FIG. 2B, the scanning IC chips 13 arranged in large numbers by cutting the wafer are separated into separate IC chips 14. The cross-sectional structure of the chip is shown in FIG. 2C. Here, 15 denotes a first conductive type conductor (eg, Si) substrate in which the MOST 16 constituting the scan shift register circuit and the MOST 17 composed of switch elements are directly formed, and 18 is a gate electrode forming a MOST. , 19 and 20 are drains and sources of the impurity diffusion layer of the second conductivity type, 21 is a transverse film (generally SiO ₂ is used), 22 is a two-dimensional array electrode pattern, which determines the size of the element. .

Note that the connection between the recovery electrode 22 and the drain region 19 and the signal extraction electrode connected to the source region are omitted. Numeral 23 denotes a scan shift register circuit region (here shown as a mathematical formula shown below), and numeral 24 denotes a region which should be a photosensitive region in which the storage electrodes 22 are arranged in two dimensions.

FIG. 2D is a plan view of the chip 14 from above, where 23-1 is a vertical scanning path region for scanning in the Y direction, and 23-2 is a horizontal calculation circuit region for scanning in the X direction (not shown in FIG. 2C). And 24 denote a light-sensitive area formed of a matrix pattern of the element electrode 22 (only the first and the second rows are shown, and the rest are indicated by the dotted arrows).

In FIG. 2E, only the shielding (mask only) 26 in which the window 25 is opened is placed in close contact with the photosensitive region on the top of the main chip. Alternatively, as shown in FIG. 2F, a spacer 27 or the like is inserted into the peripheral portion between the chip and the mask to leave a slight gap.

The latter gap is a consideration for preventing the transistors and the like from damaging the integrated scanning IC. The top view of a shielding plate is shown in FIG. 2G.

Then, in this state, a photoconductive film 28 made of Se-As-Te, PbO, or the like, which is a photoelectric conversion material, is formed in the photoelectric conversion region by about 0.5 to 5 탆 by the vapor deposition method or the sputtering method 29 (Fig. 2H). .

In this vapor deposition, the chip needs to be heated to 50 ° C to 100 ° C depending on the material used. Therefore, the mask plate 26, which serves as the shield 30 for vapor deposition or sputtering, is preferably heat resistant, and therefore, it is preferable to use a metal plate (stainless steel plate, copper, iron, aluminum, etc.). (t) should be such that the chipping does not occur in the chip area, or in the case of a stainless steel plate, a thickness of several hundred μm.

Also in the case of Fig. 2E, it is difficult to completely bring the mask and chip into close contact. Thus, in reality, the deposition diffuses from the opening to the inside (Fig. 2h). According to the measurements of the inventors, the diffusion dimension dS is about 100 to 200 µm in close contact (that is, in the case of FIG. 2e), and dS in the case of FIG. 2f is 200 µm or more, depending on the dimension h of the spacer. Therefore, considerations have to be made such that the dimension design value of the opening must be smaller than dS (dH-dS, dV-dS) than the dimensions (dH, dV) of the region 24, which should be the photosensitive region.

When the opening is not made small, it is desirable to design the scanning IC to separate the horizontal and vertical scanning by a dimension larger than dS in advance from the photosensitive area. On the other hand, when there is no room for dS between the regions, the photoconductive film is deposited on a part of the scan shift register circuit region, but even in this case, the photoconductive film and the scan shift register circuit are insulated by the oxide film, so there is no problem in operation. .

However, since a voltage is applied to the upper part of the film as described below, if a pinhole or the like exists in the oxide film, the present voltage is transmitted to the scan shift register circuit (shorted), so that the circuit operation is impossible. It is preferable to design in consideration of the design in consideration of the dimension dS.

After forming the photoconductive film 28 as shown in FIG. 2I, transparent to apply a voltage to drive the photoconductive film on top of the photoconductive film 28 using a metal mask plate having an opening as shown in FIG. 2E and 2F. The electrode 31 is formed. The metal mask plate may be the mask plate 26 which is the same as the second 2e and 2f, or a separate mask plate having different opening dimensions may be used. In the former case, the transparent electrode may be deposited without removing the mask plate.

In the latter case, the metal mask plate must be replaced.

The reason for using a separate mask plate with different opening dimensions is to make the transparent electrode sufficiently cover the photoconductive film of the lower layer, or to spread the transparent electrode and the photoelectric conversion film during the deposition or sputtering of the transparent electrode. Since one dS) is different, the case where the opening dimension is made larger and smaller than the mask plate for photoconductive film formation is considered, respectively.

The openings of the masks for transparent electrodes are the same as follows.

That is, even if the photoconductive film is deposited on the scan shift register region on the scan IC, the transparent electrode can be deposited only on the photosensitive region.

In this way the object of the present invention is achieved.

As a material for the transparent electrode, SnO ₂ , InO ₂ , or a thin metal film of 50 to 200 A conductivity or a polycrystalline silicon film of about 100 to 1000 A may be used, although the transparency is slightly reduced.

In addition, depending on the material used for the deposition or sputtering of the transparent electrode, the chip temperature should be raised to 100 to 500 ° C as in the case of photoconductive film deposition.

The chip on which the transparent electrode is formed is attached to the package, and the wire is welded to the welding pad raised around the chip to manufacture the two-layer imaging device (not shown).

In the above embodiment, the fabrication method of laminating a metal mask plate on a chip has been described. However, as shown in FIG. 3, the metal mask plate 26 is laminated after the chip 14 is mounted on the package 32. It can also be produced (in this case, the case of close contact is shown).

Also in this method, a manufacturing process is substantially the same as the Example of FIG. 2A-FIG. 2I.

(Ⅱ) Manufacturing method in wafer state

Also in this case, the fabrication process is the same as the embodiment of FIGS. 2A to 2I.

However, since the scanning IC chips are arranged on the same wafer instead of separate chips, the metal mask plate used for the deposition mask of the photoconductive film and the transparent electrode is different. 4 is a plan view (also showing the first three rows and three columns) of the metal mask only 26 'used for fabricating in a wafer state, and the opening 25' described in FIG. The same number as the number of arrays on the wafer is provided at the same pitch as that of the scanning ICs.

The advantage of this manufacturing method is that mass production is possible because many (N × M) two-layer devices are completed at the same time. Wafers, on the other hand, are curved in reality. Since the metal mask itself has a large dimension, there is a problem such as bending, and there is a problem such that the above-mentioned diffusion dimension dS is different in each element in the wafer. Therefore, it is necessary to design the opening or the design of the scanning IC itself in consideration of the deviation of the academic dimension (dS).

In the above embodiment, the method of forming the transparent electrode also using the metal mask has been described. However, since some etching materials have been developed for the transparent conductive material, it is also possible to process using the photoetching technique as in a conventional IC. Do. However, since the lower photoelectric conversion material is weak in chemical resistance as mentioned above, it is thought that it is more preferable than processing with a metal mask plate.

As described in detail using the embodiment as described above, according to the present invention, a metal mask plate for deposition shielding or sputter shielding is used for the processing of the photoconductive film or the processing of the photoconductive film and the transparent electrode thereon. By setting to, the production of two-layer imaging elements can be simplified.

The advantages of the present invention are as follows.

(1) Since no chemicals are used, the photoconductive film does not deteriorate.

(2) Metal masks are inexpensive compared with photomasks used in conventional ICs. It can be used semi-permanently because there is no wear or damage. In addition, since there is no consumption of chemicals, the production method of the present invention is very inexpensive.

The inventors were able to produce a two-layer imaging device with high yield as a manufacturing method of the present invention and to perform good imaging. Through evaluation of the characteristics of the device, it was confirmed that the present invention has a great value in practical use.

In the case of employing a junction field effect transistor, a bipolar transistor, or a recently reported CID (Charge Injection Devices) in addition to the above-described MOST, CCD, as a component of the scanning IC of the two-layer imaging device, the manufacturing method is almost the same as the present invention. Can produce a two-layer imaging device.

Further, the details of the configuration and operation method of the two-layer solid-state imaging device according to the present invention can be found in US Application No. 66,230 filed on Aug. 13, 1979 or in the corresponding U.S. Patent Application Publication No. 2,029,642. (Published on March 19, 1980), and other United States Application No. 154,999 (filed May 30, 1980).

Claims (1)

In the method for manufacturing a solid-state image pickup device comprising a photoelectric conversion photoconductive film for generating a photocharge and a transparent electrode stacked on top of a scanning integrated circuit in which a switch element arranged in two dimensions and a scan shift register for scanning the switch element are integrated. A method of depositing a photoconductive material on an integrated circuit for scanning by contacting the shielding plate that is opened only in an area in which the photoconductive film is formed is in close contact with the upper portion of the integrated circuit for scanning or by supporting a small gap. Method of manufacturing a solid state imaging device.

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