JPS63115252A - Microcomputer constituting method - Google Patents

Microcomputer constituting method

Info

Publication number
JPS63115252A
JPS63115252A JP61260671A JP26067186A JPS63115252A JP S63115252 A JPS63115252 A JP S63115252A JP 61260671 A JP61260671 A JP 61260671A JP 26067186 A JP26067186 A JP 26067186A JP S63115252 A JPS63115252 A JP S63115252A
Authority
JP
Japan
Prior art keywords
prom
rom
microcomputer
memory
matrix
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61260671A
Other languages
Japanese (ja)
Inventor
Terumi Sawase
沢瀬 照美
Hideo Nakamura
英夫 中村
Yoshimune Hagiwara
萩原 吉宗
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP61260671A priority Critical patent/JPS63115252A/en
Publication of JPS63115252A publication Critical patent/JPS63115252A/en
Pending legal-status Critical Current

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  • Storage Device Security (AREA)
  • Microcomputers (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To constitute a microcomputer which has the chip area reduced as much as possible and has a memory superior in security by dividing a ROM and a PROM into plural blocks and alternately arranging them on consecutive addresses. CONSTITUTION:A ROM 3 is provided with a ROM matrix 9, and a PROM 4 is provided with a PROM matrix 12. Selecting circuits 11 and 15 of the ROM 3 and the PROM 4 select one word of the ROM 3 or the PROM 4 in accordance with information from a common address line to output data to a common data line 6. Selecting circuits 11 and 15 alternately arrange ROM areas and PROM areas on consecutive addresses. Thus, the microcomputer is constituted which has the chip area reduced as much as possible and has a memory superior in security.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は几OMを内蔵するマイクロコンピュータのプロ
グラムの機密性を向上するのに好適なプログラムメモリ
の構成法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of configuring a program memory suitable for improving the confidentiality of a program of a microcomputer incorporating an OM.

〔従来の技術〕[Conventional technology]

従来のプログラムROMを内蔵するマイコンとしては1
例えば[日立マイクロコンピュータデータブック=8ビ
ットシングルチップ、p49Jに記載のように、半導体
メーカにおいて集積回路製造工程でfLOMにグログ2
ムを書込むマスクROMが知られている。マスクkLO
Mはメモリのレイアクトテイズが小さい点で有利な反面
、ユーザの作成した応用グログラムが半導体メーカに苅
られるため、機密性の点で問題があった。
As a microcontroller with a built-in conventional program ROM, 1
For example, as described in [Hitachi Microcomputer Data Book = 8-bit single chip, p. 49J, semiconductor manufacturers use fLOM in the integrated circuit manufacturing process.
A mask ROM in which a program is written is known. mask kLO
Although M is advantageous in that the memory layout is small, it has a problem in terms of confidentiality because the applied program created by the user is handed over to the semiconductor manufacturer.

上記の問題を解決するマイコンとして、例えば上記デー
タズックの第823貞に記載のようなgPROM内蔵マ
イコンが刈られている。EPROM内蔵マイコンは、ユ
ーザの開発した応用グログラ  。
As a microcomputer that solves the above-mentioned problem, a microcomputer with a built-in gPROM as described in the above-mentioned Data Book No. 823 has been developed. The microcontroller with built-in EPROM is an application developed by the user.

ムをユーザ自身で書込めるために1機密性の点にdaて
いる反面、同一容量のマスクROMに比べてメモリ面積
が3〜4倍大きくなるという欠点があった。
On the one hand, it has the advantage of security because the user can write the program himself, but on the other hand, it has the disadvantage that the memory area is three to four times larger than that of a mask ROM of the same capacity.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記従来技術は個々に利点はあるものの、その反面、機
密性、チップコストの点で欠点もあった。
Although the above-mentioned conventional techniques have individual advantages, they also have drawbacks in terms of confidentiality and chip cost.

本発明の目的は、チップコスト、すなわちチップ面積を
極力小さくし、且つ機密性に優れたプログラム記憶用の
メモリを提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a program storage memory that minimizes chip cost, that is, chip area, and has excellent confidentiality.

〔問題点を解決するための手段〕[Means for solving problems]

上記目的は、メーカプログラマブルなマスクROMと、
ユーザプログラマブルなPROMを内蔵し、それぞれ複
数ブロックに分割し、交互に連続したアドレスに配置す
ることで達成される。
The above purpose is to use manufacturer programmable mask ROM,
This is achieved by incorporating a user programmable PROM, dividing each block into a plurality of blocks, and arranging them alternately at consecutive addresses.

〔作用〕[Effect]

達成した一連の処理プログラムは交互にマスクROMと
PR4)Mに格納されるため、マスクROMに誓込むプ
ログラムが不正に解読されてもPROMに書込むデータ
と関係付けない限り一連のプログラムを解読することは
困峻でめ夛、機密性の高いメモリを提供することができ
る。
A series of completed processing programs are stored alternately in the mask ROM and PR4)M, so even if the program committed to the mask ROM is illegitimately decoded, the series of programs will be decoded unless it is related to the data written to the PROM. It is difficult and difficult to provide sensitive memory.

〔実施例〕〔Example〕

以F1本発明の一実施例を第1図〜第3図によシ説明す
る。
Hereinafter, one embodiment of the F1 invention will be explained with reference to FIGS. 1 to 3.

第1図はマイクロコンピュータの構成図である。FIG. 1 is a block diagram of a microcomputer.

同一半導体基板1上にプロセッサ2.几OM3、PRO
M4を集積化し、それぞれのブロックは共通アドレスa
5、共通データ線6によシ結合されている。更に280
Mは半導体集積回路1外からプログラムできるように外
部アドレス線7、外部データ(i!8に結合する。
Processor 2. on the same semiconductor substrate 1.几OM3、PRO
M4 is integrated, and each block has a common address a.
5. It is coupled to the common data line 6. Another 280
M is coupled to the external address line 7 and external data (i!8) so that it can be programmed from outside the semiconductor integrated circuit 1.

第2図にメモリ周辺のブロック構成を示す。FIG. 2 shows the block configuration around the memory.

几OM3はROMマトリクス9とROMデータを読出す
ための読出し回路lOと、ROMマトリクスの中から3
語を選択する選択回路11で構成される。PROM4は
PR,OMマトリクス12.2280M読出し回路13
、PROM書込み回路14と、PROMマ) IJクス
の中の3語を選択する選択回路15で構成される。RO
idおよびPROMの選択回路11.15はアドレス線
5からの情報によLa0MまたはPROMのいずれかの
3語を選択し、データ線6にデータを出力する。
OM3 includes a ROM matrix 9, a readout circuit lO for reading ROM data, and 3 from the ROM matrix.
It is composed of a selection circuit 11 that selects words. PROM4 is PR, OM matrix 12.2280M readout circuit 13
, a PROM write circuit 14, and a selection circuit 15 that selects three words in the PROM memory. R.O.
The id and PROM selection circuits 11.15 select three words, La0M or PROM, based on the information from the address line 5, and output the data to the data line 6.

選択回路11.15は第3図に示したアドレスマツプの
ように、ROM領域とPROM領域を交互に連続したア
ドレスに配置している。本実施例は、3にバ(ト(7)
ROMとIKバ(+4)PROMをそれぞれ4分割し、
合計4にバイトのアドレス空間内に配置した例である。
The selection circuits 11 and 15 alternately arrange the ROM area and PROM area at consecutive addresses as shown in the address map shown in FIG. This example has three steps (7).
Divide the ROM and IK bar (+4) PROM into 4 parts,
This is an example in which a total of 4 bytes are arranged in an address space.

マスクROMへのデータ書込みは半導体メーカに発注し
て行ない、その後、ユーザの手元でPROMデータを書
込むことで応用プログラムの一連のプログラミングが完
了する。
Data writing to the mask ROM is performed by placing an order with a semiconductor manufacturer, and then a series of programming of the application program is completed by writing the PROM data at the user's hand.

本実施例によれば、応用プログラムを寸断した形で半導
体メーカに提出する之めに、応用プログラムの全容を知
られることは無く、機密性の高い半導体集積回路を得る
ことができる。また連続したアドレス空間に配置してい
るため、プログ/FA開発時にはマスクROMとPRO
Mを意識することなくプログラムを開発することができ
る。同容量のR,OMの面積に対してPROMの面積が
4倍大きいとすると、上記分割によシ全部をPROMだ
けで構成した場合に比べて約50%の面積で機密性の高
いマイコンが実現できる。
According to this embodiment, since the application program is submitted to the semiconductor manufacturer in fragmented form, the entire content of the application program is not known, and a highly confidential semiconductor integrated circuit can be obtained. Also, since they are located in a continuous address space, mask ROM and PRO can be used during program/FA development.
Programs can be developed without being aware of M. Assuming that the area of PROM is four times larger than the area of R and OM of the same capacity, the above division realizes a highly confidential microcontroller with approximately 50% of the area compared to the case where the entire area is composed of PROM only. can.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、マスクROMだけを内蔵した場合の機
密性の問題、および280Mだけを内蔵した場合のチッ
プサイズ増加の問題を解決し、若干のチップサイズ増加
で、よシ機密性にすぐれたメモリを有するマイコンを構
成する。ことができる。
According to the present invention, the problem of security when only a mask ROM is built-in and the problem of increase in chip size when only 280M is built-in are solved. Configure a microcomputer with memory. be able to.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の全体構成図、第2図は第1
図のメモリブロック図、第3図はアドレス割付けの説明
図である。 1・・・半導体集積回路、2・・・プロセッサ、3・・
・ROM、4・・・280M、5・・・共通アドレス線
、6・・・共通データ線。
FIG. 1 is an overall configuration diagram of an embodiment of the present invention, and FIG.
The memory block diagram in the figure and FIG. 3 are explanatory diagrams of address assignment. 1... Semiconductor integrated circuit, 2... Processor, 3...
・ROM, 4...280M, 5...Common address line, 6...Common data line.

Claims (1)

【特許請求の範囲】[Claims] 1、ROMとPROMを同一半導体基板上に集積化した
半導体集積回路において、上記ROM、PROMの一方
、または両方を複数ブロックに分割すると共にそのアド
レスの連続性を断ち、上記分割されたROMブロックと
PROMブロックを、連続したアドレス空間に交互に配
置することを特徴とするマイコンの構成法。
1. In a semiconductor integrated circuit in which a ROM and a PROM are integrated on the same semiconductor substrate, one or both of the ROM and PROM is divided into a plurality of blocks, and the continuity of their addresses is broken, and the divided ROM blocks and A microcomputer configuration method characterized by placing PROM blocks alternately in a continuous address space.
JP61260671A 1986-11-04 1986-11-04 Microcomputer constituting method Pending JPS63115252A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61260671A JPS63115252A (en) 1986-11-04 1986-11-04 Microcomputer constituting method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61260671A JPS63115252A (en) 1986-11-04 1986-11-04 Microcomputer constituting method

Publications (1)

Publication Number Publication Date
JPS63115252A true JPS63115252A (en) 1988-05-19

Family

ID=17351150

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61260671A Pending JPS63115252A (en) 1986-11-04 1986-11-04 Microcomputer constituting method

Country Status (1)

Country Link
JP (1) JPS63115252A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010505213A (en) * 2006-09-29 2010-02-18 エヌエックスピー ビー ヴィ Secure non-volatile memory device and method for protecting its internal data

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010505213A (en) * 2006-09-29 2010-02-18 エヌエックスピー ビー ヴィ Secure non-volatile memory device and method for protecting its internal data

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