JPS6074076A - Processor sharing system - Google Patents

Abstract

PURPOSE:To employ processors of the same specification by providing the 1st processor which executes specific kinds of instruction and the 2nd processor which executes other instructions. CONSTITUTION:A common processor part 1 consists of a control memory 2 stores a control program, instrunction register 3, memory address register 4, and internal processor 5 which executes instructions set in the instruction register 3. The instructions executed by the internal processor 5 of the common processor part 1 are only instructions relating to control common in various devices, and control specific to this device is performed by an external processor 6. For the purpose, when an instruction step of the control program is read out of the control memory 2, it is identified from its instruction code whether the instruction is executed by the internal processor 5 or external processor 6.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to the configuration of a processor of a device that operates based on a built-in processor, such as various devices and various control devices constituting an information processing system. This technology relates to a technology for realizing different types of devices by commonly using processors of the same standard.

(2) Prior Art and Problems Conventionally, in various devices constituting an information processing system, a dedicated processor has been developed and used for each device depending on the use and purpose of the device. it is,
This is because the required processing speed and interface with lower-level devices differ depending on the type of device, and if you try to use a processor that can universally handle these, the conditions required of the processor will increase. In fact, it was also because the economic efficiency was significantly impaired.

In the conventional method, dedicated processors were developed for each type of equipment, which increased the time required for equipment development and resulted in the production of a wide variety of processors in small quantities. Therefore, there was a drawback that manufacturing efficiency was not good.

(3) Purpose of the Invention In view of the above-mentioned drawbacks of the conventional art, an object of the present invention is to provide a system that makes it possible to use a common built-in processor of the same standard in various control devices with different uses and performances. The purpose is

(4) Structure and object of the invention According to the present invention, as described in the claims, in a control device that performs multiple operations using a built-in processor, a first processor that executes a specific type of instruction is provided. and a second processor that executes instructions other than the specific type, and when executing the instructions in the program,
This is achieved by a processor commonality method characterized by identifying which processor should process each instruction based on the instruction code, and executing the instruction in the corresponding processor.

(5) Embodiment of the invention FIG. 1 is a block diagram of an embodiment of the invention, in which l is a common processor section, 2 is a control memory, 3 is an instruction register, 4 is a MAR, (memory address register) 5 is an internal processor, 6 is an external processor, 7 to 9 are control areas, 1
0 represents an internal path.

In FIG. 1, a common processor unit 1 includes a control memory 2 for storing a control program, an instruction register 3 for reading and setting steps of the control program from the control memory 2, and a MAR for generating addresses of the control program.
.

It is composed of an internal processor 5 that executes instructions set in an instruction register 3.

The instructions executed by the internal processor 5 of the common processor section 1 are only those related to control common to various devices, and the control specific to this device is executed by the external processor 6.

That is, when an instruction step of the control program is read from the control memory 2, depending on the code of the instruction, whether it is an instruction to be executed by the internal processor 5 or an instruction to be executed by the external processor 6. Therefore, the instruction code must be set in advance with a specific convention.

Figure 2 is a diagram showing an example of an instruction code. 11 is the instruction code IF) format executed by the internal processor, 12 is the entire format of the instruction code executed by the external processor, and X is 0#. or 'l#'.

Since the instruction code is defined as shown in Fig. 2, in Fig. 1, when an instruction step of the control program is read from the control memory 2 and set in the first instruction register 3, which gross register is selected depending on the first bit of the instruction need. This makes it possible to fully identify whether the command should be executed.

The control areas to 9 are controlled by both the internal processor 5 and the external processor 6 via the internal bus 10.

By having such a configuration, only the functions specific to that device can be distributed to the external processor 6.
Assuming that the store is executed by 5 internal processors, the common processor section 1 centered on the internal processor 15vi is used to run various devices with different purposes and functions (devices configuring the information processing system and various control devices). equipment, etc.).

(6) Effects of the Invention As explained in detail above, according to the 7゛ processor common system of the present invention, various devices (transfer device, input/output control device, communication terminal adapter, etc.) When implementing an external processor, if it is made compatible with the functions specific to the device, it is possible to use a processor of the same standard that can be used universally in each device, regardless of the type of device. This method has the advantage of being able to develop the device quickly, being highly efficient in manufacturing, and being economical.

[Brief explanation of drawings]

Figure 1 is a block diagram of one embodiment of the present invention.
The figure shows an example of an instruction code. This l...Common processor section, 2...
Control memory, 3...Instruction register, 4...
・・MAR,s・・Song internal processor, 6・・・・・
External processor, 7 to 9... control area, IO... song internal bus, 11... format of instruction code executed by song internal processor, 12... format of instruction code executed by curve section processor

Claims (1)

[Claims] In a control device operated by a built-in processor,
A first processor that executes a specific type of instruction and a second processor that executes an instruction other than the specific type are provided. A processor commonality method is characterized in that all instructions are identified and the corresponding instructions are executed by the corresponding processor.