JPS63111674A - Semiconductor device - Google Patents

Abstract

PURPOSE:To equalize the length of a continuity path from each second electrode formed in an active region to a back earthing electrode through each connection element, a first electrode and a through hole and thereby to reduce nonuniformity in inductance and to enable the improvement of a high-frequency performance, by forming the through hole so that it is shaped in a straight line on each connection element side and that the distance from each connection element to the end of the through hole is equal. CONSTITUTION:In relation to a lead-out source electrode 1 of an field effect transistor of a viahole type, a through hole 3 is formed so that the end face thereof on a connection element 5 side is shaped in a straight line and stretches from the central part of the lead-out source electrode 1 to the opposite ends thereof and that the distance from each connection element 5 to the end part of the through hole 3 is equal. Nonuniformity in inductance from each source electrode 6 to a back earthing electrode 4 through the connection element 5, the lead-out source electrode 1 and the through hole 3 can be reduced by this constitution, and therefore a high-frequency performance can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a semiconductor device in which electrodes are connected by a crossover method or an air bridge method.

[Conventional technology]

In a peer-hole type semiconductor device in which electrodes are connected by a crossover method or an air bridge method and are grounded through a through hole, the length of the conductive path from the crossover region or air bridge region to the through hole is controlled to reduce the inductance component. Suppressing variations is important for improving high frequency performance.

Figures 2 (a) and (b) show this type of conventional GaAs MES.
1 is a schematic configuration diagram showing an example of an FET.

In FIG. 2, reference numeral 1 indicates an extraction source electrode which is a first electrode formed on one main surface of the semiconductor substrate, 2 indicates an extraction source electrode formed on the semiconductor substrate, and 4 indicates an extraction source electrode formed on the other main surface opposite to the extraction source electrode 1. 5 is a connecting portion; 6 is a source electrode which is a second electrode formed on one principal surface of the semiconductor substrate 2 by dividing it into a plurality of parts at predetermined intervals; 7 is a drain electrode; 8 is a back surface ground electrode;
is a gate electrode, and 13 indicates a through hole.

The shape of the through hole 13 formed on the lower surface of the extraction source electrode 1 from the back surface of the semiconductor substrate 2 generally has an elliptical structure.

[Problem that the invention seeks to solve]

Therefore, in this structure, the length of the conduction path from the back surface ground electrode 4 to the connection part 5 via the through hole 13 is the distance from each connection part 5 to the end of the through hole 13 in the extraction source electrode 1 section. Since there is a difference in the connection portion 5. from each source electrode 6. The inductance reaching the back ground electrode 4 via the extraction source electrode 1 and the through hole 13 is caused to vary. That is, the inductance at the ends is larger than that at the center. This has been a factor in deteriorating the high frequency performance of the device.

The present invention has been made to solve the problems mentioned above, and an object of the present invention is to obtain a semiconductor device in which variations in inductance are reduced.

[Means for solving problems]

In the semiconductor device according to the present invention, the shape of the through hole formed in the first electrode portion is formed in a straight line on the side of each connecting portion, and the distance from each connecting portion to the end of the through hole is equal. It is.

[Effect]

In this invention, the shape of the through hole for the first electrode is changed from the conventional ellipse shape to a shape in which the side end face of the connecting part is linear and the distance from each connecting part is equal, so that the inductance can be reduced. Variations are reduced.

〔Example〕

FIGS. 1(a) and 1(b) are schematic diagrams of a peer-hole type field effect transistor showing the structure of an embodiment of the present invention. In this figure, the shape of the through hole 3 for the extraction source electrode 1 is such that the end surface of the through hole 3 on the connecting part 5 side is linear and reaches from the center of the extraction source electrode 1 to both ends. The distance from the connecting portion 5 to the end of the through hole 3 is made equal. Note that the other symbols indicate the same things as in FIG.

The shape of the through hole 3 intended by this invention is that the end surface on the side of the connecting portion 5 has a linear shape, and the shape of the other portions may be arbitrarily changed depending on the purpose.

Further, the through holes 3 can be formed by either chemical or physical etching, but it goes without saying that the design of the mask pattern used differs depending on the method.

By adopting such a configuration, each source electrode 6 is connected to the connecting portion 5. Since the variation in inductance reaching the back surface ground electrode 4 via the lead-out source electrode 19 through hole 3 can be reduced, high frequency performance can be improved.

In addition, although the above embodiment describes a field effect transistor, the present invention is not limited to this.
The present invention can be similarly applied to other device structures.

〔Effect of the invention〕

As explained above, the present invention makes the shapes of the through holes formed in the back ground electrode and the first electrode part of the front surface linear on the connecting part side, and the distances from each connecting part to the end of the through hole are equal. Since the conductive paths are formed at a distance from each other, the lengths of the conductive paths from the electrodes of each node 2 formed in the active area to the back surface ground electrode via each connecting portion and the through hole of the first electrode 2 are equalized, thereby reducing the inductance. This has the advantage that variations are reduced and high frequency performance can be improved.

[Brief explanation of the drawing]

FIGS. 1(a) and 1(b) show a schematic configuration of an embodiment of the semiconductor device of the present invention.
Figures (a) and (b) show the configuration of a conventional semiconductor device -L
FIG. 2 is a top view and a sectional view taken along line BB. In the figure, 1 is an extraction source electrode, 2 is a semiconductor substrate,
3 is a through hole, 4 is a back ground electrode, 5 is a connecting portion, 6 is a source electrode, 7 is a drain electrode, and 8 is a gate electrode. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

[Claims] A first electrode formed on one main surface of the semiconductor substrate and an electrode formed on another main surface opposite to the first electrode are connected by a through hole, and further, a first electrode formed on the first main surface A second electrode is formed by being divided into a plurality of pieces at predetermined intervals, and the first electrode and the second electrode are each connected via a connecting part by a crossover method or an air bridge method. 1. A semiconductor device, wherein the through-hole is formed in a linear shape on the side of each of the connecting portions, and the distance from each of the connecting portions to the end of the through-hole is equidistant.