JPS6310889B2 - - Google Patents

Info

Publication number
JPS6310889B2
JPS6310889B2 JP55040891A JP4089180A JPS6310889B2 JP S6310889 B2 JPS6310889 B2 JP S6310889B2 JP 55040891 A JP55040891 A JP 55040891A JP 4089180 A JP4089180 A JP 4089180A JP S6310889 B2 JPS6310889 B2 JP S6310889B2
Authority
JP
Japan
Prior art keywords
pattern
forming
resist
chips
spaces
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55040891A
Other languages
English (en)
Japanese (ja)
Other versions
JPS56137627A (en
Inventor
Masaki Ito
Sotaro Edokoro
Hiroshi Gokan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP4089180A priority Critical patent/JPS56137627A/ja
Publication of JPS56137627A publication Critical patent/JPS56137627A/ja
Publication of JPS6310889B2 publication Critical patent/JPS6310889B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
JP4089180A 1980-03-28 1980-03-28 Pattern forming Granted JPS56137627A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4089180A JPS56137627A (en) 1980-03-28 1980-03-28 Pattern forming

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4089180A JPS56137627A (en) 1980-03-28 1980-03-28 Pattern forming

Publications (2)

Publication Number Publication Date
JPS56137627A JPS56137627A (en) 1981-10-27
JPS6310889B2 true JPS6310889B2 (enrdf_load_stackoverflow) 1988-03-10

Family

ID=12593129

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4089180A Granted JPS56137627A (en) 1980-03-28 1980-03-28 Pattern forming

Country Status (1)

Country Link
JP (1) JPS56137627A (enrdf_load_stackoverflow)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI303751B (en) * 2004-03-16 2008-12-01 Imec Inter Uni Micro Electr Method of manufacturing a semiconductor device
FR2960657B1 (fr) * 2010-06-01 2013-02-22 Commissariat Energie Atomique Procede de lithographie a dedoublement de pas
FR3001306A1 (fr) * 2013-01-18 2014-07-25 Commissariat Energie Atomique Procede de fabrication d'un reseau de conducteurs sur un substrat au moyen de copolymeres a blocs

Also Published As

Publication number Publication date
JPS56137627A (en) 1981-10-27

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