JPS63108730A - Method of annealing iii-v compound semiconductor - Google Patents
Method of annealing iii-v compound semiconductorInfo
- Publication number
- JPS63108730A JPS63108730A JP25497086A JP25497086A JPS63108730A JP S63108730 A JPS63108730 A JP S63108730A JP 25497086 A JP25497086 A JP 25497086A JP 25497086 A JP25497086 A JP 25497086A JP S63108730 A JPS63108730 A JP S63108730A
- Authority
- JP
- Japan
- Prior art keywords
- gaas
- compound semiconductor
- liquid
- annealing
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 45
- 238000000137 annealing Methods 0.000 title claims abstract description 25
- 238000000034 method Methods 0.000 title claims abstract description 23
- 150000001875 compounds Chemical class 0.000 title claims abstract description 21
- 239000007788 liquid Substances 0.000 claims abstract description 25
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract description 28
- 239000013078 crystal Substances 0.000 abstract description 15
- 238000010438 heat treatment Methods 0.000 abstract description 13
- 230000000694 effects Effects 0.000 abstract description 8
- 239000012535 impurity Substances 0.000 abstract description 6
- -1 GaAs compound Chemical class 0.000 abstract description 5
- 230000007547 defect Effects 0.000 abstract description 3
- 229910052785 arsenic Inorganic materials 0.000 description 8
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 8
- 239000011261 inert gas Substances 0.000 description 7
- 239000000758 substrate Substances 0.000 description 5
- 230000008020 evaporation Effects 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 238000005247 gettering Methods 0.000 description 2
- 238000010348 incorporation Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910052582 BN Inorganic materials 0.000 description 1
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 description 1
- 238000005299 abrasion Methods 0.000 description 1
- 239000006096 absorbing agent Substances 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 239000000356 contaminant Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000010494 dissociation reaction Methods 0.000 description 1
- 230000005593 dissociations Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 230000005484 gravity Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
Landscapes
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、ＧａＡｓ化合物半導体のようなｍ−ｖ族化合
物半導体のアニール法に関わる。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to an annealing method for m-v group compound semiconductors such as GaAs compound semiconductors.
本発明は、ＧａＡｓのようなｍ−ｖ族化合物半導体のア
ニール処理をこの化合物半導体を構成する■族元素を主
体とする液体中に浸漬して行うことによって良好にアニ
ールの所期の目的を確実に果たすことができるようにす
る。The present invention effectively ensures that the intended purpose of annealing is achieved by annealing an m-v group compound semiconductor such as GaAs by immersing it in a liquid mainly containing group II elements constituting this compound semiconductor. to be able to fulfill their duties.
ｍ−ｖ族化合物半導体、特にＧａＡｓ半導体結晶は高速
ＦＥＴあるいは集積回路等に広く用いられるに至ってい
る。この場合半導体基板すなわち半導体サブストレイト
として高純度の半絶縁性のＧａＡｓ基板上にＧａＡｓ化
合物半導体層をエピタキシャル成長して目的とする半導
体装置を構成するという方法が屡々採られる。この場合
、そのエピタキシャル成長の基板は結晶性に優れている
ことが要求され、これに高抵抗が要求される場合におい
て高純度の半絶縁性を呈することが必要となる。この種
の半絶縁性ＧａＡｓ結晶は、例えばＨＢ法（水平ブリッ
ジマン法）によって形成される。また、他の方法として
Ｌ Ｅ Ｃ法（液体封止引上法）あるいはＦＥＣ法（完
全液体封止引上法）等によるときは結晶性に優れた結晶
が得られるとされている。しかしながら、いずれの方法
によって得たＧａＡｓ結晶インゴットにおいてもこのイ
ンゴット、あるいはＧａＡｓ結晶体から切り出した基板
をアニールすることによって抵抗率ρを例えば１０’〜
ｉｏ’Ω・備に向上し且つ各部均一化することができ、
またその移動度μを例えば６×１ＯＪｃ！Ｊ／ｖ−３に
高め且つ均一化することができること、史にＥＬ２
（光吸収体）濃度の改善がはかられることが知られてい
る。 （例えばセミコンダクタワールド（Ｓｅｍｉｃｏ
ｎｄｕｃｔｏｒ Ｗｏｒｌｄ ） １９Ｂ５．６．９４
〜１００ Ｑあるいは特開昭５８−１７５８２８号公報
参照）。MV group compound semiconductors, particularly GaAs semiconductor crystals, have come to be widely used in high-speed FETs, integrated circuits, and the like. In this case, a method is often adopted in which a GaAs compound semiconductor layer is epitaxially grown on a high-purity semi-insulating GaAs substrate as a semiconductor substrate, ie, a semiconductor substrate to construct the intended semiconductor device. In this case, the epitaxially grown substrate is required to have excellent crystallinity, and when high resistance is required, it is required to exhibit high purity semi-insulating properties. This type of semi-insulating GaAs crystal is formed, for example, by the HB method (horizontal Bridgman method). Furthermore, it is said that crystals with excellent crystallinity can be obtained by other methods such as the LEC method (liquid-enclosed pulling method) or the FEC method (completely liquid-enclosed pulling method). However, in the GaAs crystal ingot obtained by either method, by annealing the ingot or the substrate cut out from the GaAs crystal, the resistivity ρ can be adjusted to, for example, 10' to 10'.
io'Ω・equipment can be improved and each part can be made uniform,
Moreover, its mobility μ is, for example, 6×1OJc! J/v-3 and can be made uniform, EL2
(Light absorber) It is known that the concentration can be improved. (For example, Semiconductor World (Semiconductor World)
ndductor World ) 19B5.6.94
~100 Q or see Japanese Patent Application Laid-Open No. 175828/1983).
上述したＧａＡｓに対するアニールは、例えば８００〜
１０００℃の温度で数時間以上熱処理を行う。The above-mentioned annealing for GaAs is, for example, 800~
Heat treatment is performed at a temperature of 1000° C. for several hours or more.
この場合、雰囲気として不活性ガスあるいは砒素（Ａｓ
）圧下で行う。つまり、この場合、ＧａＡｓ結晶は、熱
処理中にこれらの雰囲気にさらされている０通常不活性
ガスを用いる場合は、開管法によるものであり、この場
合ＧａＡｓ１ｌｔｊ晶表面から砒素が解離し、ＧａＡｓ
の組成にずれが生じて比抵抗が低下する虞れが生じ、ま
た砒素の解離によって表面が荒れたり逆に不活性ガスに
含まれる汚染物質がにａＡｓ結晶中へと拡散したりして
所期の目的を果たすことができない場合が生じるという
問題点がある。In this case, the atmosphere is an inert gas or arsenic (As).
) Perform under pressure. In other words, in this case, the GaAs crystal is exposed to these atmospheres during heat treatment.Usually, when an inert gas is used, the open tube method is used; in this case, arsenic is dissociated from the GaAs crystal surface, and the GaAs
There is a risk that the specific resistance will decrease due to a shift in the composition of the aAs crystal, and the dissociation of arsenic may cause the surface to become rough, or contaminants contained in the inert gas may diffuse into the aAs crystal, causing the desired result. There is a problem in that there are cases where the purpose cannot be achieved.
また、一方封管法により砒素圧化でアニール処理を行う
場合は、上述の問題点は改善されるものの封止管にする
ための作Ｖの畑雑ざ、さらに封止管を構成する石英管の
再使用の困難さ、さらに有害な砒素を取り扱うという安
全上の問題点がある。On the other hand, when performing annealing treatment using arsenic pressure using the sealing tube method, although the above-mentioned problems are improved, there are also problems with the field miscellaneousness of the crop V to make the sealed tube, and the quartz tube that constitutes the sealed tube. It is difficult to reuse arsenic, and there are safety issues associated with handling harmful arsenic.
本発明は上述した諸問題を解決し、アニールによってＧ
ａＡｓ組成に変動を来したり、また表面に荒れを生じさ
せたり不純物の取り込みを生じたり、有害な砒素を取り
扱うというよ・うな不都合を効果的に回避してアニール
の所期の目的を確実に達成することのできる■−■族化
合物半導体のアニール法を提供する。The present invention solves the above-mentioned problems and allows G
Effectively avoids inconveniences such as variations in aAs composition, surface roughness, impurity incorporation, and handling of harmful arsenic, ensuring that the intended purpose of annealing is achieved. The present invention provides a method of annealing group compound semiconductors that can be achieved.
本発明は、第１図に示すように容器（１）内に、アニー
ル処理を行おうとするｍ−ｖ族化合物干導体、例えばＧ
ａＡｓインゴットあるいはウェファをこの化合物半導体
を構成する■族元素すなわち一般に比較的融点の低く少
くともアニール処理温度以下の温度で液体となる■族元
素、例えばＧａを主体とする液体、例えばＧａ単体の液
体あるいはこのＧａとＧａＡｓとの液体に■族元素例え
ばＡｓを含ましめた液体（３）を収容する。そして、こ
の液体（３）にアニールを行おうとする被アニールｍ−
ｖ族化合物半導体（２）を浸漬して、この容器（１）を
加熱炉（４）中に配置して加熱炉（４）内に不活性ガス
を送給し、開管法によって例えば８００〜１０００’ｃ
の加熱処理を施して目的とするアニールを行う、図にお
いて（５）は加熱炉（４）の加熱手段で、（６）はその
炉心管を示す。In the present invention, as shown in FIG.
The aAs ingot or wafer is made of a Group 2 element constituting this compound semiconductor, that is, a Group 2 element that generally has a relatively low melting point and becomes liquid at a temperature at least below the annealing temperature, such as a liquid mainly composed of Ga, such as a liquid consisting of simple Ga. Alternatively, a liquid (3) containing a group Ⅰ element, for example, As, is contained in the liquid of Ga and GaAs. Then, the annealed target m- who wants to anneal this liquid (3)
The V-group compound semiconductor (2) is immersed, the container (1) is placed in a heating furnace (4), an inert gas is fed into the heating furnace (4), and a 1000'c
In the figure, (5) is the heating means of the heating furnace (4), and (6) is the furnace core tube.
上述の本発明方法によれば、被アニール■−■族化合物
半導体（２）例えばＧａＡｓを、Ｇａを主体とする液体
（３）中に浸漬した状態でアニールを行うので、化合物
半導体例えばＧａＡｓ半導体（２）からのＡｓの蒸発を
抑制し乍ら目的とするアニールを行うことができ、この
化合物半導体（２）の組成にずれを生じさせることが効
果的に回避される。特に液体（３）中にＧａＡｓを混入
させておくときはＧａＡｓ半導体（２）からのＡｓのと
び出しを、より効果的に抑制できる。また、半導体（２
）を液体（３）中でアニールするので、加熱炉（４）中
に送り込まれる不活性ガスが直接的に半導体（２）に接
触することがないので、この半導体（２）中への不純物
の拡散が回避され、また例えば液体（３）としてＧａを
用いる場合、その熱伝導率が高いことによって半導体（
２）の全域に渡って均一温度のアニール処理を行うこと
ができるので、良好なアニール効果が得られる。さらに
またＧａ液体（３）中に、半導体（２）に含まれる不要
不純物例えばＣｕ１Ｑ子のゲッタリングがなされる効果
もあり、半導体（２）がより高純度化されて結晶欠陥等
の発生がより効果的に抑制される。According to the above-described method of the present invention, since annealing is performed while the compound semiconductor (2) to be annealed, for example, GaAs, is immersed in the liquid (3) mainly composed of Ga, the compound semiconductor, for example, the GaAs semiconductor ( The desired annealing can be performed while suppressing the evaporation of As from the compound semiconductor (2), and deviations in the composition of the compound semiconductor (2) can be effectively avoided. In particular, when GaAs is mixed into the liquid (3), the protrusion of As from the GaAs semiconductor (2) can be more effectively suppressed. In addition, semiconductors (2
) is annealed in the liquid (3), so the inert gas sent into the heating furnace (4) does not come into direct contact with the semiconductor (2), thereby preventing impurities from entering the semiconductor (2). Diffusion is avoided, and when using Ga as the liquid (3), for example, its high thermal conductivity allows it to be used as a semiconductor (
2) Since the annealing treatment can be performed at a uniform temperature over the entire area, a good annealing effect can be obtained. Furthermore, the Ga liquid (3) has the effect of gettering unnecessary impurities contained in the semiconductor (2), such as Cu1Q atoms, making the semiconductor (2) more purified and reducing the occurrence of crystal defects. effectively suppressed.
容器（１）は、例えば石英管あるいはＰＢＮ （パイロ
リックボロンナイトライド）によって構成する。The container (1) is made of, for example, a quartz tube or PBN (pyrolic boron nitride).
容Ｗ （１）内にＧａとＧａＡｓとによる液体（３）を
収容し、ＧａＡｓ半導体（２）、例えばＨＢ法、ＬＥＣ
法、ＦＥＣ法等によって育成したＧａＡｓ結晶インゴッ
ト或いはこれより切り出したＧａＡｓ半導体（２）を全
体が液体（３）中に浸されるように容器＋１１内に入れ
、加熱炉（４）中に導入してアニールする。A liquid (3) made of Ga and GaAs is contained in the container W (1), and a GaAs semiconductor (2), for example, HB method, LEC
A GaAs crystal ingot grown by the FEC method or the FEC method, or a GaAs semiconductor (2) cut out from the ingot, is placed in a container +11 so that the whole is immersed in the liquid (3), and introduced into a heating furnace (4). and anneal.
他の例としては第２図に示すように容器＋１１内に収容
した例えばＧａとＧａＡｓによる■原液体（３）上にさ
らに８２ （ｂ等の液体（３）に比し比重の小さい他の
液体（７）を配置してＧａＡｓ半導体（２）及びＧａ液
体（３）からのＱａないしはＡｓの蒸発を阻止するよう
になし得る。この日２０３とＧａとは比重が相違するこ
とから層状に堆積された状態を保持され、またＢ２Ｏ３
はその融点が５００℃程度であるのでアニール処理温度
では液状を保持している。As another example, as shown in FIG. (7) can be arranged to prevent the evaporation of Qa or As from the GaAs semiconductor (2) and the Ga liquid (3).Since 203 and Ga have different specific gravities, they are deposited in a layered manner. B2O3
Since its melting point is about 500° C., it remains liquid at the annealing temperature.
尚、上述した例ではＧａＡｓ半導体に対するアニールに
ついて主として説明したが他の類似の性状を示すｍ−ｖ
族化合物半導体に本発明を適用することが出来る。In the above example, the annealing for GaAs semiconductor was mainly explained, but other m-v exhibiting similar properties were explained.
The present invention can be applied to group compound semiconductors.
上述したように本発明においては、化合物半導体（２）
例えばＧａＡｓ化合物半導体のアニールを、その構成元
素の例えばＧａを主体とする液体中でいわば封止された
状態でアニール処理を施すようにしたので、加熱炉とし
ては不活性ガスを流す閉管法によって形成することがで
き、閉管法による場合の謬問題を解消できてその取り扱
いがＷＦｊ単となる。As mentioned above, in the present invention, compound semiconductor (2)
For example, when annealing a GaAs compound semiconductor, it is annealed in a sealed state in a liquid whose main constituent element is Ga, so the heating furnace can be formed using a closed-tube method in which an inert gas is flowed. This eliminates the problem of errors caused by the closed pipe method, and the handling becomes simple with WFj.
また■原液体（３）中でのアニールであることによって
例えば砒素Ａ３を取り扱う場合の安全性の問題もなく、
しかも液体（３）によって囲まれていることによってＧ
ａＡｓの組成のずれを来すなどの不都合や不活性ガスか
らの不純物の取り込み等が回避され、更に不純物のゲッ
タリング効果さえ得られることから高純度の結晶が得ら
れる。更に、例えば熱伝導度の高いＧａを主体とする液
体中でアニールがなされるので、被アニール半導体（２
）を全域に亘って均一に加熱できることからアニール効
果が、より確実になされて高砥抗化、移動度の向上、結
晶欠陥の低下等のアニールの所期の目的を効果的に果た
すことができる。Also, by annealing in the raw liquid (3), there is no safety problem when handling arsenic A3, for example.
Moreover, because it is surrounded by liquid (3), G
Inconveniences such as a deviation in the composition of aAs and the incorporation of impurities from the inert gas are avoided, and a gettering effect of impurities is even obtained, so that highly pure crystals can be obtained. Furthermore, since annealing is performed in a liquid mainly composed of Ga, which has high thermal conductivity, the semiconductor to be annealed (2
) can be heated uniformly over the entire area, which makes the annealing effect more reliable and effectively achieves the intended purpose of annealing, such as increasing abrasion resistance, improving mobility, and reducing crystal defects. .
第１図及び第２図は本発明方法を実施する装置の各側を
示す路線的断面図である。
（１）は容器、（２）はアニール処理を施す化合物半導
体、（３）は■原液体、（４）は加熱炉である。1 and 2 are cross-sectional views showing each side of the apparatus for carrying out the method of the invention. (1) is a container, (2) is a compound semiconductor to be annealed, (3) is ■raw liquid, and (4) is a heating furnace.
Claims (1)
族化合物半導体を構成するIII族元素を主体とする液体
中に浸漬した状態で行うことを特徴とするIII−Ｖ族化
合物半導体のアニール法。The annealing treatment of the III-V compound semiconductor is performed using the III-V compound semiconductor described above.
1. An annealing method for a III-V compound semiconductor, characterized in that it is carried out in a state where the compound semiconductor is immersed in a liquid mainly containing a group III element constituting the group compound semiconductor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25497086A JPS63108730A (en) | 1986-10-27 | 1986-10-27 | Method of annealing iii-v compound semiconductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25497086A JPS63108730A (en) | 1986-10-27 | 1986-10-27 | Method of annealing iii-v compound semiconductor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63108730A true JPS63108730A (en) | 1988-05-13 |
Family
ID=17272396
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP25497086A Pending JPS63108730A (en) | 1986-10-27 | 1986-10-27 | Method of annealing iii-v compound semiconductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63108730A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100488830B1 (en) * | 1997-01-23 | 2005-09-12 | 스미토모덴키고교가부시키가이샤 | Heat treatment method of group II-VI compound semiconductor |
| JP2009161401A (en) * | 2008-01-08 | 2009-07-23 | Mitsubishi Chemicals Corp | Method for controlling content of impurity element in single crystal, single crystal and semiconductor device |
-
1986
- 1986-10-27 JP JP25497086A patent/JPS63108730A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100488830B1 (en) * | 1997-01-23 | 2005-09-12 | 스미토모덴키고교가부시키가이샤 | Heat treatment method of group II-VI compound semiconductor |
| JP2009161401A (en) * | 2008-01-08 | 2009-07-23 | Mitsubishi Chemicals Corp | Method for controlling content of impurity element in single crystal, single crystal and semiconductor device |
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