JPS6310563U - - Google Patents
Info
- Publication number
- JPS6310563U JPS6310563U JP1986103787U JP10378786U JPS6310563U JP S6310563 U JPS6310563 U JP S6310563U JP 1986103787 U JP1986103787 U JP 1986103787U JP 10378786 U JP10378786 U JP 10378786U JP S6310563 U JPS6310563 U JP S6310563U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- heat sink
- soldered
- utility
- model registration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Description
第１図は本考案の面実装型半導体装置の実施例
の平面図、第２図はその側面図、第３図はその波
熱板の部分拡大斜視図、第４図は従来の面実装型
半導体装置の平面図、第５図はその側面図である
。 ８……本体、１０……放熱板、１０ａ……小片
、１２……スリツト。
の平面図、第２図はその側面図、第３図はその波
熱板の部分拡大斜視図、第４図は従来の面実装型
半導体装置の平面図、第５図はその側面図である
。 ８……本体、１０……放熱板、１０ａ……小片
、１２……スリツト。
Claims (1)
- 【実用新案登録請求の範囲】 (1) ハンダ付けされて基板に固定される放熱板
を有する半導体装置において、 上記放熱板のハンダ付けされる部分に複数のス
リツトを形成して、該部を櫛歯状に形成したこと
を特徴とする半導体装置。 (2) 上記放熱板の端部が垂直部を有する段状に
形成されると共に、上記スリツトが該垂直部の上
端部まで切込み形成されたことを特徴とする実用
新案登録請求の範囲第１項記載の半導体装置。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986103787U JPS6310563U (ja) | 1986-07-08 | 1986-07-08 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986103787U JPS6310563U (ja) | 1986-07-08 | 1986-07-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6310563U true JPS6310563U (ja) | 1988-01-23 |
Family
ID=30976676
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1986103787U Pending JPS6310563U (ja) | 1986-07-08 | 1986-07-08 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6310563U (ja) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61125058A (ja) * | 1984-11-22 | 1986-06-12 | Hitachi Ltd | 半導体装置 |
-
1986
- 1986-07-08 JP JP1986103787U patent/JPS6310563U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61125058A (ja) * | 1984-11-22 | 1986-06-12 | Hitachi Ltd | 半導体装置 |