JPS63105332U - - Google Patents
Info
- Publication number
- JPS63105332U JPS63105332U JP20409786U JP20409786U JPS63105332U JP S63105332 U JPS63105332 U JP S63105332U JP 20409786 U JP20409786 U JP 20409786U JP 20409786 U JP20409786 U JP 20409786U JP S63105332 U JPS63105332 U JP S63105332U
- Authority
- JP
- Japan
- Prior art keywords
- stem
- semiconductor
- chip
- pedestal
- recess
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 10
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 claims description 4
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Landscapes
- Pressure Sensors (AREA)
- Wire Bonding (AREA)
- Die Bonding (AREA)
Description
第１図は本考案に係る半導体ステムを適用した
大気圧用半導体圧力センサの縦断面図である。
１……圧力導入ポート、２……半導体チツプ、
３……Ａｕ線、４……リード、５……ステム台座
、６……半導体チツプの支持体、７……キヤツプ
。
FIG. 1 is a longitudinal sectional view of a semiconductor pressure sensor for atmospheric pressure to which a semiconductor stem according to the present invention is applied. 1...Pressure introduction port, 2...Semiconductor chip,
3...Au wire, 4...Lead, 5...Stem pedestal, 6...Semiconductor chip support, 7...Cap.
Claims (1)
ヤボンデイングにより前記チツプと結線されるリ
ードを前記ステム台座上に備えてなる半導体用ス
テムにおいて、前記ステム台座に凹陥部を形成し
、該凹陥部内に半導体チツプを該半導体チツプと
熱膨張係数が等価な支持体を介して収容し、該半
導体チツプのボンデイングパツドの高さ位置を前
記リードとほぼ同一高さ位置に設定したことを特
徴とする半導体用ステム。 In a semiconductor stem which has a stem pedestal for mounting a semiconductor chip and has leads on the stem pedestal that are connected to the chip by wire bonding, a recess is formed in the stem pedestal, and the semiconductor is mounted in the recess. A semiconductor device, characterized in that a chip is accommodated through a support having a thermal expansion coefficient equivalent to that of the semiconductor chip, and the height position of the bonding pad of the semiconductor chip is set at approximately the same height position as the lead. stem.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20409786U JPS63105332U (en) | 1986-12-24 | 1986-12-24 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20409786U JPS63105332U (en) | 1986-12-24 | 1986-12-24 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63105332U true JPS63105332U (en) | 1988-07-08 |
Family
ID=31170036
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20409786U Pending JPS63105332U (en) | 1986-12-24 | 1986-12-24 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63105332U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110098213A (en) * | 2019-05-15 | 2019-08-06 | 德淮半导体有限公司 | A kind of chip module method for packing and positioning |
-
1986
- 1986-12-24 JP JP20409786U patent/JPS63105332U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110098213A (en) * | 2019-05-15 | 2019-08-06 | 德淮半导体有限公司 | A kind of chip module method for packing and positioning |