JPS63102326U - - Google Patents
Info
- Publication number
- JPS63102326U JPS63102326U JP19675586U JP19675586U JPS63102326U JP S63102326 U JPS63102326 U JP S63102326U JP 19675586 U JP19675586 U JP 19675586U JP 19675586 U JP19675586 U JP 19675586U JP S63102326 U JPS63102326 U JP S63102326U
- Authority
- JP
- Japan
- Prior art keywords
- integrator
- comparator
- input
- voltage
- reference voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims description 5
- 238000006243 chemical reaction Methods 0.000 claims description 4
- 230000010354 integration Effects 0.000 claims 3
- 230000001105 regulatory effect Effects 0.000 claims 1
- 230000001052 transient effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
- 230000003321 amplification Effects 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
Landscapes
- Measurement Of Current Or Voltage (AREA)
- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
Description
第１図はこの考案に係るＶ／Ｆ変換回路の第１
実施例を示す要部回路図、第２図は同上第１実施
例における積分器の応答特性等を示す波形図、第
３図はこの考案の第２実施例を示す回路図、第４
図は同上第２実施例における変換誤差特性を示す
特性図で比較例も併せ示す図、第５図はこの考案
の第３実施例を示す要部回路図、第６図は従来の
Ｖ／Ｆ変換回路を示す回路図である。
１：積分器を構成する反転アンプ、４：入力電
圧の入力端子、５：増幅度が１の反転アンプ、６
：比較器、８：出力端子、１１，１２：積分器、
Ｃ１：補償用コンデンサ、Ｃ２：積分コンデンサ
、Ｒ１：入力抵抗。
Figure 1 shows the first V/F conversion circuit according to this invention.
FIG. 2 is a waveform diagram showing the response characteristics of the integrator in the first embodiment, FIG. 3 is a circuit diagram showing the second embodiment of this invention, and FIG.
The figure is a characteristic diagram showing the conversion error characteristics in the second embodiment of the same as above, and also shows a comparative example. Figure 5 is a circuit diagram of the main part showing the third embodiment of this invention. Figure 6 is a conventional V/F. FIG. 2 is a circuit diagram showing a conversion circuit. 1: Inverting amplifier forming an integrator, 4: Input terminal for input voltage, 5: Inverting amplifier with amplification degree of 1, 6
: Comparator, 8: Output terminal, 11, 12: Integrator,
C1 : Compensation capacitor, C2 : Integrating capacitor, R1 : Input resistance.
Claims (1)
サを備え入力電圧を積分する積分器と、該積分器
から出力される積分電圧を基準電圧と比較する比
較器とを有し、当該積分電圧が基準電圧に達する
ごとに該比較器からの出力で前記積分器への入力
を反転制御するとともに該比較器の基準電圧を異
ならせて、当該比較器から入力電圧に比例した周
波数の信号を出力する回路であつて、 前記積分器への入力の反転時に、当該入力電圧
に比例した過渡電流を前記積分コンデンサに供給
する補償用コンデンサを、前記積分時定数規定用
の抵抗に並列に接続したことを特徴とするＶ／Ｆ
変換回路。[Claims for Utility Model Registration] An integrator that integrates an input voltage is equipped with a resistor and an integration capacitor that define an integration time constant, and a comparator that compares the integrated voltage output from the integrator with a reference voltage. , each time the integrated voltage reaches the reference voltage, the output from the comparator inverts and controls the input to the integrator, and the reference voltage of the comparator is varied, so that the frequency proportional to the input voltage from the comparator is A circuit for outputting a signal, wherein a compensation capacitor for supplying a transient current proportional to the input voltage to the integrating capacitor when the input to the integrator is inverted is connected in parallel to the resistor for regulating the integration time constant. A V/F characterized by being connected to
conversion circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19675586U JPH0427218Y2 (en) | 1986-12-23 | 1986-12-23 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19675586U JPH0427218Y2 (en) | 1986-12-23 | 1986-12-23 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63102326U true JPS63102326U (en) | 1988-07-04 |
| JPH0427218Y2 JPH0427218Y2 (en) | 1992-06-30 |
Family
ID=31155849
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19675586U Expired JPH0427218Y2 (en) | 1986-12-23 | 1986-12-23 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0427218Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013253841A (en) * | 2012-06-06 | 2013-12-19 | Fuji Electric Co Ltd | Current sensing circuit |
-
1986
- 1986-12-23 JP JP19675586U patent/JPH0427218Y2/ja not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013253841A (en) * | 2012-06-06 | 2013-12-19 | Fuji Electric Co Ltd | Current sensing circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0427218Y2 (en) | 1992-06-30 |
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