JP2013253841A - Current sensing circuit - Google Patents

Current sensing circuit Download PDF

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JP2013253841A
JP2013253841A JP2012129011A JP2012129011A JP2013253841A JP 2013253841 A JP2013253841 A JP 2013253841A JP 2012129011 A JP2012129011 A JP 2012129011A JP 2012129011 A JP2012129011 A JP 2012129011A JP 2013253841 A JP2013253841 A JP 2013253841A
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output signal
capacitor
comparator
resistor
current
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Motomitsu Iwamoto
基光 岩本
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Fuji Electric Co Ltd
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PROBLEM TO BE SOLVED: To provide a current sensing circuit having a simple configuration, which is capable of accurately sensing current without being influenced by temperature characteristics of a shunt resistor.SOLUTION: A current sensing circuit includes: an integrator circuit comprising an operational amplifier with an input resistor whose temperature coefficient is same as that of a shunt resistor which converts current being measured into voltage and a capacitor on a feedback part; a comparator with hysteresis characteristics, which compares output voltage from the integrator circuit with first and second threshold values and sets the output signal thereof either to High or Low; a charge switch which allows voltage across the shunt resistor to be fed to the operational amplifier via the input resistor to charge the capacitor when the comparator output signal is High; a discharge switch which allows electrical charge accumulated in the capacitor to be discharged via a discharge resistor when the comparator output signal is Low; and a counter which counts the time during which the comparator output signal is High.

Description

本発明は、シャント抵抗を用いて電流検出する上での温度依存性をなくした電流検出回路に関する。   The present invention relates to a current detection circuit that eliminates temperature dependency in current detection using a shunt resistor.

測定対象とする電流を検出して量子化する技術として、例えば図6に示すように測定対象とする電流Iをシャント抵抗R1に流し、シャント抵抗R1に発生した電圧を差動アンプ(演算増幅器)OPにて検出し、その出力電圧をA/D変換器にて量子化して出力する電流検出回路が知られている(例えば非特許文献1を参照)。尚、図6においてRa,Rbは演算増幅器OPの入力抵抗、Rcはバイアス抵抗、そしてRdは帰還抵抗である。また抵抗ReおよびコンデンサCは、前記A/D変換器に対するエリアシング防止用のローパスフィルタ(LPF)を形成している。   As a technique for detecting and quantizing a current to be measured, for example, as shown in FIG. 6, a current I to be measured is passed through a shunt resistor R1, and a voltage generated in the shunt resistor R1 is a differential amplifier (operational amplifier). There is known a current detection circuit that detects an OP and quantizes an output voltage by an A / D converter and outputs the quantized output voltage (see, for example, Non-Patent Document 1). In FIG. 6, Ra and Rb are input resistors of the operational amplifier OP, Rc is a bias resistor, and Rd is a feedback resistor. The resistor Re and the capacitor C form a low pass filter (LPF) for preventing aliasing for the A / D converter.

ところでシャント抵抗R1には温度によってその抵抗値が変化すると言う温度特性があり、その温度特性が電流検出精度を左右すると言う問題がある。そこでシャント抵抗R1として、金属皮膜抵抗等の温度係数の小さい抵抗を用いることが提唱されている。またシャント抵抗R1の温度特性を予め求めておき、サーミスタ等の温度センサを用いて計測される温度に応じて電流検出値を温度補正することも提唱されている(例えば特許文献1を参照)。   Incidentally, the shunt resistor R1 has a temperature characteristic that its resistance value changes with temperature, and there is a problem that the temperature characteristic affects current detection accuracy. Therefore, it has been proposed to use a resistor having a small temperature coefficient such as a metal film resistor as the shunt resistor R1. It has also been proposed that the temperature characteristic of the shunt resistor R1 is obtained in advance and the current detection value is temperature-corrected according to the temperature measured using a temperature sensor such as a thermistor (see, for example, Patent Document 1).

特開2011−125130号公報JP 2011-125130 A

ルネサス μPD166015GRデータシート(2012.01.19)Renesas μPD166015GR data sheet (2012.01.19)

しかしながら金属皮膜抵抗は高価であり、またシャント抵抗R1を含む電流検出回路全体を集積回路化しようとした場合、金属皮膜抵抗と同等の温度係数の小さい抵抗をチップ上に集積することが必要となり、その実現が困難である。更にはA/D変換器の前段にローパスフィルタ(LPF)を形成する必要があり、構成部品点数の増大要因となるので、電流検出回路のコストダウンを図る上での妨げとなる。   However, the metal film resistor is expensive, and when the entire current detection circuit including the shunt resistor R1 is to be integrated, it is necessary to integrate a resistor having a small temperature coefficient equivalent to the metal film resistor on the chip. Its realization is difficult. Furthermore, it is necessary to form a low-pass filter (LPF) in front of the A / D converter, which increases the number of components, which hinders cost reduction of the current detection circuit.

ところで差動アンプ(演算増幅器)OPの利得を決定する入力抵抗Rbと帰還抵抗Rdの温度特性を揃えることで、該差動アンプOP自体の温度特性を相殺することができる。しかしシャント抵抗R1の温度特性を補償するべく、例えば差動アンプOPの入力抵抗Ra,Rbとシャント抵抗R1の温度特性を揃えると、逆に差動アンプ(演算増幅器)OP自体の温度特性が問題となることが否めない。   By the way, the temperature characteristics of the differential amplifier OP itself can be offset by aligning the temperature characteristics of the input resistor Rb and the feedback resistor Rd that determine the gain of the differential amplifier (operational amplifier) OP. However, in order to compensate for the temperature characteristics of the shunt resistor R1, for example, if the temperature characteristics of the input resistors Ra and Rb of the differential amplifier OP and the shunt resistor R1 are aligned, the temperature characteristics of the differential amplifier (operational amplifier) OP itself is a problem. I can't deny that.

本発明はこのような事情を考慮してなされたもので、その目的は、シャント抵抗の温度特性に依存することなく高精度に電流検出を行うことのできる簡易な構成の電流検出回路を提供することにある。   The present invention has been made in consideration of such circumstances, and an object of the present invention is to provide a current detection circuit having a simple configuration capable of performing current detection with high accuracy without depending on the temperature characteristics of the shunt resistor. There is.

上述した目的を達成するべく本発明に係る電流検出回路は、
測定対象とする電流を電圧に変換するシャント抵抗と、
このシャント抵抗と同じ温度係数を持つ入力抵抗を備えると共に、フィードバック部にコンデンサを備えた演算増幅器により構成された積分回路と、
ヒステリシス特性を設定した第1および第2の閾値と前記積分回路の出力電圧とを比較してその出力信号を[H]または[L]に反転する比較器と、
前記シャント抵抗と入力抵抗との間に介装されて前記比較器の出力によりオン・オフ制御され、前記入力抵抗を介して前記シャント抵抗に生起された電圧を前記演算増幅器に入力して前記コンデンサを充電する充電スイッチと、
前記比較器の出力信号により前記充電スイッチと相補的にオン・オフ制御され、放電抵抗を介して前記コンデンサに充電された電荷を放電する放電スイッチと、
前記比較器の前記充電スイッチをオンさせる出力信号の出力期間、または一定期間に前記比較器の出力信号が反転する回数を測定するカウンタと
を具備したことを特徴としている。
In order to achieve the above-described object, a current detection circuit according to the present invention includes:
A shunt resistor that converts the current to be measured into a voltage;
An integration circuit including an input resistor having the same temperature coefficient as the shunt resistor and an operational amplifier including a capacitor in the feedback unit;
A comparator that compares the first and second threshold values set with hysteresis characteristics with the output voltage of the integrating circuit and inverts the output signal to [H] or [L];
The capacitor is interposed between the shunt resistor and the input resistor and is controlled to be turned on / off by the output of the comparator, and a voltage generated in the shunt resistor is input to the operational amplifier via the input resistor. Charging switch to charge,
A discharge switch that is ON / OFF controlled complementarily to the charge switch by an output signal of the comparator, and discharges the charge charged in the capacitor via a discharge resistor;
And a counter that measures the number of times that the output signal of the comparator is inverted in a certain period of time, or an output period of an output signal that turns on the charging switch of the comparator.

好ましくは前記演算増幅器は、例えば前記コンデンサの充電に伴ってその出力電圧を低下させる反転増幅型の積分回路を構成する。そして前記比較器は、前記積分回路の出力電圧が前記コンデンサの充電に伴って前記第1の閾値まで低下したときに前記出力信号を[L]に反転し、前記コンデンサの放電に伴って前記積分回路の出力電圧が前記第2の閾値まで上昇したときに前記出力信号を[H]に反転するヒステリシス特性を有するものである。   Preferably, the operational amplifier constitutes an inverting amplification type integration circuit that lowers its output voltage as the capacitor is charged, for example. The comparator inverts the output signal to [L] when the output voltage of the integration circuit decreases to the first threshold with charging of the capacitor, and the integration with discharge of the capacitor. When the output voltage of the circuit rises to the second threshold value, it has a hysteresis characteristic that inverts the output signal to [H].

また前記カウンタは、前記比較器の出力信号が[H]である期間に亘って所定周波数のクロック信号を計数し、その計数値を前記検出対象とする電流に反比例する信号として出力するように、或いは予め設定した一定時間に亘って前記比較器の出力信号が[H]または[L]に反転する回数を計数し、その計数値を前記検出対象とする電流に比例する信号として出力するように構成される。   Further, the counter counts a clock signal having a predetermined frequency over a period in which the output signal of the comparator is [H], and outputs the counted value as a signal inversely proportional to the current to be detected. Alternatively, the number of times the output signal of the comparator is inverted to [H] or [L] over a predetermined time is counted, and the counted value is output as a signal proportional to the current to be detected. Composed.

上記構成の電流検出回路によれば、積分回路を形成した演算増幅器の入力抵抗とシャント抵抗の温度係数が揃っているので、該演算増幅器の出力電圧の時間変化率(傾き)は温度に依存することなく一定となる。そして前記演算増幅器の出力電圧が一定電圧だけ変化する時間は、前記シャント抵抗に流れる電流に反比例し、温度に依存しない。従って前記演算増幅器の出力電圧が一定電圧だけ変化する時間を計測することで、前記シャント抵抗の温度係数に依存することなく高精度に電流検出を行うことができる。   According to the current detection circuit having the above configuration, since the temperature coefficients of the input resistance and shunt resistance of the operational amplifier forming the integration circuit are uniform, the time change rate (slope) of the output voltage of the operational amplifier depends on the temperature. It becomes constant without. The time for the output voltage of the operational amplifier to change by a constant voltage is inversely proportional to the current flowing through the shunt resistor and does not depend on the temperature. Therefore, by measuring the time during which the output voltage of the operational amplifier changes by a certain voltage, current detection can be performed with high accuracy without depending on the temperature coefficient of the shunt resistor.

また上記構成によれば従来のようなA/D変換器が不要であり、またA/D変換器に対するエリアシング防止用のローパスフィルタ(LPF)も不要なので、その構成の簡素化を図ることができる。更にはシャント抵抗として温度係数の大きい安価な抵抗を用いることも可能であり、シャント抵抗を含めた電流検出回路全体の集積回路化も容易となる等の利点がある。   Further, according to the above configuration, the conventional A / D converter is unnecessary, and a low pass filter (LPF) for preventing aliasing for the A / D converter is also unnecessary, so that the configuration can be simplified. it can. Furthermore, it is possible to use an inexpensive resistor having a large temperature coefficient as the shunt resistor, and there is an advantage that an integrated circuit of the entire current detection circuit including the shunt resistor can be easily obtained.

本発明の電流検出原理を説明する為の図。The figure for demonstrating the electric current detection principle of this invention. 図1に示す積分回路を形成した演算増幅器の時間・出力特性を示す図。The figure which shows the time and output characteristic of the operational amplifier which formed the integration circuit shown in FIG. 本発明の一実施形態に係る電流検出回路の概略構成図。1 is a schematic configuration diagram of a current detection circuit according to an embodiment of the present invention. 図3に示す電流検出回路の動作を示す信号波形図。FIG. 4 is a signal waveform diagram showing an operation of the current detection circuit shown in FIG. 3. 本発明の別の実施形態に係る電流検出回路の概略略構成図。The schematic schematic block diagram of the current detection circuit which concerns on another embodiment of this invention. 従来の一般的な電流検出回路の概略構成図。The schematic block diagram of the conventional general current detection circuit.

本発明に係る電流検出回路は、図1にその概略構成を示すように、測定対象とする電流Iを電圧に変換するシャント抵抗R1と同じ温度係数kを持つ入力抵抗R2を備えると共に、フィードバック部にコンデンサCを備えた演算増幅器OPにより構成された積分回路を用い、この積分回路(演算増幅器OP)の出力電圧Voの時間変化から前記電流Iを検出するようにしたものである。   The current detection circuit according to the present invention includes an input resistor R2 having the same temperature coefficient k as the shunt resistor R1 that converts the current I to be measured into a voltage as shown in FIG. An integrating circuit constituted by an operational amplifier OP provided with a capacitor C is used, and the current I is detected from the time change of the output voltage Vo of the integrating circuit (operational amplifier OP).

ここでシャント抵抗R1に電流Iが流れたとき、積分回路の入力電圧となるノードAに生じる電圧は前記シャント抵抗R1の抵抗値をr1として[r1・I]となる。また演算増幅器OPの反転入力端子であるノードBの電圧は、イマジナリーショートが成り立つので接地電位(0V)であり、従って入力抵抗R2に流れる電流は該入力抵抗R2の抵抗値をr2とした[r1・I/(r1+r2)]となる。しかしながら、r2≫r1であるから、[(r1/r2)・I/(r1/r2+1)≒r1・I/r2]と近似できる。この電流により積分回路のコンデンサCが充電されるので前記演算増幅器OPの出力電圧Voは、tを時間として
Vo=−{(I・r1)/(C・r2)}・t …(1)
となる。
Here, when the current I flows through the shunt resistor R1, the voltage generated at the node A, which is the input voltage of the integrating circuit, becomes [r1 · I] with the resistance value of the shunt resistor R1 as r1. The voltage at node B, which is the inverting input terminal of the operational amplifier OP, is ground potential (0V) because an imaginary short circuit is established, and therefore the current flowing through the input resistor R2 has the resistance value of the input resistor R2 as r2. r1 · I / (r1 + r2)]. However, since r2 >> r1, it can be approximated as [(r1 / r2) · I / (r1 / r2 + 1) ≈r1 · I / r2]. Since the capacitor C of the integration circuit is charged by this current, the output voltage Vo of the operational amplifier OP is expressed by Vo = − {(I · r1) / (C · r2)} · t (1) where t is time.
It becomes.

一方、シャント抵抗R1と入力抵抗R2の温度係数が等しく、その温度係数をkとすれば、シャント抵抗R1および入力抵抗R2の温度Tに依存する抵抗値は、基準温度Toにおける前記各抵抗R1,R2の基準抵抗値をそれぞれr1o,r2oとしたとき
r1=r1o{1+k(T−To)} …(2)
r2=r2o{1+k(T−To)} …(3)
として表わせる。
On the other hand, if the temperature coefficients of the shunt resistor R1 and the input resistor R2 are equal and the temperature coefficient is k, the resistance values depending on the temperature T of the shunt resistor R1 and the input resistor R2 are the resistances R1, R2 at the reference temperature To. When the reference resistance values of R2 are r1o and r2o, respectively, r1 = r1o {1 + k (T−To)} (2)
r2 = r2o {1 + k (T-To)} (3)
Can be expressed as

従って(2)式、(3)式を(1)式に代入すると
Vo=−{(I・r1o)/(C・r2o)}・t …(4)
となり、温度Tに依存する項がなくなる。即ち、演算増幅器OPの出力電圧Voの時間変化率(傾き)は、図2に示すように温度Tに依存することのない一定の値となる。そして上記出力電圧Voが一定の電圧ΔVoだけ変化する時間Δtは、
Δt=−{(C・r2o)/(I・r1o)}・ΔVo
となる。換言すれば、演算増幅器OPの出力電圧Voが一定電圧ΔVoだけ変化する時間Δtは、シャント抵抗R1に流れる電流Iに反比例し、温度Tに依存することがない。
Therefore, when the expressions (2) and (3) are substituted into the expression (1), Vo = − {(I · r1o) / (C · r2o)} · t (4)
Thus, there is no term dependent on the temperature T. That is, the time change rate (slope) of the output voltage Vo of the operational amplifier OP is a constant value that does not depend on the temperature T as shown in FIG. The time Δt during which the output voltage Vo changes by a constant voltage ΔVo is
Δt = − {(C · r2o) / (I · r1o)} · ΔVo
It becomes. In other words, the time Δt during which the output voltage Vo of the operational amplifier OP changes by the constant voltage ΔVo is inversely proportional to the current I flowing through the shunt resistor R1, and does not depend on the temperature T.

本発明に係る電流検出回路は、上述した如くシャント抵抗R1と等しい温度係数kを持つ入力抵抗R2を備え、フィードバック部にコンデンサCを備えた演算増幅器OPにより構成した積分回路を用い、この積分回路(演算増幅器OP)の出力電圧Voが一定電圧ΔVoだけ変化する時間Δtを計測して、これによって前記シャント抵抗R1に流れる電流Iを検出すると言う計測原理に立脚している。   As described above, the current detection circuit according to the present invention includes the input circuit R2 having the temperature coefficient k equal to that of the shunt resistor R1, and uses an integration circuit including an operational amplifier OP including a capacitor C in the feedback unit. This is based on the measurement principle that the time Δt during which the output voltage Vo of the (operational amplifier OP) changes by a constant voltage ΔVo is measured, and thereby the current I flowing through the shunt resistor R1 is detected.

図3は本発明の一実施形態に係る電流検出回路の概略構成を示している。図3においてISは測定対象とする電流(被測定電流)Iを流す電流源を示しており、R1はシャント抵抗である。またUは、前記シャント抵抗R1と同じ温度係数kを持つ入力抵抗R2を備えると共に、フィードバック部にコンデンサCを備えた演算増幅器OPにより構成された積分回路である。具体的には前記入力抵抗R2は、非反転端子(+)が接地された演算増幅器OPの反転入力端子(−)に接続され、また前記コンデンサCは演算増幅器OPの出力端子と前記反転入力端子との間に接続されており、反転型の積分回路Uが構成されている。   FIG. 3 shows a schematic configuration of a current detection circuit according to an embodiment of the present invention. In FIG. 3, IS indicates a current source for supplying a current to be measured (current to be measured) I, and R1 is a shunt resistor. U is an integrating circuit including an input resistor R2 having the same temperature coefficient k as the shunt resistor R1 and an operational amplifier OP including a capacitor C in a feedback unit. Specifically, the input resistor R2 is connected to the inverting input terminal (−) of the operational amplifier OP whose non-inverting terminal (+) is grounded, and the capacitor C is connected to the output terminal of the operational amplifier OP and the inverting input terminal. And an inversion type integration circuit U is configured.

前記シャント抵抗R1の一端であって、前記電流源ISからシャント抵抗R1に電流が流れ込むノードAと前記入力抵抗R2との間には、後述する比較器COMPの出力信号によりオン・オフ制御される充電スイッチS1が介装されている。この充電スイッチS1がオンであるとき、前記ノードAの電圧が前記演算増幅器OPの反転入力端子に印加されて前記コンデンサCが充電される。   One end of the shunt resistor R1 and between the node A where the current flows from the current source IS to the shunt resistor R1 and the input resistor R2 are on / off controlled by an output signal of a comparator COMP described later. A charge switch S1 is interposed. When the charging switch S1 is on, the voltage at the node A is applied to the inverting input terminal of the operational amplifier OP to charge the capacitor C.

また前記演算増幅器OPの反転入力端子には、前記比較器COMPの出力信号により前記充電スイッチS1と相補的にオン・オフ制御される放電スイッチS2が放電抵抗R3を介して接続されている。この放電スイッチS2がオンであるとき、前記演算増幅器OPの反転入力端子が前記放電抵抗R3を介して負電源V1に接続され、前記コンデンサCに充電された電荷が放電される。   The inverting input terminal of the operational amplifier OP is connected via a discharge resistor R3 to a discharge switch S2 that is ON / OFF controlled complementarily to the charge switch S1 by the output signal of the comparator COMP. When the discharge switch S2 is on, the inverting input terminal of the operational amplifier OP is connected to the negative power source V1 through the discharge resistor R3, and the charge charged in the capacitor C is discharged.

ここで前記比較器COMPは、前記積分回路Uの出力である前記演算増幅器OPの出力電圧Voを入力し、予め設定された第1の閾値Vth1および第2の閾値Vth2(>Vth1)と前記出力電圧Voとを比較してその出力信号を[H]または[L]に反転するヒステリシス特性を有する、いわゆるヒステリシス・コンパレータからなる。尚、前記第1の閾値Vth1は第1の基準電圧源V2により設定され、また第2の閾値Vth2は第2の基準電圧源V3により設定される。   Here, the comparator COMP receives the output voltage Vo of the operational amplifier OP, which is the output of the integrating circuit U, and the first threshold value Vth1 and the second threshold value Vth2 (> Vth1) set in advance and the output. It comprises a so-called hysteresis comparator having a hysteresis characteristic that compares the voltage Vo and inverts its output signal to [H] or [L]. The first threshold Vth1 is set by the first reference voltage source V2, and the second threshold Vth2 is set by the second reference voltage source V3.

具体的には前記比較器COMPは、前記積分回路U(演算増幅器OP)の出力電圧Voが前記コンデンサCの充電に伴って第1の閾値Vth1まで低下したときにその出力信号を[L]に反転し、また前記コンデンサCの放電に伴って前記演算増幅器OPの出力電圧Voが前記第2の閾値Vth2まで上昇したときにその出力信号を[H]に反転する、ヒステリシス特性を有する。   Specifically, the comparator COMP changes its output signal to [L] when the output voltage Vo of the integrating circuit U (operational amplifier OP) drops to the first threshold value Vth1 as the capacitor C is charged. It has a hysteresis characteristic in which the output signal is inverted to [H] when the output voltage Vo of the operational amplifier OP rises to the second threshold value Vth2 as the capacitor C is discharged.

前述した充電スイッチS1は、このような比較器COMPの出力信号が[H]のときにオンとなり、前記シャント抵抗R1に生じた電圧を前記入力抵抗R2を介して演算増幅器OPの反転端子に印加して前記コンデンサCを充電する。そして前記充電スイッチS1は、前記比較器COMPの出力信号が[L]のときにはオフとなって前記シャント抵抗R1を演算増幅器OPから切り離す。   The charge switch S1 described above is turned on when the output signal of the comparator COMP is [H], and the voltage generated in the shunt resistor R1 is applied to the inverting terminal of the operational amplifier OP via the input resistor R2. Then, the capacitor C is charged. The charging switch S1 is turned off when the output signal of the comparator COMP is [L], and disconnects the shunt resistor R1 from the operational amplifier OP.

また前記放電スイッチS2は、論理反転器INVを介して前記比較器COMPの出力信号によりオン・オフ制御される。従って放電スイッチS2は、前記比較器COMPの出力信号が[L]のときにオンとなり、前記放電抵抗R3を介して前記コンデンサCに充電された電荷を放電し、また前記比較器COMPの出力信号が[H]のときにはオフとなって前記コンデンサCの放電経路を遮断する。   The discharge switch S2 is ON / OFF controlled by an output signal of the comparator COMP via a logic inverter INV. Accordingly, the discharge switch S2 is turned on when the output signal of the comparator COMP is [L], discharges the charge charged in the capacitor C through the discharge resistor R3, and the output signal of the comparator COMP. Is [H], it is turned off and the discharge path of the capacitor C is cut off.

換言すれば前記充電スイッチS1と放電スイッチS2とは、前記比較器COMPの出力信号が[H]であるか、或いは[L]であるかによって相補的にオン・オフ制御される。そして充電スイッチS1のオン時(放電スイッチS2のオフ時)には前記コンデンサCが充電され、また放電スイッチS2のオン時(充電スイッチS1のオフ時)には前記コンデンサCの充電電荷が放電される。   In other words, the charge switch S1 and the discharge switch S2 are complementarily turned on / off depending on whether the output signal of the comparator COMP is [H] or [L]. The capacitor C is charged when the charging switch S1 is on (when the discharging switch S2 is off), and the charging charge of the capacitor C is discharged when the discharging switch S2 is on (when the charging switch S1 is off). The

一方、前記比較器COMPの出力信号をイネーブル端子に入力するカウンタCOUNTは、前記出力信号が[H]であるとき、そのクロック端子に入力される所定周波数のクロック信号CPを計数し、その計数値Nを前記電流Iに反比例する信号として出力する。このカウンタCOUNTの出力信号(計数値N)は、例えば図示しないマイクロコンピュータ等に対して、ディジタル化(量子化)された電流データとして与えられる。   On the other hand, when the output signal is [H], the counter COUNT that inputs the output signal of the comparator COMP counts the clock signal CP of a predetermined frequency input to the clock terminal, and the count value N is output as a signal inversely proportional to the current I. An output signal (count value N) of the counter COUNT is given as digitized (quantized) current data to, for example, a microcomputer (not shown).

上述した如く構成された電流検出回路によれば前記比較器COMPの出力信号が[H]のとき、充電スイッチS1がオンとなり、同時に放電スイッチS2がオフとなる。従って前述したように入力抵抗R2を介して演算増幅器OPに流れ込む電流[r1・I/r2]によって前記コンデンサCが充電される。この結果、前記演算増幅器OPの出力電圧Voは、コンデンサCに充電された電荷量をQとしたとき
Vo=−Q/C=−{(I・r1)/(C・r2)}・t …(5)
となり、図4(b)(d)にそれぞれ示すように時間tの経過と共に低下する。尚、図4(b)は、図4(a)に実線Xで示すようにシャント抵抗R1に流れ込む電流Iが少ないときの出力電圧Voの変化を示しており、また図4(b)は図4(a)に破線Yで示すようにシャント抵抗R1に流れ込む電流Iが多いときの出力電圧Voの変化を示している。
According to the current detection circuit configured as described above, when the output signal of the comparator COMP is [H], the charge switch S1 is turned on, and at the same time, the discharge switch S2 is turned off. Therefore, as described above, the capacitor C is charged by the current [r1 · I / r2] flowing into the operational amplifier OP via the input resistor R2. As a result, the output voltage Vo of the operational amplifier OP is represented by Vo = −Q / C = − {(I · r1) / (C · r2)} · t when the amount of charge charged in the capacitor C is Q. (5)
As shown in FIGS. 4B and 4D, it decreases with the passage of time t. 4 (b) shows the change in the output voltage Vo when the current I flowing into the shunt resistor R1 is small as shown by the solid line X in FIG. 4 (a), and FIG. 4 (a) shows a change in the output voltage Vo when the current I flowing into the shunt resistor R1 is large as indicated by a broken line Y.

そして前記出力電圧Voが前記第1の閾値Vth1まで低下したとき、図4(c)(e)にそれぞれ示すように前記比較器COMPの出力信号が[L]に反転する。尚、図4(c)は、前記シャント抵抗R1に流れ込む電流Iが少ないときの前記比較器COMPの出力信号の変化を示しており、また図4(e)は前記シャント抵抗R1に流れ込む電流Iが多いときの前記比較器COMPの出力信号の変化を示している。   When the output voltage Vo drops to the first threshold value Vth1, the output signal of the comparator COMP is inverted to [L] as shown in FIGS. 4 (c) and 4 (e). 4C shows a change in the output signal of the comparator COMP when the current I flowing into the shunt resistor R1 is small, and FIG. 4E shows the current I flowing into the shunt resistor R1. This shows a change in the output signal of the comparator COMP when there is a large amount.

すると前記比較器COMPの出力信号の反転に伴って今度は前記充電スイッチS1がオフとなり、同時に放電スイッチS2がオンとなる。この結果、前記コンデンサCに充電された電荷が前述したように放電抵抗R3を介して放電するので前記演算増幅器OPの出力電圧Voが上昇する。そして前記出力電圧Voが前記第1の閾値Vth1まで上昇したとき、前記比較器COMPの出力信号が[H]に反転する。従って前記充電スイッチS1が再びオンとなり、同時に放電スイッチS2がオフとなって前記コンデンサCの充電が再び開始される。以降、前記コンデンサCの充電と放電とが交互に繰り返される。   Then, with the inversion of the output signal of the comparator COMP, the charging switch S1 is turned off and the discharging switch S2 is turned on at the same time. As a result, since the electric charge charged in the capacitor C is discharged through the discharge resistor R3 as described above, the output voltage Vo of the operational amplifier OP rises. When the output voltage Vo rises to the first threshold value Vth1, the output signal of the comparator COMP is inverted to [H]. Accordingly, the charging switch S1 is turned on again, and at the same time, the discharging switch S2 is turned off, and charging of the capacitor C is started again. Thereafter, charging and discharging of the capacitor C are repeated alternately.

ここで前記コンデンサCの充電期間、即ち、前記比較器COMPの出力信号が[H]となっている期間ΔThは、前記比較器COMPに設定された第1および第2の閾値Vth1,Vth2の電圧差をΔVth(=Vth2−Vth1)としたとき
ΔTh={(C・r2)/(I・r1)}・ΔVth …(6)
として表わすことができ、前記シャント抵抗R1に流れる電流Iに反比例する。
Here, the charging period of the capacitor C, that is, the period ΔTh in which the output signal of the comparator COMP is [H] is the voltage of the first and second threshold values Vth1 and Vth2 set in the comparator COMP. When the difference is ΔVth (= Vth2−Vth1) ΔTh = {(C · r2) / (I · r1)} · ΔVth (6)
And is inversely proportional to the current I flowing through the shunt resistor R1.

具体的にはシャント抵抗R1に流れる電流Iが少ない場合(実線X)には前記コンデンサCの充電速度が遅いので、図4(b)に示すように前記演算増幅器OPの出力電圧Voの変化が緩やかであり、図4(c)に示すように比較器COMPの出力信号が[H]となっている期間ΔThが長くなる。これに対して前記シャント抵抗R1に流れる電流Iが多い場合(破線Y)には、前記コンデンサCの充電速度が速くなるので、図4(d)に示すように前記演算増幅器OPの出力電圧Voの変化が急であり、図4(c)に示すように比較器COMPの出力信号が[H]となっている期間ΔThが短くなる。   Specifically, when the current I flowing through the shunt resistor R1 is small (solid line X), the charging speed of the capacitor C is slow, so that the change in the output voltage Vo of the operational amplifier OP as shown in FIG. As shown in FIG. 4C, the period ΔTh in which the output signal of the comparator COMP is [H] is long. On the other hand, when the current I flowing through the shunt resistor R1 is large (broken line Y), the charging speed of the capacitor C increases, so that the output voltage Vo of the operational amplifier OP as shown in FIG. As shown in FIG. 4C, the period ΔTh during which the output signal of the comparator COMP is [H] is shortened.

従って前述したようにカウンタCOUNTにて前記比較器COMPの出力信号が[H]となっている期間ΔThに亘ってクロック信号CPを計数する。そしてその計数値Nを前記出力信号が[H]となっている期間ΔThを示すデータとして求めれば、前記電流Iに反比例する計数値Nを電流データとして得ることが可能となる。しかも電流データを量子化した計数値Nとして求めることが可能となる。   Therefore, as described above, the counter COUNT counts the clock signal CP over the period ΔTh during which the output signal of the comparator COMP is [H]. If the count value N is obtained as data indicating the period ΔTh in which the output signal is [H], the count value N inversely proportional to the current I can be obtained as current data. In addition, the count value N obtained by quantizing the current data can be obtained.

特に上記構成によればシャント抵抗R1と入力抵抗R2の温度係数が等しいので、前記(6)式に前述した(2)式および(3)式を代入すれば、
ΔTh={(C・r2o)/(I・r1o)}・ΔVth …(7)
となり、温度Tに依存する項がなくなる。故に温度Tに依存することなく前記シャント抵抗R1に流れる電流Iを高精度に検出することが可能となる。
In particular, according to the above configuration, since the temperature coefficients of the shunt resistor R1 and the input resistor R2 are equal, if the above-described equations (2) and (3) are substituted into the equation (6),
ΔTh = {(C · r2o) / (I · r1o)} · ΔVth (7)
Thus, there is no term dependent on the temperature T. Therefore, the current I flowing through the shunt resistor R1 can be detected with high accuracy without depending on the temperature T.

また上記構成によれば図6に示した従来の電流検出回路のように、差動アンプ(演算増幅器OP)を用いて検出した電流値(電圧)をA/D変換器を用いてディジタル化(量子化)する必要がなく、またA/D変換器に対するエリアシング防止用のローパスフィルタ(LPF)も不要なので、その構成の簡素化を図ることができる。更にはシャント抵抗R1として温度係数の小さい金属皮膜抵抗を用いる必要がなく、換言すれば温度係数の大きい安価な抵抗を用いることも可能であり、シャント抵抗を含めた電流検出回路全体の集積回路化も容易となる等の利点がある。   Further, according to the above configuration, as in the conventional current detection circuit shown in FIG. 6, the current value (voltage) detected using the differential amplifier (operational amplifier OP) is digitized using the A / D converter ( There is no need for quantization, and no low-pass filter (LPF) for preventing aliasing for the A / D converter is required, so that the configuration can be simplified. Furthermore, it is not necessary to use a metal film resistor having a small temperature coefficient as the shunt resistor R1, in other words, it is possible to use an inexpensive resistor having a large temperature coefficient, and the entire current detection circuit including the shunt resistor can be integrated into an integrated circuit. There is an advantage that it becomes easy.

ところで上述した実施形態においては、比較器COMPの出力信号が[H]となっている期間ΔThを、カウンタCOUNTを用いてクロック信号CPを計数することで求め、これによって前記電流Iに反比例する計数値Nを電流データとして求めた。しかし図5に本発明の変形例を示すように一定時間内における前記比較器COMPの出力信号の反転回数、具体的には比較器COMPの出力信号が[H]または[L]となる回数をカウンタCOUNTを用いて計測することも可能である。   By the way, in the above-described embodiment, the period ΔTh in which the output signal of the comparator COMP is [H] is obtained by counting the clock signal CP using the counter COUNT, thereby calculating the period inversely proportional to the current I. The numerical value N was obtained as current data. However, as shown in FIG. 5 as a modification of the present invention, the number of inversions of the output signal of the comparator COMP within a predetermined time, specifically, the number of times the output signal of the comparator COMP becomes [H] or [L]. It is also possible to measure using the counter COUNT.

尚、図5においては前述した図3に示す電流検出回路と同一部分には同一符号を付して示しており、重複した説明を省略する。この図5に示す電流検出回路は、前記カウンタCOUNTにおいてクロック信号CPを計数することに代えて、該カウンタCOUNTのクロック端子に前記比較器COMPの出力信号を入力し、前記出力信号の反転回数を、ひいては該出力信号の周波数を直接的に計数するように構成したことを特徴としている。   In FIG. 5, the same parts as those of the above-described current detection circuit shown in FIG. 3 are denoted by the same reference numerals, and redundant description is omitted. In the current detection circuit shown in FIG. 5, instead of counting the clock signal CP in the counter COUNT, the output signal of the comparator COMP is input to the clock terminal of the counter COUNT, and the number of inversions of the output signal is calculated. In this case, the frequency of the output signal is directly counted.

即ち、前記演算増幅器OPの出力電圧Voが第1の閾値Vth1から第2の閾値Vth2まで上昇する時間、つまりコンデンサCの放電時間をTdとすると、前記演算増幅器OPの出力電圧Voが増減する1周期Topは、前述したコンデンサCの充電時間ΔThと放電時間Tdの和となり
Top ={(C・r2o)/(I・r1o)}・ΔVth+Td …(8)
として表わせる。
That is, when the output voltage Vo of the operational amplifier OP rises from the first threshold value Vth1 to the second threshold value Vth2, that is, when the discharge time of the capacitor C is Td, the output voltage Vo of the operational amplifier OP increases or decreases 1 The period Top is the sum of the charging time ΔTh of the capacitor C and the discharging time Td described above. Top = {(C · r2o) / (I · r1o)} · ΔVth + Td (8)
Can be expressed as

そして前記放電抵抗R3の抵抗値が小さいとすれば、前記放電時間Tdは前記コンデンサCの充電時間ΔThに比較して十分に小さくなり、前記演算増幅器OPの出力電圧Voが増減する1周期Topを
Top ≒{(C・r2o)/(I・r1o)}・ΔVth …(9)
として近似的に表わすことができる。従って前記出力信号の周波数fcは
fc=1/Top
=(I・r1o)/(C・r2o・ΔVth) …(10)
として表わすことができ、この周波数fcは前記シャント抵抗R1に流れる電流Iに比例する。
If the resistance value of the discharge resistor R3 is small, the discharge time Td is sufficiently shorter than the charge time ΔTh of the capacitor C, and one period Top in which the output voltage Vo of the operational amplifier OP increases or decreases is reduced. Top≈ {(C · r2o) / (I · r1o)} · ΔVth (9)
As an approximation. Therefore, the frequency fc of the output signal is fc = 1 / Top.
= (I · r1o) / (C · r2o · ΔVth) (10)
This frequency fc is proportional to the current I flowing through the shunt resistor R1.

従って前述したようにカウンタCOUNTを用いて前記比較器COMPの出力信号の反転回数を一定時間に亘って計数すれば、その計数値Nは前記出力信号の周波数fcを示すことになり、ここに前記シャント抵抗R1に流れる電流Iを計測することが可能となる。換言すれば前記電流Iの時間平均値を計測することが可能となる。故に前述した実施形態と同様な効果が奏せられる。   Therefore, as described above, if the counter COUNT is used to count the number of inversions of the output signal of the comparator COMP over a certain period of time, the count value N indicates the frequency fc of the output signal. It becomes possible to measure the current I flowing through the shunt resistor R1. In other words, the time average value of the current I can be measured. Therefore, the same effect as the above-described embodiment can be obtained.

尚、本発明は上述した実施形態に限定されるものではない。例えばシャント抵抗R1の抵抗値や、演算増幅器OPを用いて構成される積分回路Uの積分定数、更には比較器COMPに設定する第1および第2の閾値Vth1,Vth2等は、測定対象とする電流Iの大きさやその変化幅等の計測仕様に応じて設定すれば良いものである。また非反転型の積分回路Uを構成し、比較器COMPの出力信号を逆に用いて充電スイッチS1および放電スイッチS2をオン・オフ制御してコンデンサCの充放電を制御し、該コンデンサCの充電時間を計測することも可能である。その他、本発明はその要旨を逸脱しない範囲で種々変形して実施することができる。   The present invention is not limited to the embodiment described above. For example, the resistance value of the shunt resistor R1, the integration constant of the integration circuit U configured using the operational amplifier OP, and the first and second threshold values Vth1 and Vth2 set in the comparator COMP are to be measured. What is necessary is just to set according to measurement specifications, such as the magnitude | size of the electric current I, its change width. Further, a non-inverting type integration circuit U is configured, and the charge switch S1 and the discharge switch S2 are controlled to be turned on / off by using the output signal of the comparator COMP in reverse, and the charge / discharge of the capacitor C is controlled. It is also possible to measure the charging time. In addition, the present invention can be variously modified and implemented without departing from the scope of the invention.

R1 シャント抵抗
R2 入力抵抗
R3 放電抵抗
OP 演算増幅器
C コンデンサ
U 積分回路
COMP 比較器(ヒステリシス・コンパレータ)
INV 論理反転器
COUNT カウンタ
R1 Shunt resistance R2 Input resistance R3 Discharge resistance OP Operational amplifier C Capacitor U Integration circuit COMP Comparator (hysteresis comparator)
INV logic inverter COUNT counter

Claims (4)

測定対象とする電流を電圧に変換するシャント抵抗と、
このシャント抵抗と同じ温度係数を持つ入力抵抗を備えると共に、フィードバック部にコンデンサを備えた演算増幅器により構成された積分回路と、
ヒステリシス特性を設定した第1および第2の閾値と前記積分回路の出力電圧とを比較してその出力信号を反転する比較器と、
前記シャント抵抗と入力抵抗との間に介装されて前記比較器の出力信号によりオン・オフ制御され、前記入力抵抗を介して前記シャント抵抗に生起された電圧を前記演算増幅器に入力して前記コンデンサを充電する充電スイッチと、
前記比較器の出力信号により前記充電スイッチと相補的にオン・オフ制御され、放電抵抗を介して前記コンデンサに充電された電荷を放電する放電スイッチと、
前記比較器の前記充電スイッチをオンさせる出力信号の出力時間、または一定期間に前記比較器の出力信号が反転する回数を測定するカウンタと
を具備したことを特徴とする電流検出回路。
A shunt resistor that converts the current to be measured into a voltage;
An integration circuit including an input resistor having the same temperature coefficient as the shunt resistor and an operational amplifier including a capacitor in the feedback unit;
A comparator that compares the first and second threshold values set with hysteresis characteristics with the output voltage of the integrating circuit and inverts the output signal;
The switch is interposed between the shunt resistor and the input resistor, and is controlled to be turned on / off by the output signal of the comparator, and the voltage generated in the shunt resistor is input to the operational amplifier via the input resistor. A charge switch for charging the capacitor;
A discharge switch that is ON / OFF controlled complementarily to the charge switch by an output signal of the comparator, and discharges the charge charged in the capacitor via a discharge resistor;
A current detection circuit comprising: a counter for measuring an output time of an output signal for turning on the charging switch of the comparator or a number of times the output signal of the comparator is inverted during a certain period.
前記演算増幅器は、前記コンデンサの充電に伴ってその出力電圧を低下させる反転増幅型の積分回路を構成するものであって、
前記比較器は、前記積分回路の出力電圧が前記コンデンサの充電に伴って前記第1の閾値まで低下したときに前記出力信号を[L]に反転し、前記コンデンサの放電に伴って前記積分回路の出力電圧が前記第2の閾値まで上昇したときに前記出力信号を[H]に反転するヒステリシス特性を有するものである請求項1に記載の電流検出回路。
The operational amplifier constitutes an inverting amplification type integration circuit that lowers its output voltage as the capacitor is charged,
The comparator inverts the output signal to [L] when the output voltage of the integration circuit decreases to the first threshold value with charging of the capacitor, and the integration circuit with discharge of the capacitor. 2. The current detection circuit according to claim 1, wherein the current detection circuit has a hysteresis characteristic that inverts the output signal to [H] when the output voltage of the first output voltage rises to the second threshold value.
前記カウンタは、前記比較器の出力信号が[H]である期間に亘って所定周波数のクロック信号を計数し、その計数値を前記検出対象とする電流に反比例する信号として出力するものである請求項1に記載の電流検出回路。   The counter counts a clock signal having a predetermined frequency over a period in which the output signal of the comparator is [H], and outputs the count value as a signal inversely proportional to the current to be detected. Item 2. The current detection circuit according to Item 1. 前記カウンタは、予め設定した一定時間に亘って前記比較器の出力信号が[H]または[L]に反転する回数を計数し、その計数値を前記検出対象とする電流に比例する信号として出力するものである請求項1に記載の電流検出回路。   The counter counts the number of times the output signal of the comparator is inverted to [H] or [L] over a predetermined time, and outputs the count value as a signal proportional to the current to be detected. The current detection circuit according to claim 1.
JP2012129011A 2012-06-06 2012-06-06 Current sensing circuit Pending JP2013253841A (en)

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