JPS6296860U - - Google Patents
Info
- Publication number
- JPS6296860U JPS6296860U JP18815685U JP18815685U JPS6296860U JP S6296860 U JPS6296860 U JP S6296860U JP 18815685 U JP18815685 U JP 18815685U JP 18815685 U JP18815685 U JP 18815685U JP S6296860 U JPS6296860 U JP S6296860U
- Authority
- JP
- Japan
- Prior art keywords
- sensor array
- detection circuit
- view
- substrate
- plan
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 4
- 239000011159 matrix material Substances 0.000 claims description 2
- 238000000034 method Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
Landscapes
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
- Facsimile Heads (AREA)
Description
第１図ないし第１０図はこの考案の一実施例を
示すもので、第１図は略図的に示す側面図、第２
図は平面図、第３図は側面図、第４図は平面図、
第５図はその一部を拡大して示す平面図、第６図
ａ〜ｅはセンサーアレイ作成工程を順に示す断面
図、第７図ａ〜ｇは検知回路作成工程を順に示す
断面図、第８図ａ〜ｄは接合結線工程を順に示す
断面図、第９図は一部を拡大して示す平面図、第
１０図は完成状態の概略を示す平面図、第１１図
は従来例を略図的に示す側面図である。
４…センサーアレイ、５…検知回路、１４…金
属基板（基板）、２２…マトリツクス回路、２５
…結線。
Figures 1 to 10 show one embodiment of this invention, with Figure 1 being a schematic side view and Figure 2 being a schematic side view.
The figure is a plan view, the third figure is a side view, the fourth figure is a plan view,
FIG. 5 is a plan view showing an enlarged part of the same, FIGS. 6 a to 6 e are sectional views sequentially showing the sensor array fabrication process, FIGS. 7 a to g are sectional views sequentially illustrating the detection circuit fabrication process, and FIGS. Figures 8 a to d are cross-sectional views showing the joining and wiring process in order, Figure 9 is a partially enlarged plan view, Figure 10 is a plan view schematically showing the completed state, and Figure 11 is a schematic diagram of a conventional example. FIG. 4...Sensor array, 5...Detection circuit, 14...Metal substrate (substrate), 22...Matrix circuit, 25
... Wire connection.
Claims (1)
ス配線構造の検知回路を形成し、前記センサーア
レイを前記基板上に配置させて前記検知回路と直
接的に接合結線したことを特徴とするセンサーア
レイデバイス。 A sensor array device characterized in that a detection circuit having a matrix wiring structure is formed on a substrate separately from the sensor array, and the sensor array is disposed on the substrate and directly bonded and connected to the detection circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18815685U JPS6296860U (en) | 1985-12-06 | 1985-12-06 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18815685U JPS6296860U (en) | 1985-12-06 | 1985-12-06 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6296860U true JPS6296860U (en) | 1987-06-20 |
Family
ID=31139263
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18815685U Pending JPS6296860U (en) | 1985-12-06 | 1985-12-06 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6296860U (en) |
-
1985
- 1985-12-06 JP JP18815685U patent/JPS6296860U/ja active Pending