JPS6292328A - Forming method for insulating film - Google Patents
Forming method for insulating filmInfo
- Publication number
- JPS6292328A JPS6292328A JP23304685A JP23304685A JPS6292328A JP S6292328 A JPS6292328 A JP S6292328A JP 23304685 A JP23304685 A JP 23304685A JP 23304685 A JP23304685 A JP 23304685A JP S6292328 A JPS6292328 A JP S6292328A
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- film
- temperature
- semiconductor substrate
- oxide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は良好な特性を有するゲート絶縁膜を得ることか
できる積層絶縁膜の形成方法に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for forming a laminated insulating film that allows a gate insulating film with good characteristics to be obtained.
従来技術とその間−植
従来、ゲート絶縁膜に用いる酸化膜は、界面準位密度が
低く、良質な絶縁膜が得られる熱酸化法によって得られ
るのが一般的であるが、約1000°Cの高温処理を必
要とするため、ガラス基板上で素子を形成する場合にガ
ラス基板が溶融してしまい、形成が困難となる。従って
、このような場合、低温での良質な絶縁膜の形成が要求
される。低温での絶縁膜形成方法としては、常圧CVD
法、プラズマCVD法、光CVD法、プラズマ陽極酸化
法等が通常用いられている。CVD法によって酸化膜を
形成する場合、酸化膜の水素処理、アニール等の後処理
によって耐圧の向上等の特性の改善が計られているもの
の、半導体との界面に欠陥が生じ易く、界面準位密度が
熱酸化膜に較べて、1〜2桁大きくなるという欠点があ
る。また、プラズマ陽極酸化法においては、基板に高電
圧を印加するために、電子やイオンが高エネルギーで基
板を照射して表面の損傷を招き、半導体基板と形成した
酸化膜との間の界面準位密度はやはり、高温の熱酸化に
よる絶縁膜に較べて1〜2桁大きくなるという問題があ
る。このため、これらの方法により得られた酸化膜は、
半導体装置の層間絶縁膜や保護膜としては利用されてい
るものの、r、sr等のゲート絶縁膜には用いられてい
ない。Conventional technology and what's between - Plants Conventionally, oxide films used for gate insulating films have been generally obtained by thermal oxidation, which has a low density of interface states and can yield high-quality insulating films. Since high-temperature processing is required, when an element is formed on a glass substrate, the glass substrate melts, making formation difficult. Therefore, in such cases, it is required to form a high quality insulating film at low temperatures. Atmospheric pressure CVD is a method for forming an insulating film at low temperatures.
A method such as a method, a plasma CVD method, a photo CVD method, a plasma anodic oxidation method, etc. are commonly used. When forming an oxide film by the CVD method, although it is possible to improve the characteristics such as increasing the withstand voltage by post-processing the oxide film such as hydrogen treatment and annealing, defects are likely to occur at the interface with the semiconductor, and the interface state The disadvantage is that the density is one to two orders of magnitude higher than that of a thermal oxide film. In addition, in the plasma anodization method, since high voltage is applied to the substrate, electrons and ions irradiate the substrate with high energy, causing damage to the surface and creating an interface between the semiconductor substrate and the formed oxide film. There is still a problem in that the potential density is one to two orders of magnitude higher than that of an insulating film formed by high-temperature thermal oxidation. Therefore, the oxide films obtained by these methods are
Although it is used as an interlayer insulating film or a protective film in semiconductor devices, it is not used in gate insulating films such as r and sr.
従って、低温で処理でき、しかも、ゲート絶縁膜にも用
いることが可能な良好な性能を有する絶縁膜を形成する
方法が望まれている。Therefore, there is a need for a method of forming an insulating film that can be processed at low temperatures and has good performance that can also be used as a gate insulating film.
発明の目的
本発明は、低温でのプロセスにおいて、耐圧が高く、か
つ界面特性の良好な絶縁膜を形成する方法を提供するこ
とを目的とする。OBJECTS OF THE INVENTION An object of the present invention is to provide a method for forming an insulating film with high breakdown voltage and good interface characteristics in a process at low temperature.
光匪q構戊
本発明は、半導体基板を550℃以下の温度で熱酸化し
て半導体基板表面に酸化薄膜を形成し、次いで、該酸化
薄膜」二に絶縁膜を積層することを特徴とする半導体基
板−にに絶縁膜を形成する方法を提供する。The present invention is characterized in that a semiconductor substrate is thermally oxidized at a temperature of 550° C. or lower to form an oxide thin film on the surface of the semiconductor substrate, and then an insulating film is laminated on the oxide thin film. A method for forming an insulating film on a semiconductor substrate is provided.
熱酸化する温度は、550℃以下の温度である。The thermal oxidation temperature is 550°C or lower.
550℃を越えると、ガラスの軟化点に近づき、ガラス
基板上での素子形成ができなくなる。ガラス基板に歪み
が生じない範囲でできるだけ高温が望ましい。When the temperature exceeds 550° C., the temperature approaches the softening point of glass, making it impossible to form elements on the glass substrate. The temperature is preferably as high as possible without causing distortion to the glass substrate.
熱酸化雰囲気は、通常酸素または水蒸気雰囲気が用いら
れる。The thermal oxidation atmosphere is usually an oxygen or water vapor atmosphere.
低温熱酸化による酸化薄膜の厚さとしては、通常10〜
50人の範囲が好ましい。薄ずぎると均一な膜が得られ
ず、また厚くするには極めて長時間の酸化が必要となり
、スルーブツトが大幅に低下するからである。特に、好
ましくは30〜50人の厚さの酸化薄膜である。The thickness of the oxide thin film formed by low-temperature thermal oxidation is usually 10~
A range of 50 people is preferred. This is because if the film is too thin, a uniform film cannot be obtained, and increasing the film thickness requires oxidation for an extremely long time, resulting in a significant reduction in throughput. Particularly preferred is a thin oxide film with a thickness of 30 to 50 people.
上記工程で得られた酸化薄膜」二に絶縁膜を積層する方
法は、低温での酸化膜形成方法である常圧CVD法、プ
ラズマCV I)法、光CVD法等を使用でき、低温プ
ロセスにおいても、界面特性の良好な絶縁膜を得ること
ができる。The method of laminating an insulating film on the oxide thin film obtained in the above process can be performed using low-temperature oxide film forming methods such as normal pressure CVD, plasma CVD, photo-CVD, etc. Also, an insulating film with good interfacial properties can be obtained.
本発明により、半導体基板」−に絶縁膜を形成する場合
、予め、半導体基板を550℃以下で熱酸化することに
より、高温での熱酸化膜に近い化学的組成の遷移領域を
持つ酸化薄膜を形成し、さらにその」二層に絶縁膜を積
層することにより界面構造が熱酸化膜に近いムのとなり
、低温プロセスにおいて、界面準位密度の低い、良好な
界面構造の絶縁膜が得られるのである。According to the present invention, when an insulating film is formed on a semiconductor substrate, the semiconductor substrate is thermally oxidized at 550°C or lower in advance to form an oxide thin film having a transition region with a chemical composition close to that of a thermally oxidized film at high temperatures. By forming an insulating film and then laminating an insulating film on top of the two layers, the interface structure becomes similar to that of a thermal oxide film, and an insulating film with a good interface structure and low interface state density can be obtained in a low-temperature process. be.
以下、本発明の効果を明確にするため、具体的に実施例
を、第1図から第5図を参照して説明する。 第1図か
ら第3図は、本発明による酸化膜を用いたMOSキャパ
シタの形成プロセスを示したものである。まず、シリコ
ン基板(1)を乾燥酸素雰囲気中、550℃で熱酸化し
た(第1図)。このような低温においても1〜2時間の
処理によってlO〜数十数十酸化薄膜(2)が形成され
た。次に、常圧CVD法により、基板温度400℃で目
的の膜厚1000人まで酸化膜(3)を積層した(第2
図)。熱酸化は低温では酸化速度が遅く、また、CVD
膜の膜質は成膜温度が高い程緻密であり特性も良好であ
るから、本発明の2つの酸化膜形成工程は、製造プロセ
スの範囲内で出来るだけ高温で行なうことが望ましい。Hereinafter, in order to clarify the effects of the present invention, examples will be specifically described with reference to FIGS. 1 to 5. 1 to 3 show a process for forming a MOS capacitor using an oxide film according to the present invention. First, a silicon substrate (1) was thermally oxidized at 550° C. in a dry oxygen atmosphere (FIG. 1). Even at such a low temperature, an oxide thin film (2) ranging from 10 to several dozen was formed by treatment for 1 to 2 hours. Next, an oxide film (3) was laminated by atmospheric pressure CVD at a substrate temperature of 400°C to the desired film thickness of 1,000 layers (second
figure). Thermal oxidation has a slow oxidation rate at low temperatures, and CVD
Since the quality of the film is denser and has better characteristics as the film forming temperature is higher, it is desirable that the two oxide film forming steps of the present invention be performed at as high a temperature as possible within the range of the manufacturing process.
次に、酸化膜、特に上層の酸化膜(3)の特性を向上さ
せるために、窒素雰囲気中550℃でのアニ−ルおよび
350℃水素プラズマ処理を各々1時間行なった。最後
に酸化膜(3)J:にへ!電極(4)を形成し、また、
シリコン基板(1)の裏面にオーミックコンタクトがと
れるようにA!電極(5)を蒸着させることにより、M
OSキャパシタを作製した(第3図)。Next, in order to improve the properties of the oxide film, particularly the upper oxide film (3), annealing at 550°C in a nitrogen atmosphere and hydrogen plasma treatment at 350°C were performed for 1 hour each. Finally, the oxide film (3) J: Nihe! forming an electrode (4), and
A! Make ohmic contact with the back side of the silicon substrate (1)! By depositing the electrode (5), M
An OS capacitor was fabricated (Fig. 3).
以上のように作製したMOSキャパシタのC−■特性を
調べ、界面準位密度を評価した。第4図に示すように、
低温熱酸化を施していないもの(第5図)に比べて、約
1桁の界面準位密度の低減が認められた。The C-■ characteristics of the MOS capacitor manufactured as described above were examined, and the interface state density was evaluated. As shown in Figure 4,
Compared to the material not subjected to low-temperature thermal oxidation (Fig. 5), it was observed that the interface state density was reduced by about one order of magnitude.
発明の効果
本発明によれば、低温プロセスで、界面特性の良好な絶
縁膜を形成することができるため、例えば、ガラス基板
(歪点;550〜600℃)上での薄膜トランジスタの
製造が可能となる。この技術は安価なガラス基板を用い
たアクティブ・マトリックス・パネル等に利用でき、大
面積薄型ディスプレイ等へ応用が期待されるものである
。Effects of the Invention According to the present invention, an insulating film with good interfacial properties can be formed in a low-temperature process, making it possible, for example, to manufacture thin film transistors on a glass substrate (strain point: 550 to 600°C). Become. This technology can be used in active matrix panels using inexpensive glass substrates, and is expected to be applied to large-area thin displays.
第1図、第2図および第3図は積層酸化膜を用いたMO
Sキャパシタ作製の各プロセス段階における断面図であ
り、第4図は本発明の方法により形成した積層酸化膜の
界面準位密度を示した図であり、第5図は低温熱酸化膜
(2)がない場合の界面準位密度を示した図である。
図中の記号は以下の通りである。
■・・シリコン基板
2・・・低温熱酸化膜
3・・・常圧CVD酸化膜
4.5・・・A!電極
また、第4図および第5図のM、Gは禁止帯の中央を示
し、C,Bは伝導帯の下端、V、Bは価電子帯の上端を
示す。
第1図
第2図
第3図
第4図
第5図
V、B、 M、G、
C,B。
手続補正書(自発)
2、発明の名称
絶縁膜形成方法
3、補正をする者
事件との関係 特許出願人
住所 大阪府大阪市阿倍野区長池町22番22号名称
(504) シャープ株式会社代表者 佐
伯 旭
4、代理人
5、補正命令の日付 (自発)
3、補正の対象 「図面」の第5図
7、補正の内容 別紙の通りFigures 1, 2, and 3 show MO using stacked oxide films.
FIG. 4 is a diagram showing the interface state density of the laminated oxide film formed by the method of the present invention, and FIG. FIG. 3 is a diagram showing the interface state density in the case where there is no. The symbols in the figure are as follows. ■...Silicon substrate 2...Low temperature thermal oxide film 3...Normal pressure CVD oxide film 4.5...A! Further, in FIGS. 4 and 5, M and G indicate the center of the forbidden band, C and B indicate the lower end of the conduction band, and V and B indicate the upper end of the valence band. Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 V, B, M, G,
C,B. Procedural amendment (voluntary) 2. Name of the invention Insulating film forming method 3. Person making the amendment Relationship to the case Patent applicant address 22-22 Nagaike-cho, Abeno-ku, Osaka-shi, Osaka Name
(504) Sharp Corporation Representative Sa
Haku Asahi 4, Agent 5, Date of amendment order (voluntary) 3, Subject of amendment Figure 5, 7 of "Drawings", Contents of amendment as attached.
Claims (1)
体基板表面に酸化薄膜を形成し、次いで、該酸化薄膜上
に絶縁膜を積層することを特徴とする半導体基板上に絶
縁膜を形成する方法。 2、半導体基板がシリコン基板である第1項記載の方法
。 3、熱酸化が乾燥酸素または水蒸気によって実施される
第1項記載の方法。 4、低温の熱酸化により形成される酸化薄膜が10〜5
0Åの厚さを有する第1項記載の方法。 5、絶縁膜が常圧CVD法、プラズマCVD法、または
光CVD法により形成される第1項記載の方法。[Claims] 1. A semiconductor substrate characterized in that a semiconductor substrate is thermally oxidized at a temperature of 550° C. or lower to form an oxide thin film on the surface of the semiconductor substrate, and then an insulating film is laminated on the oxide thin film. A method of forming an insulating film on top. 2. The method according to item 1, wherein the semiconductor substrate is a silicon substrate. 3. The method according to paragraph 1, wherein the thermal oxidation is carried out with dry oxygen or steam. 4. The oxide thin film formed by low-temperature thermal oxidation is 10-5
2. The method of claim 1, having a thickness of 0 Å. 5. The method according to item 1, wherein the insulating film is formed by atmospheric pressure CVD, plasma CVD, or photo-CVD.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23304685A JPS6292328A (en) | 1985-10-17 | 1985-10-17 | Forming method for insulating film |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23304685A JPS6292328A (en) | 1985-10-17 | 1985-10-17 | Forming method for insulating film |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6292328A true JPS6292328A (en) | 1987-04-27 |
Family
ID=16948949
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP23304685A Pending JPS6292328A (en) | 1985-10-17 | 1985-10-17 | Forming method for insulating film |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6292328A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02246325A (en) * | 1989-02-13 | 1990-10-02 | Internatl Business Mach Corp <Ibm> | Manufacture of transistor |
US6147011A (en) * | 1998-02-28 | 2000-11-14 | Micron Technology, Inc. | Methods of forming dielectric layers and methods of forming capacitors |
US6362114B1 (en) | 1996-11-12 | 2002-03-26 | Micron Technology, Inc. | Semiconductor processing methods of forming an oxynitride film on a silicon substrate |
-
1985
- 1985-10-17 JP JP23304685A patent/JPS6292328A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02246325A (en) * | 1989-02-13 | 1990-10-02 | Internatl Business Mach Corp <Ibm> | Manufacture of transistor |
US6362114B1 (en) | 1996-11-12 | 2002-03-26 | Micron Technology, Inc. | Semiconductor processing methods of forming an oxynitride film on a silicon substrate |
US6147011A (en) * | 1998-02-28 | 2000-11-14 | Micron Technology, Inc. | Methods of forming dielectric layers and methods of forming capacitors |
US6319856B1 (en) | 1998-02-28 | 2001-11-20 | Micron Technology, Inc. | Methods of forming dielectric layers and methods of forming capacitors |
US6787477B2 (en) | 1998-02-28 | 2004-09-07 | Micron Technology, Inc. | Methods of forming dielectric layers and methods of forming capacitors |
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