JPS6286845A - Manufacture of metal base chip carrier - Google Patents

Abstract

PURPOSE:To secure an insulation among a conductor circuit, a through hole plating layer and a metal substrate by forming the outer diameter of a land for the through hole smaller than the inner diameter of the through hole. CONSTITUTION:An insulating layer 3 is laminated on the surface of a metal substrate 2 formed with a plurality of through holes 1, and insulating resin 4 is filled in the holes 1 to form a circuit board 5. Through holes 6 having smaller diameter than the holes 1 are formed concentrically with the holes 1 in the holes 1 of the board 5. A plating layer 7 is formed on the inner periphery of the hole 6, a land 8 continued to the layer 7 is formed on the resin 4, and a conductor circuit 9 continued to the layer 3 is formed on the layer 3, the board 5 is cut along a line passing the hole 6 to form a chip carrier A. In this case, the outer diameter of the land 8 is formed smaller than the inner diameter of the hole 1.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a method for manufacturing metal-based chip carriers used as substrates for electronic devices such as IC puff cages.

[Background Art j Electronic devices such as IC puff cages are produced by packaging electronic component chips such as semiconductor chips attached to lead frames by resin sealing or air sealing. As the number of terminals increases in such electronic devices, attempts have been made to use wiring boards instead of lead frames as carriers for supporting electronic component chips. Furthermore, in response to an increase in the number of terminals, attempts have been made to draw out the terminals from all sides of a wiring board serving as a carrier.

FIG. 4 shows an example of a chip carrier A in which such terminals are drawn out from all sides, and a conductive circuit 9 for lead wires is provided on the surface of the wiring board 5.
A through-hole plating layer 7 is formed on the inner periphery of the semicircular through-holes 6 provided at each of the four ends of the wiring board 5, and the through-hole plating layer 7 and the conductor circuit 9 are continuous.
It is formed by bonding 12 such as wire bonding between an electronic component chip 11 such as a semiconductor chip mounted in the center and each conductor circuit 9. This chip carrier A is mounted on the surface of a wiring board etc. on which printed wiring etc. have been applied, and is put into use by connecting the through-hole plating layer 7, which will become a terminal part, to the wiring circuit of the wiring board by soldering etc. .

Here 1. The recent increase in the degree of integration of electronic component chips 11 is accompanied by heat generation, and it is necessary to devise ways to release this heat generation. Therefore, consideration is being given to creating the wiring board 5 constituting the chip carrier A using a metal plate as a substrate and allowing the heat generated by the electronic component chip 11 to escape due to the good thermal conductivity of the metal board 2. In manufacturing the chip carrier A as shown in FIG. 4 using a metal plate as a substrate, it is necessary to ensure insulation between the metal substrate 2 and the through-hole plating M7 and the conductor circuit 9. A method as shown in FIG. 6 has been proposed.

That is, first, as shown in FIGS. 5(a) and 6(a), a through hole 1 is formed in a metal substrate 2 made of a copper plate, an iron plate, an aluminum plate, or an alloy plate thereof. ″
The through holes 1 are provided so as to be arranged along the outline of the square, and are provided in a number corresponding to the number of terminals of the chip carrier A. Next, as shown in FIG. 7, a metal foil 14 such as copper foil or aluminum foil is layered on the surface of this metal substrate 2 via a prepreg 13, and molded under heat and pressure. The prepreg 13 is made by using glass cloth as a base material and impregnating it with a face of a thermosetting resin such as epoxy tree 1ffi or 7-enol resin, and drying it.

When the prepreg 13 and the metal foil 14 are stacked and hot-pressed on the metal substrate 2 in this way, the results shown in FIG. 5(b) and FIG. 6(b) are obtained.
As shown in the figure, the resin in the prepreg 13 melts and flows into the through hole 1, filling the through hole 1 as an insulating resin 4, and the metal foil 14 is It will be laminated on the metal substrate 2, and the wiring board 5 can be created. In this wiring board 5, a through hole 6 having a smaller diameter than the through hole 1 is formed concentrically with the through hole 1 at the through hole 1, and then the metal [14 is processed by a common method such as etching to remove unnecessary parts. As shown in FIG. 5(c), the conductor circuit 9 is connected to the through-hole land 8 formed at the periphery of the through-hole 6 and the through-hole land 8 is connected to the conductor circuit 9. A plated lead @ 15 is provided to be formed, and further electricity is supplied from the plated lead wire 15 to form the plated lead @ 15 as shown in Fig. 6 (c
), the inner periphery of the through hole 6 is plated with metal such as copper plating to provide the through hole plating layer 7. After this, the outer shape of the wiring board 5 is punched along the line l passing through each through hole 1 as shown by the value line in FIG. A chip carrier A is obtained in which the layer 7 is exposed as a terminal portion. In the chip carrier A created in this manner, the insulation layer 3 provides insulation between the conductor circuit 9 and the metal substrate 2, and the insulation resin 4 provides insulation between the through-hole plating layer 7 and the metal substrate 2. It will be secured.

However, in this case, since the side end surface of the chip carrier A is a cut end surface of the wiring board 5 whose core material is the metal substrate 2, the end surface of the metal substrate 2 is exposed as shown in FIG. In particular, during the external punching process, the cut end of the through-hole land 8 and the cut Wft end of the metal substrate 2 hang down in the outward direction of the punching tool, as shown in FIG. Contact occurs between the through-hole land 8 and the metal substrate 2 due to the droop 16, and conduction is established between the through-hole land 8 and the metal substrate 2, and the conductor circuit 9, the through-hole plating layer 7, and the metal substrate 2
This poses a problem in that the insulation between the two may be impaired.

[Objective of the Invention] The present invention has been made in view of the above points, and provides a method for manufacturing a chip carrier that is free from the risk of impairing the insulation between the conductor circuit or through-hole plating layer and the metal substrate. The purpose is to provide

[Disclosure of the Invention] The method for manufacturing a chip carrier according to the present invention includes laminating an insulating layer 3 on the surface of a metal substrate 2 provided with a plurality of through holes 1, and filling each through hole 1 with an insulating resin 4. to create a wiring board 5, and insert through holes 1 into through holes 1 of this wiring board 5.
A through hole 6 smaller in diameter than the through hole 6 is formed concentrically with the through hole 1, a through hole plating layer 7 is formed on the inner circumference of the through hole 6, and a through hole plating layer J1 is formed on the surface of the insulating resin 4.
After providing a through-hole land 8 continuous with the through-hole land 8 and a conductor circuit 9 continuous with the through-hole land 8 on the surface of the insulation N3, the wiring board 5 is cut along a line passing through the through-hole 6 to form a chip carrier A. In producing the through-hole land 8, the outer diameter of the through-hole land 8 is smaller than the inner diameter of the through-hole 1.
The outer diameter of the through-hole fund 8 is formed to be smaller than the inner diameter of the through-hole 1, so that there is no interference between the through-hole land 8 and the metal substrate 2 when the outer diameter is cut. The present invention will now be explained in detail with reference to Examples.

The wiring board 5 can be produced in the same manner as shown in the above-mentioned 5th UjJ (a), (b), and (c), FIGS. 6(a) (bHc), and FIG. 7. And Figures 5(b) and 6(
A wiring board 5 is prepared as shown in b), and nine circular through holes 6 are formed in the center of the through hole 1 formed in the circular hole in the wiring board 5 concentrically with the through hole 1, and then etching etc. The metal M14 is processed by a conventional method to remove unnecessary parts, and a conductor circuit 9 is formed on the surface of the insulating layer 3 of the wiring board 5, and a through hole 6 is formed on the surface of the insulating resin 4 continuously with the conductor circuit 9.
A through-hole land 8 formed in a ring shape is provided on the peripheral edge of the insulating layer 3, and a plated lead wire 15 is provided continuous with the through-hole land 8 on the surface of the insulating layer 3.

At this time, as shown in FIG.
8 is formed so that its outer shape is concentric with the through hole l, and the outer diameter of the through hole land 8 is smaller than the inner diameter of the through hole 1. Then, by applying electricity from the plating lead wire 15, metal plating such as copper plating is applied to the inner periphery of the through hole 6 to form a through hole plating layer 7, as shown in FIG. 6(e).

After forming the through-hole plating layer 7, through-hole lands 8, and conductor circuits 9 on the wiring board 5 in this manner, a line passing through each through-hole 6 shown by a chain line in FIG. 5(e) and FIG. Punch and cut the wiring board 5 with l,
A chip carrier A whose outer diameter is machined as shown in FIG. 4 can be obtained. In this way, when cutting the wiring board 5 by punching, the chip carrier A
As already explained in FIG. 9, even if sag 16 occurs on the cut end surface of the through-hole portion land 8 or the cut end surface of the metal substrate 2 along the punching direction, the first
As shown in the figure, the outer diameter a of the through-hole land 8 is smaller than the inner diameter a of the through-hole 1, and there is no overlap between the through-hole land 8 and the metal substrate 2 in the front and back directions, and the through-hole This prevents the sag 16 generated on the cut end surface of the through-hole portion land 8 from coming into contact with the cut end surface of the metal substrate 2, and the sag 1G generated on the cut end surface of the metal substrate 2 coming into contact with the cut end surface of the through-hole portion land 8. This can be prevented. Therefore, through-hole land 8 and metal substrate 2
It is possible to prevent a short circuit between the metal substrate 2 and the conductive circuit 9 or the through-hole plating M 7 from being impaired.

In this case, by forming the outer diameter of the through-hole land 8 smaller than the inner diameter of the through-hole 1, a short circuit between the through-hole land 8 and the metal substrate 2 is prevented, and the conductor circuit 9 and the through-hole This can prevent the insulation between the plating layer 7 and the metal substrate 2 from being impaired, and there is no need to reduce the diameter of the through hole 6, which serves as a terminal part of the chip carrier A. By ensuring a sufficient wall area of the through-hole plating layer 7, connection reliability will not be reduced when the chip carrier 8 is mounted on a printed board or the like. Furthermore, since the outer diameter of the through-hole land 8 is smaller than the inner diameter of the through-hole 1, it is possible to secure a large insulation distance between the through-hole land 8 and the metal substrate 2. A short circuit between the plated lead wire 15 and the metal substrate 2 when the through-hole plated layer 7 is formed by connecting the wire 15 is also reliably prevented.

[Effects of the Invention] As described above, in the present invention, when cutting a wiring board along a line passing through a through hole to create a chip carrier, the outer diameter of the through hole land is made smaller than the inner diameter of the through hole. Since the cut end surface of the chip carrier is formed in the punching direction, even if there is a drop on the cut end surface of the through-hole land or the cut end surface of the metal substrate, there will be no difference between the front and back sides between the through-hole land and the metal substrate. There is no overlapping part in the direction, and there is no risk of short circuit between the through-hole land and the metal board due to droop that occurs on the through-hole land or the cut end surface of the metal board, and there is no risk of short circuit between the through-hole land and the metal board. It is advantageous to prevent the insulation between the plating layer and the metal substrate from being impaired.

[Brief explanation of drawings]

FIG. 1 is an enlarged perspective view of a part of a chip carrier manufactured according to the present invention, #S2 is a plan view of a part of the same, FIG. 3 is a front view of the same, and FIG. 4 is a perspective view of the chip carrier. Figure 5 (a), (b), and (c) are plan views of each step in the manufacturing of the chip carrier, and Figure 6 (a), (b), and (c) are enlarged views of parts of the same manufacturing steps. 7 is an enlarged exploded sectional view of a part of the same manufacturing process, FIG. 8 is an enlarged perspective view of a part of the conventional chip carrier, and Figure 9 is the L of Figure 18.
- It is a sectional view taken on the L line. 1 is a through hole, 2 is a metal substrate, 3 is an insulating layer, 4 is an insulating resin, 5 is a wiring board, 6 is a through hole, 7 is a through hole plating layer, 8 is a through hole land, and 9 is a conductor circuit. .

Claims (1)

[Claims] (1) Create a wiring board by laminating an insulating layer on the surface of a metal board with multiple through holes and filling each through hole with insulating resin. A smaller through hole is formed concentrically with the through hole, a through hole plating layer is formed on the inner periphery of the through hole, and a through hole land that is continuous with the through hole plating layer is placed on the surface of the insulating resin. After providing conductor circuits continuous with the through-hole lands, cut the wiring board along the lines passing through the through-holes to create a chip carrier. A method for manufacturing a metal-based chip carrier, characterized by forming a metal-based chip carrier.