JPS6275621U - - Google Patents
Info
- Publication number
- JPS6275621U JPS6275621U JP16796385U JP16796385U JPS6275621U JP S6275621 U JPS6275621 U JP S6275621U JP 16796385 U JP16796385 U JP 16796385U JP 16796385 U JP16796385 U JP 16796385U JP S6275621 U JPS6275621 U JP S6275621U
- Authority
- JP
- Japan
- Prior art keywords
- strip
- slot
- diodes
- converter
- pass filter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Superheterodyne Receivers (AREA)
Description
第１図はこの考案によるミキサの構成概念図、
第２図はこの考案によるミキサの回路パターン図
、第３図はこの考案の基礎となるミキサの構成概
念図、第４図はこの考案の基礎となるミキサの回
路パターン図である。
図中、１はストリツプ／スロツト変換器、２は
局発信号しや断回路、３は異なる極性端子を接地
した２つのダイオード、４はストリツプ／スロツ
ト変換器、５は低域通過フイルタ、６はスルーホ
ール、７は同一極性端子を接地した２つのダイオ
ード、８はスロツト／ストリツプ変換器である。
端子１はＲＦ信号端子、端子２は局発信号端子、
端子３は中間周波端子、端子４はＤＣバイアス端
子である。なお、図中同一部分には同一符号を付
して示してある。
Figure 1 is a conceptual diagram of the mixer according to this invention.
FIG. 2 is a circuit pattern diagram of the mixer according to this invention, FIG. 3 is a conceptual diagram of the configuration of the mixer that is the basis of this invention, and FIG. 4 is a circuit pattern diagram of the mixer that is the basis of this invention. In the figure, 1 is a strip/slot converter, 2 is a local oscillator signal disconnection circuit, 3 is two diodes with different polarity terminals grounded, 4 is a strip/slot converter, 5 is a low-pass filter, and 6 is a low-pass filter. A through hole, 7 are two diodes whose terminals of the same polarity are grounded, and 8 is a slot/strip converter.
Terminal 1 is an RF signal terminal, terminal 2 is a local signal terminal,
Terminal 3 is an intermediate frequency terminal, and terminal 4 is a DC bias terminal. Note that the same parts in the figures are designated by the same reference numerals.
Claims (1)
力端子を有するストリツプ／スロツト変換器と、
このストリツプ／スロツト変換器に接続された局
発信号しや断回路と、この局発信号しや断回路に
接続された異なる極性端子を接地した２つのダイ
オードと、この２つのダイオードに接続された入
力端子を有するストリツプ／スロツト変換器と、
このストリツプ／スロツト変換器に接続された低
域通過フイルタと、この低域通過フイルタに接続
された出力端子を有するスルーホールから成るバ
ランス形ミキサにおいて、２つのダイオードの同
一極性端子を接地させ、低域通過フイルタとスル
ーホールの間に出力端子を有するスロツト／スト
リツプ変換器を設けたことを特徴とするバランス
形ミキサ。 a strip/slot converter formed of a strip line and a slot line and having an input terminal;
A local oscillator signal disconnection circuit connected to this strip/slot converter, two diodes with different polarity terminals connected to this local oscillator disconnection circuit, and two diodes connected to these two diodes. a strip/slot converter having an input terminal;
In a balanced mixer consisting of a low-pass filter connected to this strip/slot converter and a through hole having an output terminal connected to this low-pass filter, the same polarity terminals of the two diodes are grounded to A balanced mixer characterized in that a slot/strip converter having an output terminal is provided between a pass filter and a through hole.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16796385U JPS6275621U (en) | 1985-10-31 | 1985-10-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16796385U JPS6275621U (en) | 1985-10-31 | 1985-10-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6275621U true JPS6275621U (en) | 1987-05-14 |
Family
ID=31100392
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16796385U Pending JPS6275621U (en) | 1985-10-31 | 1985-10-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6275621U (en) |
-
1985
- 1985-10-31 JP JP16796385U patent/JPS6275621U/ja active Pending