JPS6275620U - - Google Patents
Info
- Publication number
- JPS6275620U JPS6275620U JP16796285U JP16796285U JPS6275620U JP S6275620 U JPS6275620 U JP S6275620U JP 16796285 U JP16796285 U JP 16796285U JP 16796285 U JP16796285 U JP 16796285U JP S6275620 U JPS6275620 U JP S6275620U
- Authority
- JP
- Japan
- Prior art keywords
- strip
- slot
- converter
- diodes
- pass filter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Superheterodyne Receivers (AREA)
- Amplitude Modulation (AREA)
Description
第１図はこの考案によるミキサの構成概念図、
第２図はこの考案によるミキサの回路パターン図
、第３図はこの考案の基礎となるミキサの構成概
念図、第４図はこの考案の基礎となるミキサの回
路パターン図である。
図中、１はストリツプ／スロツト変換器、２は
局発信号しや断回路、３はストリツプ／スロツト
変換器、４は異なる極性端子を接地した２つのダ
イオード、５は低域通過フイルタ、６はスルーホ
ール、７は同一極性端子を接地した２つのダイオ
ード、８はスロツト／ストリツプ変換器である。
端子１はＲＦ信号端子、端子２は局発信号端子、
端子３は中間周波端子、端子４はＤＣバイアス端
子である。なお、図中同一部分には、同一符号を
付して示してある。
Figure 1 is a conceptual diagram of the mixer according to this invention.
FIG. 2 is a circuit pattern diagram of the mixer according to this invention, FIG. 3 is a conceptual diagram of the configuration of the mixer that is the basis of this invention, and FIG. 4 is a circuit pattern diagram of the mixer that is the basis of this invention. In the figure, 1 is a strip/slot converter, 2 is a local oscillator signal disconnection circuit, 3 is a strip/slot converter, 4 is two diodes with different polarity terminals grounded, 5 is a low-pass filter, and 6 is a low-pass filter. A through hole, 7 are two diodes whose terminals of the same polarity are grounded, and 8 is a slot/strip converter.
Terminal 1 is an RF signal terminal, terminal 2 is a local signal terminal,
Terminal 3 is an intermediate frequency terminal, and terminal 4 is a DC bias terminal. Note that the same parts in the figures are indicated by the same reference numerals.
Claims (1)
力端子を有するストリツプ／スロツト変換器と、
このストリツプ／スロツト変換器に接続された局
発信号しや断回路と、この局発信号しや断回路に
接続された入力端子を有するストリツプ／スロツ
ト変換器と、このストリツプ／スロツト変換器に
接続された異なる極性端子を接地した２つのダイ
オードと、この２つのダイオードに接続された低
域通過フイルタと、この低域通過フイルタに接続
された出力端子を有するスルーホールから成るバ
ランス形ミキサにおいて、２つのダイオードの同
一極性端子を接地させ、低域通過フイルタとスル
ーホールの間に出力端子を有するスロツト／スト
リツプ変換器を設けたことを特徴とするバランス
形ミキサ。 a strip/slot converter formed of a strip line and a slot line and having an input terminal;
A strip/slot converter having a local oscillator signal cutoff circuit connected to the strip/slot converter, an input terminal connected to the local oscillator cutoff circuit, and a strip/slot converter connected to the strip/slot converter. In a balanced mixer consisting of two diodes with different polarity terminals grounded, a low-pass filter connected to these two diodes, and a through hole having an output terminal connected to this low-pass filter, A balanced mixer characterized in that the same polarity terminals of two diodes are grounded and a slot/strip converter having an output terminal is provided between a low-pass filter and a through hole.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16796285U JPS6275620U (en) | 1985-10-31 | 1985-10-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16796285U JPS6275620U (en) | 1985-10-31 | 1985-10-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6275620U true JPS6275620U (en) | 1987-05-14 |
Family
ID=31100390
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16796285U Pending JPS6275620U (en) | 1985-10-31 | 1985-10-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6275620U (en) |
-
1985
- 1985-10-31 JP JP16796285U patent/JPS6275620U/ja active Pending