JPH0186709U - - Google Patents

Info

Publication number
JPH0186709U
JPH0186709U JP18247987U JP18247987U JPH0186709U JP H0186709 U JPH0186709 U JP H0186709U JP 18247987 U JP18247987 U JP 18247987U JP 18247987 U JP18247987 U JP 18247987U JP H0186709 U JPH0186709 U JP H0186709U
Authority
JP
Japan
Prior art keywords
slot
strip
converter
integrated circuit
microwave integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18247987U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP18247987U priority Critical patent/JPH0186709U/ja
Publication of JPH0186709U publication Critical patent/JPH0186709U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Superheterodyne Receivers (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案によるモノリシツク化マイク
ロ波集積回路ミキサの構成概念図、第2図はこの
考案によるモノリシツク化マイクロ波集積回路ミ
キサの回路パターン図、第3図はこの考案の基礎
となるモノリシツク化マイクロ波集積回路ミキサ
の構成概念図、第4図はこの考案の基礎となるモ
ノリシツク化マイクロ波集積回路ミキサの回路パ
ターン図である。 図中、1はストリツプ/スロツト変換器、2は
異なる極性端子を接地した2つのシヨツトキバリ
アダイオード、3はストリツプ/スロツト変換器
、4は低域通過フイルタ、5はバイアホール、6
はガリウムヒ素を基板材とする誘電体基板、7は
同じ極性端子を接地した2つのシヨツトキバリア
ダイオード、8はスロツト/ストリツプ変換器で
ある。端子1はRF信号端子、端子2は局発信号
端子、端子3は中間周波端子、端子4はDCバイ
アス端子である。なお、図中同一あるいは相当部
分には同一符号を付して示してある。
Figure 1 is a conceptual diagram of the configuration of a monolithic microwave integrated circuit mixer based on this invention, Figure 2 is a circuit pattern diagram of a monolithic microwave integrated circuit mixer based on this invention, and Figure 3 is a monolithic structure that is the basis of this invention. FIG. 4 is a conceptual diagram of the structure of a microwave integrated circuit mixer. FIG. 4 is a circuit pattern diagram of a monolithic microwave integrated circuit mixer, which is the basis of this invention. In the figure, 1 is a strip/slot converter, 2 is two shotgun barrier diodes with different polarity terminals grounded, 3 is a strip/slot converter, 4 is a low-pass filter, 5 is a via hole, and 6 is a strip/slot converter.
7 is a dielectric substrate made of gallium arsenide, 7 is two shotgun barrier diodes whose terminals of the same polarity are grounded, and 8 is a slot/strip converter. Terminal 1 is an RF signal terminal, terminal 2 is a local signal terminal, terminal 3 is an intermediate frequency terminal, and terminal 4 is a DC bias terminal. It should be noted that the same or corresponding parts in the drawings are designated by the same reference numerals.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ガリウムヒ素を基板材とする誘電体基板と、上
記誘電体基板の一方の面の一部に設けられたスト
リツプ線路と、上記誘電体基板の他方の面の一部
に設けられたスロツト線路で形成されるモノリシ
ツク化マイクロ波集積回路で、入力端子を有する
ストリツプ/スロツト変換器と、これに接続され
た異なる極性端子を接地した2つのシヨツトキバ
リアダイオードと、これに接続された入力端子を
有するストリツプ/スロツト変換器と、これに接
続されたスロツト低域通過フイルタと、出力端子
を有するバイアホールから成るモノリシツク化マ
イクロ波集積回路バランス型ミキサにおいて、2
つのシヨツトキバリアダイオードの同一極性端子
を接地させ、低域通過フイルタとバイアホールの
間に出力端子を有するスロツト/ストリツプ変換
器を設けたことを特徴とするモノリシツク化マイ
クロ波集積回路ミキサ。
A dielectric substrate made of gallium arsenide, a strip line provided on a portion of one surface of the dielectric substrate, and a slot line provided on a portion of the other surface of the dielectric substrate. A monolithic microwave integrated circuit consisting of a strip/slot converter having an input terminal, two shot barrier diodes with different polarity terminals connected to ground, and a strip converter having an input terminal connected to the strip/slot converter. In a monolithic microwave integrated circuit balanced mixer consisting of a /slot converter, a slot low-pass filter connected to it, and a via hole having an output terminal,
A monolithic microwave integrated circuit mixer characterized in that the same polarity terminals of two shot barrier diodes are grounded and a slot/strip converter having an output terminal is provided between a low-pass filter and a via hole.
JP18247987U 1987-11-30 1987-11-30 Pending JPH0186709U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18247987U JPH0186709U (en) 1987-11-30 1987-11-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18247987U JPH0186709U (en) 1987-11-30 1987-11-30

Publications (1)

Publication Number Publication Date
JPH0186709U true JPH0186709U (en) 1989-06-08

Family

ID=31473927

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18247987U Pending JPH0186709U (en) 1987-11-30 1987-11-30

Country Status (1)

Country Link
JP (1) JPH0186709U (en)

Similar Documents

Publication Publication Date Title
JPH0186709U (en)
JPH0186307U (en)
JPS6418814U (en)
JPS6415413U (en)
JPS62191215U (en)
JPS6275621U (en)
JPS62191214U (en)
JPS6175621U (en)
JPS6275620U (en)
JPH0255716U (en)
JPH0310613U (en)
JPH0255715U (en)
JPS62181022U (en)
JPH039526U (en)
JPS6341917U (en)
JPH0272015U (en)
JPS6271911U (en)
JPH01149119U (en)
JPS61143320U (en)
JPH0448712U (en)
JPH0191318U (en)
JPH01100515U (en)
JPS61191614U (en)
JPS62181020U (en)
JPH03101030U (en)