JPH03101030U - - Google Patents

Info

Publication number
JPH03101030U
JPH03101030U JP867390U JP867390U JPH03101030U JP H03101030 U JPH03101030 U JP H03101030U JP 867390 U JP867390 U JP 867390U JP 867390 U JP867390 U JP 867390U JP H03101030 U JPH03101030 U JP H03101030U
Authority
JP
Japan
Prior art keywords
strip
slot
diodes
substrate
converter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP867390U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP867390U priority Critical patent/JPH03101030U/ja
Publication of JPH03101030U publication Critical patent/JPH03101030U/ja
Pending legal-status Critical Current

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Landscapes

  • Superheterodyne Receivers (AREA)
  • Amplitude Modulation (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案によるバランス型ミキサの回
路パターン図、第2図はこの考案の他の実施例を
示す図、第3図は従来のバランス型ミキサの回路
パターン図である。 図中、1……第1のストリツプ/スロツト変換
器、2……第2のストリツプ/スロツト変換器、
3……2つのダイオード、4……スロツト低域通
過フイルタ、5……スルーホール、6……3個の
スルーホール、7……基板、8……局発信号短絡
回路である。なお、図中同一部分には、同一符号
を付して示してある。
FIG. 1 is a circuit pattern diagram of a balanced mixer according to this invention, FIG. 2 is a diagram showing another embodiment of this invention, and FIG. 3 is a circuit pattern diagram of a conventional balanced mixer. In the figure, 1...first strip/slot converter, 2...second strip/slot converter,
3...two diodes, 4...slot low-pass filter, 5...through hole, 6...three through holes, 7...board, 8...local oscillator signal short circuit. Note that the same parts in the figures are indicated by the same reference numerals.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 基板の表面に形成されたストリツプ線路と基板
の裏面に形成されたスロツト線路で構成され、ス
トリツプ線路の入力端子を有する第1のストリツ
プ/スロツト変換器と、この第1のストリツプ/
スロツト変換器に接続されたストリツプ線路の入
力端子を有する第2のストリツプ/スロツト変換
器と、この第2のストリツプ/スロツト変換器の
スロツト線路に接続された異なる極性端子を接地
した2個のダイオードと、この2個のダイオード
に接続されたスロツト低域通過フイルタと、この
スロツト低域通過フイルタに接続されたストリツ
プ線路の出力端子を有するスルーホールとから成
るバランス型ミキサにおいて、3個のスルーホー
ルを設け、前記3個のスルーホールを用いて上記
2個のダイオードを基板表面に取付けたことを特
徴とするミキサ。
A first strip/slot converter is composed of a strip line formed on the front surface of the substrate and a slot line formed on the back surface of the substrate, and has a strip line input terminal;
A second strip/slot converter with a strip line input terminal connected to the slot converter, and two diodes with different polarity terminals connected to the slot line of this second strip/slot converter to ground. In a balanced mixer consisting of a slotted low-pass filter connected to these two diodes, and a through-hole having a strip line output terminal connected to this slotted low-pass filter, the three through-holes are A mixer characterized in that the two diodes are attached to the surface of the substrate using the three through holes.
JP867390U 1990-01-31 1990-01-31 Pending JPH03101030U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP867390U JPH03101030U (en) 1990-01-31 1990-01-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP867390U JPH03101030U (en) 1990-01-31 1990-01-31

Publications (1)

Publication Number Publication Date
JPH03101030U true JPH03101030U (en) 1991-10-22

Family

ID=31512295

Family Applications (1)

Application Number Title Priority Date Filing Date
JP867390U Pending JPH03101030U (en) 1990-01-31 1990-01-31

Country Status (1)

Country Link
JP (1) JPH03101030U (en)

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